Preventing and Detecting Integrated Circuit Theft and Counterfeiting

    公开(公告)号:US20210035923A1

    公开(公告)日:2021-02-04

    申请号:US16527296

    申请日:2019-07-31

    Applicant: NXP B.V.

    Inventor: Jan-Peter Schat

    Abstract: A mechanism is provided to secure integrated circuit devices that combines a high degree of security with a low overhead, both in area and cost, thereby making it appropriate for smaller, cheaper integrated circuits. A determination is made whether a device die is on a wafer or if the device die is incorporated into a package. Only if the device die is incorporated in a package can the functional logic of device die be activated, and then only if a challenge-response query is satisfied. In some embodiments, a random number generator is used during wafer testing to form a pair of numbers, along with a die identifier, that is unique for each device die. A final test is then performed in which the device die can be activated if the device die is incorporated in a package, and the die identifier—random number pair is authenticated.

    Apparatuses and methods involving adjustable circuit-stress test conditions for stressing regional circuits

    公开(公告)号:US10901023B2

    公开(公告)日:2021-01-26

    申请号:US16059547

    申请日:2018-08-09

    Applicant: NXP B.V.

    Abstract: An example method includes stressing, under different circuit-stress test conditions, a plurality of different types of regional circuits susceptible to time dependent dielectric breakdown (TDDB), and in response, monitoring for levels of reliability failure associated with the plurality of different types of regional circuits. The method includes storing a set of stress-test data based on each of the levels of reliability failure, the set of stress-test data being stored within the integrated circuit to indicate reliability-threshold test data specific to the integrated circuit. Within the integrated circuit, an on-chip monitoring circuit indicates operational conditions of suspect reliability associated with dielectric breakdown of at least one of the plurality of different types of regional circuits. And, the method further includes, during operation of the integrated circuit, adjusting at least one of the different circuit-stress test conditions based on the indicated operational conditions of suspect reliability.

    Apparatuses and methods involving self-testing voltage regulation circuits

    公开(公告)号:US10823787B2

    公开(公告)日:2020-11-03

    申请号:US16009836

    申请日:2018-06-15

    Applicant: NXP B.V.

    Inventor: Jan-Peter Schat

    Abstract: An apparatus embodiment includes a voltage regulator circuit that provides a regulated voltage supply signal, logic state circuitry, test control circuitry, and a supply-signal monitoring circuit. The logic state circuitry includes logic modules that are reconfigured between application controlled self-test modes in which data is shifted through the logic module and while being powered from the regulated voltage supply signal. The test control circuitry operates the controlled self-test mode by causing a predetermined set of the data to shift through the logic modules and that causes the logic state circuitry to load the voltage regulator circuit by stressing the voltage regulator circuit. The supply-signal monitoring circuit monitors a quality parameter of the regulated voltage supply signal and provides an indication of characteristics of the regulated voltage supply signal which bear on a likelihood that the voltage regulator circuit is associated with defective circuitry.

    ANALOG-TEST-BUS APPARATUSES INVOLVING CALIBRATION OF COMPARATOR CIRCUITS AND METHODS THEREOF

    公开(公告)号:US20200072900A1

    公开(公告)日:2020-03-05

    申请号:US16117317

    申请日:2018-08-30

    Applicant: NXP B.V.

    Abstract: An example analog-test-bus (ATB) apparatus includes a plurality of comparator circuits, each having an output port, and a pair of input ports of opposing polarity including an inverting port and a non-inverting port, a plurality of circuit nodes to be selectively connected to the input ports of a first polarity, and at least one digital-to-analog converter (DAC) to drive the input ports of the plurality of comparator circuits. The apparatus further includes data storage and logic circuitry that accounts for inaccuracies attributable to the plurality of comparator circuits by providing, for each comparator circuit, a set of calibration data indicative of the inaccuracies for adjusting comparison operations performed by the plurality of comparator circuits.

    APPARATUSES HAVING DIVERSIFIED LOGIC CIRCUITS AND METHODS THEREOF

    公开(公告)号:US20200050734A1

    公开(公告)日:2020-02-13

    申请号:US16057106

    申请日:2018-08-07

    Applicant: NXP B.V.

    Inventor: Jan-Peter Schat

    Abstract: An example apparatus includes application circuit that carries out a specific set of actions on an input data vector, and a decoding circuit. The application circuit includes: a first diversification logic circuit that processes data corresponding to the input data vector and in response, generates a coded first output data vector; and a second diversification logic circuit that processes the data corresponding to the input data vector and in response, generate a coded second output data vector, the coded second output data vector being uniquely coded relative to the coded first output data vector. The decoding circuit assesses the coded first output data vector relative to the coded second output data vector and, in response, generates output data indicative of a likelihood of a design weakness in the application circuit.

    Monitor System For Detecting Defeat Devices In Engine Control Units

    公开(公告)号:US20190331555A1

    公开(公告)日:2019-10-31

    申请号:US15967376

    申请日:2018-04-30

    Applicant: NXP B.V.

    Inventor: Jan-Peter Schat

    Abstract: A method for detecting defeat devices in an engine control unit (ECU) includes storing with a key-data collection unit, a first key-data determined during an environmental test of a vehicle. The key-data collection unit stores a second key-data determined before the environmental test. Wherein, one of the first key-data is determined by the ECU modified by a characteristic only present before the environmental test and the second key-data is determined by the ECU modified by a characteristic only present during the environmental test. An environmental testing device compares the first key-data with the second key-data to detect an anomaly, wherein the anomaly indicates the presence of the defeat device in the ECU.

    Test apparatus and method for testing a semiconductor device

    公开(公告)号:US11635461B2

    公开(公告)日:2023-04-25

    申请号:US17115236

    申请日:2020-12-08

    Applicant: NXP B.V.

    Abstract: A test apparatus and method for testing a semiconductor device. The semiconductor device includes an integrated circuit and a plurality of external radiating elements located at a surface of the device. The external radiating elements include at least one transmit element and receive element. The test apparatus includes a plunger. The plunger includes a dielectric portion having a surface for placing against the surface of the device. The plunger also includes at least one waveguide. Each waveguide extends through the plunger for routing electromagnetic radiation transmitted by one of the transmit elements of the device to one of the receive elements of the device. Each waveguide comprises a plurality of waveguide openings for coupling electromagnetically to corresponding radiating elements of the device. The dielectric portion is configured to provide a matched interface for the electromagnetic coupling of the waveguide openings to the plurality of external radiating elements of the device.

    Methods for detecting system-level trojans and an integrated circuit device with system-level trojan detection

    公开(公告)号:US11586728B2

    公开(公告)日:2023-02-21

    申请号:US16435421

    申请日:2019-06-07

    Applicant: NXP B.V.

    Inventor: Jan-Peter Schat

    Abstract: Embodiments of a method, an IC device, and a circuit board are disclosed. In an embodiment, the method involves at an IC device of the system, monitoring activity on a bus interface of the IC device, wherein the bus interface is connected to a bus on the system that communicatively couples the IC device to at least one other IC device on the system, applying machine learning to data corresponding to the monitored activity to generate an activity profile, monitoring subsequent activity on the bus interface of the IC device, comparing data corresponding to the to subsequently monitored activity to the machine learning generated activity profile to determine if a system-level Trojan is detected, and generating a notification when it is determined from the comparison that a system-level Trojan has been detected.

    Combined ECC and transparent memory test for memory fault detection

    公开(公告)号:US11557365B2

    公开(公告)日:2023-01-17

    申请号:US16542776

    申请日:2019-08-16

    Applicant: NXP B.V.

    Inventor: Jan-Peter Schat

    Abstract: Embodiments combine error correction code (ECC) and transparent memory built-in self-test (TMBIST) for memory fault detection and correction. An ECC encoder receives input data and provides ECC data for data words stored in memory. Input XOR circuits receive the input data and output XOR'ed data as payload data for the data words. Output XOR circuits receive the payload data and output XOR'ed data. An ECC decoder receives the ECC data and the XOR'ed output data and generates error messages. Either test data from a controller running a TMBIST process or application data from a processor executing an application is selected as the input data. Either test address/control signals from the controller or application address/control signals from the processor are selected for memory access. During active operation of the application, memory access is provided to the processor and the controller, and the memory is tested during the active operation.

    Vehicle access based on RF digests/backgrounds

    公开(公告)号:US11518343B2

    公开(公告)日:2022-12-06

    申请号:US16781560

    申请日:2020-02-04

    Applicant: NXP B.V.

    Inventor: Jan-Peter Schat

    Abstract: According to certain examples, a circuit-based wireless communications system provides secure access to a vehicle by way of certain circuitry configure to compare a first RF background observed for a vehicle-located RF receiver that is part of a vehicle-located circuit secured to a vehicle, with a second RF background observed for a wireless-communications vehicle-access circuit that includes another RF receiver. In response, a distance metric is generated to indicate a degree of similarity between the first RF background and the second RF background, and based on whether this metric satisfies a threshold, access to the vehicle may be granted via the wireless-communications vehicle-access circuit.

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