公开(公告)号：US11500960B2

公开(公告)日：2022-11-15

申请号：US16666699

申请日：2019-10-29

Applicant: QUALCOMM Incorporated

Inventor： Zhongze Wang ,  Ye Lu ,  Yandong Gao ,  Xiaochun Zhu ,  Xia Li

IPC: G11C11/419 ,  G06F17/16 ,  G11C11/412 ,  G06N3/063

Abstract: Certain aspects provide a circuit for in-memory computation. The circuit generally includes an in-memory computation array having a plurality of computation circuits, each of the computation circuits being configured to perform a dot product computation. In certain aspects, each of the computation circuits includes a memory cell, a capacitive element, a precharge transistor coupled between an output of the memory cell and the capacitive element, and a read transistor coupled between a read bit line (RBL) and the capacitive element.

公开(公告)号：US10103319B2

公开(公告)日：2018-10-16

申请号：US15458641

申请日：2017-03-14

Applicant: QUALCOMM Incorporated

Inventor： Kangho Lee ,  Jimmy Kan ,  Xiaochun Zhu ,  Matthias Georg Gottwald ,  Chando Park ,  Seung Hyuk Kang

IPC: H01L29/82 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12 ,  H01L27/22 ,  H01F10/32

Abstract: A material stack of a synthetic anti-ferromagnetic (SAF) reference layer of a perpendicular magnetic tunnel junction (MTJ) may include an SAF coupling layer. The material stack may also include and an amorphous spacer layer on the SAF coupling layer. The amorphous spacer layer may include an alloy or multilayer of tantalum and cobalt or tantalum and iron or cobalt and iron and tantalum. The amorphous spacer layer may also include a treated surface of the SAF coupling layer.

公开(公告)号：US10008537B2

公开(公告)日：2018-06-26

申请号：US14744984

申请日：2015-06-19

Applicant: QUALCOMM Incorporated

Inventor： Xia Li ,  Xiaochun Zhu ,  Yu Lu

IPC: G11C11/15 ,  H01L27/22 ,  H01L43/02 ,  H01L43/08 ,  G11C11/16 ,  H01L43/12

CPC classification number: H01L27/226 ,  G11C11/161 ,  G11C11/1655 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675 ,  H01L27/22 ,  H01L43/02 ,  H01L43/08 ,  H01L43/12

Abstract: A complementary bit cell includes a first magnetic tunnel junction (MTJ) device having a free layer coupled to a first access transistor and having a pinned layer coupled to a bit line. The complementary bit cell also includes a second MTJ device having a free layer coupled to the same bit line and having a pinned layer coupled to a second access transistor.

公开(公告)号：US09935258B2

公开(公告)日：2018-04-03

申请号：US14994212

申请日：2016-01-13

Applicant: QUALCOMM Incorporated

Inventor： Wei-Chuan Chen ,  Kangho Lee ,  Xiaochun Zhu ,  Seung H. Kang

IPC: H01L43/08 ,  G11C11/15 ,  G11C11/16 ,  H01L43/02 ,  H01L43/10 ,  H01L43/12

CPC classification number: H01L43/02 ,  G11C11/15 ,  G11C11/16 ,  G11C11/161 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12

Abstract: Perpendicular magnetic anisotropy (PMA) type magnetic random access memory cells are constructed with a composite PMA layer to provide a magnetic tunnel junction (MTJ) with an acceptable thermal barrier. A PMA coupling layer is deposited between a first PMA layer and a second PMA layer to form the composite PMA layer. The composite PMA layer may be incorporated in PMA type MRAM cells or in-plane type MRAM cells.

公开(公告)号：US09583696B2

公开(公告)日：2017-02-28

申请号：US14460731

申请日：2014-08-15

Applicant: QUALCOMM Incorporated

Inventor： Matthias Georg Gottwald ,  Chando Park ,  Xiaochun Zhu ,  Kangho Lee ,  Seung Hyuk Kang

IPC: G11C11/16 ,  H01L43/08

CPC classification number: H01L43/08 ,  G11C11/161 ,  G11C11/1673

Abstract: An apparatus includes a perpendicular magnetic anisotropy magnetic tunnel junction (pMTJ) device. The pMTJ device includes a storage layer and a reference layer. The reference layer includes a portion configured to produce a ferrimagnetic effect. The portion includes a first layer, a second layer, and a third layer. The second layer is configured to antiferromagnetically (AF) couple the first layer and the third layer during operation of the pMTJ device.

Abstract translation: 一种装置包括垂直磁各向异性磁隧道结（pMTJ）装置。 pMTJ设备包括存储层和参考层。 参考层包括被配置为产生亚铁磁效应的部分。 该部分包括第一层，第二层和第三层。 第二层被配置为在pMTJ器件的操作期间反铁磁（AF）耦合第一层和第三层。

公开(公告)号：US20160372518A1

公开(公告)日：2016-12-22

申请号：US14744984

申请日：2015-06-19

Applicant: QUALCOMM Incorporated

Inventor： Xia Li ,  Xiaochun Zhu ,  Yu Lu

IPC: H01L27/22 ,  H01L43/12 ,  H01L43/08 ,  G11C11/16 ,  H01L43/02

CPC classification number: H01L27/226 ,  G11C11/161 ,  G11C11/1655 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675 ,  H01L27/22 ,  H01L43/02 ,  H01L43/08 ,  H01L43/12

Abstract: A complementary bit cell includes a first magnetic tunnel junction (MTJ) device having a free layer coupled to a first access transistor and having a pinned layer coupled to a bit line. The complementary bit cell also includes a second MTJ device having a free layer coupled to the same bit line and having a pinned layer coupled to a second access transistor.

Abstract translation: 互补位单元包括具有耦合到第一存取晶体管并具有耦合到位线的被钉扎层的自由层的第一磁隧道结（MTJ）器件。 互补位单元还包括具有耦合到相同位线的自由层并且具有耦合到第二存取晶体管的被钉扎层的第二MTJ器件。

公开(公告)号：US09444035B2

公开(公告)日：2016-09-13

申请号：US14483104

申请日：2014-09-10

Applicant: QUALCOMM Incorporated

Inventor： Chando Park ,  Kangho Lee ,  Jimmy Kan ,  Matthias Georg Gottwald ,  Xiaochun Zhu ,  Seung Hyuk Kang

IPC: H01L29/82 ,  H01L43/02 ,  H01L43/12 ,  H01L43/08

CPC classification number: H01L43/02 ,  H01L43/08 ,  H01L43/12

Abstract: A magnetic tunnel junction (MTJ) device includes a pinned layer, a tunnel barrier layer on the pinned layer, and a free layer on the tunnel barrier layer. The MTJ device also includes a perpendicular magnetic anisotropic (PMA) enhancement layer on the free layer, a capping layer on the PMA enhancement layer, and a conductive path electrically shorting the capping layer, the PMA enhancement layer and the free layer. A method of fabricating a perpendicular magnetic tunnel junction (pMTJ) device includes forming a capping layer, a perpendicular magnetic anisotropic (PMA) enhancement layer and a free layer. The method also includes forming a conductive layer to short the capping layer, the PMA enhancement layer and the free layer.

Abstract translation: 磁性隧道结（MTJ）装置包括钉扎层，钉扎层上的隧道势垒层和隧道势垒层上的自由层。 MTJ装置还包括在自由层上的垂直磁各向异性（PMA）增强层，PMA增强层上的覆盖层以及电封闭封盖层，PMA增强层和自由层的导电路径。 制造垂直磁性隧道结（pMTJ）器件的方法包括形成覆盖层，垂直磁性各向异性（PMA）增强层和自由层。 该方法还包括形成导电层以缩短封盖层，PMA增强层和自由层。

公开(公告)号：US09324768B1

公开(公告)日：2016-04-26

申请号：US14559528

申请日：2014-12-03

Applicant: QUALCOMM Incorporated

Inventor： Xiaochun Zhu ,  Xia Li ,  Seung Hyuk Kang

IPC: G11C11/00 ,  H01L27/22 ,  G11C11/16 ,  H01L43/02 ,  H01L43/08

CPC classification number: G11C11/1659 ,  G11C7/18 ,  G11C11/16 ,  G11C11/161 ,  G11C11/1655 ,  G11C2213/82 ,  H01L27/222 ,  H01L27/228

Abstract: An STT magnetic memory includes adjacent columns of STT magnetic memory elements having a top electrode and a bottom electrode. A shared bit line is coupled to the top electrode of the STT magnetic memory elements in at least two of the adjacent columns. The bottom electrodes of the STT magnetic memory elements of one of the adjacent columns are selectively coupled to one source line, and the bottom electrodes of the STT magnetic memory elements of another among the adjacent columns are selectively coupled to another source line.

Abstract translation: STT磁存储器包括具有顶电极和底电极的STT磁存储元件的相邻列。 共享位线在至少两个相邻列中的STT磁存储元件的顶部电极耦合。 相邻列之一的STT磁存储元件的底部电极被选择性地耦合到一个源极线，并且相邻列中另一个的STT磁性存储器元件的底部电极选择性地耦合到另一个源极线。

公开(公告)号：US09214214B2

公开(公告)日：2015-12-15

申请号：US14072634

申请日：2013-11-05

Applicant: QUALCOMM Incorporated

Inventor： Xiaochun Zhu ,  Steven M. Millendorf ,  Xu Guo ,  David M. Jacobson ,  Kangho Lee ,  Seung H. Kang ,  Matthew Michael Nowak

IPC: G11C11/16 ,  H04L9/30 ,  H04L9/32

CPC classification number: G11C11/1675 ,  G11C11/161 ,  G11C11/1695 ,  H04L9/0866 ,  H04L9/30 ,  H04L9/3278

Abstract: One feature pertains to a method of implementing a physically unclonable function (PUF). The method includes exposing an array of magnetoresistive random access memory (MRAM) cells to an orthogonal external magnetic field. The MRAM cells are each configured to represent one of a first logical state and a second logical state, and the orthogonal external magnetic field is oriented in an orthogonal direction to an easy axis of a free layer of the MRAM cells to place the MRAM cells in a neutral logical state that is not the first logical state or the second logical state. The method further includes removing the orthogonal external magnetic field to place each of the MRAM cells of the array randomly in either the first logical state or the second logical state.

Abstract translation: 一个特征涉及实现物理不可克隆功能（PUF）的方法。 该方法包括将磁阻随机存取存储器（MRAM）阵列阵列暴露于正交外部磁场。 MRAM单元各自被配置为表示第一逻辑状态和第二逻辑状态之一，并且正交外部磁场定向为与MRAM单元的自由层的容易轴正交的方向，以将MRAM单元置于 不是第一逻辑状态或第二逻辑状态的中性逻辑状态。 该方法还包括去除正交的外部磁场，将阵列的每个MRAM单元随机地置于第一逻辑状态或第二逻辑状态中。

公开(公告)号：US09142278B2

公开(公告)日：2015-09-22

申请号：US14076427

申请日：2013-11-11

Applicant: QUALCOMM Incorporated

Inventor： Xiaochun Zhu ,  Hari M. Rao ,  Jung Pill Kim ,  Seung Hyuk Kang

IPC: G11C11/14 ,  G11C11/16

CPC classification number: G11C11/1675 ,  G11C11/16 ,  G11C11/1659 ,  G11C11/1693

Abstract: A first write driver applies a first voltage above a fixed potential to a first terminal. A second write driver applies a second voltage that is higher above the fixed potential than the first voltage to a second terminal. There is at least one magnetic tunnel junction (MTJ) structure coupled at the first terminal at a first side to the first write driver and coupled at the second terminal at a second side to the second write driver. The first side of the MTJ structure receives the first voltage and the second side of the MTJ structure receives a ground voltage to change from a first state to a second state. The second side of the MTJ structure receives the second voltage and the first side of the MTJ structure receives the ground voltage to change from the second state to the first state.

Abstract translation: 第一写入驱动器将高于固定电位的第一电压施加到第一端子。 第二写入驱动器将比固定电位高于第一电压的第二电压施加到第二端子。 至少一个磁隧道结（MTJ）结构在第一侧的第一端耦合到第一写入驱动器，并且在第二端处的第二端耦合到第二写入驱动器。 MTJ结构的第一侧接收第一电压，并且MTJ结构的第二侧接收地电压以从第一状态变为第二状态。 MTJ结构的第二面接收第二电压，并且MTJ结构的第一侧接收地电压以从第二状态变为第一状态。