Abstract:
Provided is a structure which is capable of central control of an electric device and a sensor device and a structure which can reduce power consumption of an electric device and a sensor device. A central control system includes at least a central control device, an output unit, and an electric device or a sensor device. The central control device performs arithmetic processing on information transmitted from the electric device or the sensor device and makes the output unit output information obtained by the arithmetic processing. It is possible to know the state of the electric device or the sensor device even apart from the electric device or the sensor device. The electric device or the sensor device includes a transistor which includes an activation layer using a semiconductor with the band gap wider than that of single crystal silicon.
Abstract:
A semiconductor device in which a transistor has the characteristic of low off-state current is provided. The transistor comprises an oxide semiconductor layer having a channel region whose channel width is smaller than 70 nm. A temporal change in off-state current of the transistor over time can be represented by Formula (a2). In Formula (a2), IOFF represents the off-state current, t represents time during which the transistor is off, α and τ are constants, β is a constant that satisfies 0
Abstract:
A display device with favorable display quality is provided. A display portion where a plurality of pixels is arranged in a matrix is divided into Region A and Region B, i.e., regions on the upstream side and the downstream side of a scanning direction. A signal line for supplying an image signal is provided in each of Region A and Region B. Region A and Region B adjoin each other such that a boundary line showing the boundary between the regions is bent. Bending the boundary line suppresses formation of a stripe in a boundary portion. For example, in a given column, the total number of pixels electrically connected to a signal line in Region A is made different from the total number of pixels electrically connected to a signal line in Region B.
Abstract:
The display evenness of a large or high-resolution display device is improved. The display device includes a source driver, a first gate driver, a second gate driver, a first pixel, and a second pixel. The first pixel is electrically connected to the source driver and the first gate driver. The second pixel is electrically connected to the source driver and the second gate driver. The first pixel is located closer to the source driver than the second pixel is. The first gate driver has a function of supplying a first write signal to the first pixel. The second gate driver has a function of supplying a second write signal to the second pixel. The pulse width of the second write signal is larger than the pulse width of the first write signal.
Abstract:
An object is to provide a semiconductor device that can maintain the connection relation between logic circuit units or the circuit configuration of each of the logic circuit units even after supply of power supply voltage is stopped. Another object is to provide a semiconductor device in which the connection relation between logic circuit units or the circuit configuration of each of the logic circuit units can be changed at high speed. In a reconfigurable circuit, an oxide semiconductor is used for a semiconductor element that stores data on the circuit configuration, connection relation, or the like. Specifically, the oxide semiconductor is used for a channel formation region of the semiconductor element.
Abstract:
A microcontroller which operates in a low power consumption mode is provided. A microcontroller includes a CPU, a memory, and a peripheral circuit such as a timer circuit. A register in the peripheral circuit is provided in an interface with a bus line. A power gate for controlling supply control is provided. The microcontroller can operate not only in a normal operation mode where all circuits are active, but also in a low power consumption mode where some of the circuits are active. A volatile memory and nonvolatile memory are provided in a register, such as a register of the CPU. Data in the volatile memory is backed up in the nonvolatile memory before the power supply is stopped. In the case where the operation mode returns to the normal mode, when power supply is started again, data in the nonvolatile memory is written back into the volatile memory.
Abstract:
A semiconductor device including a test circuit is miniaturized. The semiconductor device includes r first input terminals (r is an integer of 2 or more), a second input terminal, r functional circuits, a demultiplexer, and a switch circuit. The demultiplexer is a pass transistor logic circuit. R output terminals of the demultiplexer are electrically connected to respective input terminals of the functional circuit and the input terminal is electrically connected to the second input teiminal. Input terminals of the r circuits are electrically connected to the respective first input terminals through the switch circuit. For example, a signal for verification is input to the first input terminal in verification of the functional circuit to operate the demultiplexer. One signal for verification is input to r functional circuits by the demultiplexer.
Abstract:
A novel semiconductor device and a driving method thereof are provided. In the semiconductor device, a (volatile) node which holds data that is rewritten by arithmetic processing as appropriate and a node in which the data is stored are electrically connected through a source and a drain of a transistor whose channel is formed in an oxide semiconductor layer. The off-state current value of the transistor is extremely low. Therefore, electric charge scarcely leaks through the transistor from the latter node, and thus data can be held in the latter node even in a period during which supply of power source voltage is stopped. In the semiconductor device, a means of setting the potential of the latter node to a predetermined potential is provided. Specifically, a means of supplying a potential corresponding to “1” or “0” that is data stored in the latter node from the former node is provided.
Abstract:
The data in a volatile memory may conventionally be lost even in case of a very short time power down or supply voltage drop such as an outage or sag. In view of the foregoing, an object is to extend data retention time even with a volatile memory for high-speed data processing. Data retention time can be extended by backing up the data content stored in the volatile memory in a memory including a capacitor and an oxide semiconductor transistor.
Abstract:
An imaging device capable of image processing is provided. The imaging device can retain analog data (image data) obtained by an image-capturing operation in a pixel and perform a product-sum operation of the analog data and a predetermined weight coefficient in the pixel to convert the data into binary data. When the binary data is taken in a neural network or the like, processing such as image recognition can be performed. Since enormous volumes of image data can be retained in pixels in the state of analog data, processing can be performed efficiently.