Digital television transmitter and receiver for using 16 state trellis coding
    51.
    发明申请
    Digital television transmitter and receiver for using 16 state trellis coding 有权
    数字电视发射机和接收机,用于使用16个状态网格编码

    公开(公告)号:US20070140368A1

    公开(公告)日:2007-06-21

    申请号:US10594464

    申请日:2005-04-01

    IPC分类号: H04L23/02

    摘要: Provided are a Vestigial Side Band (VSB) Digital Television (DTV) transmitter and receiver based on the Advanced Television System Committee (ATSC) A/53, and a method thereof. The present invention provides 8-VSB DTV transmitter and receiver that can improve reception performance of the receiver by transmitting and double streams formed of normal data and robust data without increasing an average power level, regardless of the ratio of the normal data and robust data, by including an encoding unit for performing 16-state trellis coding on the robust data when a data stream includes robust data, and a method thereof.

    摘要翻译: 提供了基于高级电视系统委员会(ATSC)A / 53的残留边带(VSB)数字电视(DTV)发射机和接收机及其方法。 本发明提供8-VSB数字电视发射机和接收机,无论普通数据和鲁棒数据的比例如何,都可以通过发送和正常数据和鲁棒数据形成的双流来提高接收机的接收性能,而不增加平均功率电平, 通过在数据流包含鲁棒数据时,包括用于对鲁棒数据执行16状态网格编码的编码单元及其方法。

    Semiconductor memory devices and methods of delaying data sampling signal
    52.
    发明授权
    Semiconductor memory devices and methods of delaying data sampling signal 失效
    半导体存储器件和延迟数据采样信号的方法

    公开(公告)号:US07230862B2

    公开(公告)日:2007-06-12

    申请号:US11212843

    申请日:2005-08-29

    IPC分类号: G11C7/00

    摘要: According to the example embodiments of semiconductor memory devices and the methods of delaying a sample data signal of the present invention, the delay characteristics of the data sampling signal (FRT) are adjusted based on the location of the memory unit in a row direction and/or in a column direction with respect to the input/output sense amplifier.

    摘要翻译: 根据半导体存储器件的示例实施例和延迟本发明的采样数据信号的方法,数据采样信号(FRT)的延迟特性基于存储器单元在行方向上的位置和/ 或相对于输入/输出读出放大器在列方向上。

    Semiconductor device and test system thereof
    53.
    发明申请
    Semiconductor device and test system thereof 有权
    半导体器件及其测试系统

    公开(公告)号:US20070034868A1

    公开(公告)日:2007-02-15

    申请号:US11499661

    申请日:2006-08-07

    IPC分类号: H01L23/58

    CPC分类号: G01R31/3173 G01R31/31727

    摘要: A semiconductor device that includes a clock buffer, which generates an internal clock signal in response to a clock signal and a complementary clock signal if the semiconductor device is operating in a first mode and generates the internal clock signal in response to the clock signal and a reference voltage if the semiconductor device is operating in a second mode.

    摘要翻译: 一种半导体器件,包括时钟缓冲器,其如果半导体器件工作在第一模式中,则响应于时钟信号和互补时钟信号产生内部时钟信号,并且响应于时钟信号产生内部时钟信号,并且 如果半导体器件在第二模式下操作,则参考电压。

    Actuator for mobile terminal
    54.
    发明申请
    Actuator for mobile terminal 审中-公开
    移动终端执行器

    公开(公告)号:US20060275032A1

    公开(公告)日:2006-12-07

    申请号:US11444318

    申请日:2006-06-01

    IPC分类号: G03B17/00

    摘要: An actuator for a mobile terminal using suspension wires is disclosed. By using an actuator for a mobile terminal comprising a holder, magnets mounted inside the holder, a coil mounted inside the holder and positioned on the inside of the magnets, a bobbin joined with the coil and having a lens in its center, and suspension wires, the ends of which are joined to the holder, bent at a particular angle to elastically press the bobbin, the manufacturing process may be simplified and the manufacturing cost may be reduced.

    摘要翻译: 公开了一种使用悬挂线的移动终端的致动器。 通过使用用于移动终端的致动器,其包括保持器,安装在保持器内部的磁体,安装在保持器内部并位于磁体内部的线圈,与线圈接合并具有其中心的透镜的线圈和悬挂线 其端部被接合到保持器,以特定角度弯曲以弹性地压制线轴,可以简化制造工艺并且可以降低制造成本。

    Semiconductor memory device and method of arranging signal and power lines thereof
    56.
    发明申请
    Semiconductor memory device and method of arranging signal and power lines thereof 有权
    半导体存储器件及其信号和电源线的布置方法

    公开(公告)号:US20050286285A1

    公开(公告)日:2005-12-29

    申请号:US11134855

    申请日:2005-05-19

    IPC分类号: G11C5/06 G11C5/14 G11C11/4074

    摘要: Method and apparatus for use, e.g., with Synchronous Dynamic Random Access Memory (SDRAM) circuits are disclosed. In one described embodiment, three metal layers are deposited and patterned in turn overlying a memory array portion of an SDRAM. Relatively wide power conductors are routed on a third metal layer, allowing power conductors to be reduced in size, or in some cases eliminated, on first and second metal layers. The relatively wide power conductors thus can provide a more stable power supply to the memory array, and also free some space on first and/or second metal for routing of additional and/or more widely spaced signal conductors. Other embodiments are described and claimed.

    摘要翻译: 公开了使用例如同步动态随机存取存储器(SDRAM)电路的方法和装置。 在一个所描述的实施例中,沉积三层金属层并依次叠置在SDRAM的存储器阵列部分上。 相对宽的电力导体在第三金属层上布线,允许在第一和第二金属层上的电力导体的尺寸减小或在某些情况下被消除。 因此,相对宽的电力导体可以向存储器阵列提供更稳定的电源,并且还释放第一和/或第二金属上的一些空间,用于路由额外的和/或更广泛间隔的信号导体。 描述和要求保护其他实施例。

    NTSC and PAL compatible digital encoder
    58.
    发明授权
    NTSC and PAL compatible digital encoder 失效
    NTSC和PAL兼容数字编码器

    公开(公告)号:US5301015A

    公开(公告)日:1994-04-05

    申请号:US980276

    申请日:1992-11-23

    申请人: Sung-Hoon Kim

    发明人: Sung-Hoon Kim

    摘要: A digital encoder for use in both NTSC and PAL systems includes a demultiplexer for separating a time-division color difference signal R-Y/B-Y into color difference signals R-Y and B-Y. The separated color difference signals R-Y and B-Y are converted by a sub-carrier frequency converter into a sub-carrier frequency, and a digital modulator determines levels and phases of the converted color difference signals. A burst generating circuit generates a burst signal after determining a level and phase of the burst signal, and a chroma encoder produces a chroma signal by mixing an output of the digital modulator with the burst signal.

    摘要翻译: 用于NTSC和PAL系统的数字编码器包括用于将时分色差信号R-Y / B-Y分离成色差信号R-Y和B-Y的解复用器。 分离的色差信号R-Y和B-Y由副载波频率转换器转换成副载波频率,并且数字调制器确定转换的色差信号的电平和相位。 突发发生电路在确定突发信号的电平和相位之后产生突发信号,并且色度编码器通过将数字调制器的输出与突发信号混合来产生色度信号。