公开(公告)号：US20170134155A1

公开(公告)日：2017-05-11

申请号：US14938356

申请日：2015-11-11

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Huan-Neng CHEN ,  William Wu SHEN ,  Lan-Chou CHO ,  Feng-Wei KUO ,  Chewn-Pu JOU

IPC: H04L7/033 ,  H04L7/04 ,  H04L7/00

CPC classification number: H04L7/0331 ,  H04L7/0041 ,  H04L7/042 ,  H04L27/00 ,  H04L27/227

Abstract: A device, a circuit and a method are disclosed herein. The device includes a data receiving circuit and an oscillating signal generator. The data receiving circuit is configured to output a first output signal, a second output signal, and a phase error signal according to an oscillating signal and a modulated signal, in which the phase error signal indicates a phase difference between the oscillating signal and the modulated signal. The oscillating signal generator is configured to delay a phase of a first reference signal according to the phase error signal, to generate the oscillating signal.

公开(公告)号：US20160071805A1

公开(公告)日：2016-03-10

申请号：US14943063

申请日：2015-11-17

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Feng-Wei KUO ,  Hui Yu LEE ,  Huan-Neng CHEN ,  Yen-Jen CHEN ,  Yu-Ling LIN ,  Chewn-Pu JOU

IPC: H01L23/552 ,  H01L23/66 ,  H01L23/498

CPC classification number: H01L23/552 ,  H01L23/147 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/642 ,  H01L23/66 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L25/0655 ,  H01L2223/6677 ,  H01L2224/131 ,  H01L2224/14135 ,  H01L2224/16225 ,  H01L2924/14 ,  H01L2924/1421 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/19042 ,  H01L2924/19104 ,  H01L2924/014

Abstract: Interposer and semiconductor package embodiments provide for the isolation and suppression of electronic noise such as EM emissions in the semiconductor package. The interposer includes shield structures in various embodiments, the shield structures blocking the electrical noise from the noise source, from other electrical signals or devices. The shields include solid structures and some embodiments and decoupling capacitors in other embodiments. The coupling structures includes multiple rows of solder balls included in strips that couple the components and surround and contain the source of electrical noise.

公开(公告)号：US20150020039A1

公开(公告)日：2015-01-15

申请号：US14464730

申请日：2014-08-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Fu-Lung HSUEH ,  Chih-Ping CHAO ,  Chewn-Pu JOU ,  Yung-Chow PENG ,  Harry-Hak-Lay CHUANG ,  Kuo-Tung SUNG

IPC: G06F17/50

CPC classification number: G06F17/5068 ,  G06F17/50 ,  G06F17/5009 ,  H01L27/088 ,  H01L27/0922

Abstract: A MOS device includes an active area having first and second contacts. First and second gates are disposed between the first and second contacts. The first gate is disposed adjacent to the first contact and has a third contact. The second gate is disposed adjacent to the second contact and has a fourth contact coupled to the third contact. A transistor defined by the active area and the first gate has a first threshold voltage, and a transistor defined by the active area and the second gate has a second threshold voltage.

Abstract translation: MOS器件包括具有第一和第二触点的有源区。 第一和第二栅极设置在第一和第二触点之间。 第一门被设置成与第一接触相邻并且具有第三接触。 第二栅极被设置成与第二触点相邻并且具有耦合到第三触点的第四触点。 由有源区和第一栅极限定的晶体管具有第一阈值电压，并且由有源区和第二栅极限定的晶体管具有第二阈值电压。