公开(公告)号：US06524961B1

公开(公告)日：2003-02-25

申请号：US09359760

申请日：1999-07-22

申请人： Souichi Katagiri ,  Kan Yasui ,  Ryousei Kawai ,  Sadayuki Nishimura ,  Masahiko Sato ,  Yoshio Kawamura ,  Shigeo Moriyama

发明人： Souichi Katagiri ,  Kan Yasui ,  Ryousei Kawai ,  Sadayuki Nishimura ,  Masahiko Sato ,  Yoshio Kawamura ,  Shigeo Moriyama

IPC分类号： H01L21461

CPC分类号： B24B37/245 ,  B24D3/32 ,  H01L21/31053 ,  H01L21/3212 ,  H01L21/76819 ,  H01L21/7684

摘要： A film formed on a surface of a wafer on which an integrated circuit is to be constructed can be planarized by using a fixed abrasive tool regardless of the width of elements of a pattern underlying the film. The fixed abrasive tool is liable to form scratches in the surface of the film. A planarizing process of the present invention employs a fixed abrasive tool containing substances harder than the film to be planarized in a content of 10 ppm or below and having a mean pore diameter of 0.2 &mgr;m or below.

公开(公告)号：US06477825B2

公开(公告)日：2002-11-12

申请号：US10124457

申请日：2002-04-18

申请人： Souichi Katagiri ,  Kan Yasui

发明人： Souichi Katagiri ,  Kan Yasui

IPC分类号： B24B100

CPC分类号： B24B53/017

摘要： With a time control means for a wetting treatment of a fixed abrasive platen provided, the fixed abrasive platen is set in a good wet state in advance prior to the start of polishing. The time control means may be incorporated in the body of a flattening/machining apparatus, or alternatively a wetting retaining mean may newly be separately provided instead. While the fixed abrasive platen is rapidly transformed through expansion due to wetting, the wetting treatment is desirably performed till a transformation ratio thereof is stabilized at 0.0005% or less.

公开(公告)号：US08373943B2

公开(公告)日：2013-02-12

申请号：US12941953

申请日：2010-11-08

申请人： Kan Yasui ,  Nobuo Yoshida ,  Katsuro Watanabe ,  Norihiro Okawa

发明人： Kan Yasui ,  Nobuo Yoshida ,  Katsuro Watanabe ,  Norihiro Okawa

IPC分类号： G11B5/127

CPC分类号： G11B5/398 ,  B82Y25/00 ,  G01R33/093 ,  G01R33/098 ,  G11B5/02 ,  G11B5/1278 ,  G11B5/3146 ,  G11B5/3163 ,  G11B5/3906 ,  G11B2005/0002 ,  G11B2005/0024 ,  H01F10/3254 ,  H01F10/3263 ,  H01F10/329

摘要： According to one embodiment, a method for producing a magnetic head includes depositing a first film above a substrate, etching a pattern into the first film, depositing a second film on the etched portion of the first film, and depositing a third film above the first and second film to form a multilayer magnetic film, wherein the second film is embedded between the first and third film in a portion of the first film that is removed. In another embodiment, a differential magnetic read head includes a magnetic multilayer film comprising a stack of a first magnetic sensor film and a second magnetic sensor film which are not magnetically connected and a hard magnetic film provided on both sides in a track width direction of the magnetic multilayer film for controlling a magnetic domain of the magnetic multilayer film. The hard magnetic film is a laminated structure as described above.

摘要翻译： 根据一个实施例，一种用于制造磁头的方法包括在基板上沉积第一膜，将图案蚀刻到第一膜中，在第一膜的蚀刻部分上沉积第二膜，以及在第一膜上沉积第三膜 和第二膜以形成多层磁性膜，其中第二膜在被去除的第一膜的一部分中嵌入第一和第三膜之间。 在另一个实施例中，差分磁读头包括磁性多层膜，该磁性多层膜包括不磁性连接的第一磁性传感器膜和第二磁性传感器膜的叠层，以及设置在第二磁性传感器膜的轨道宽度方向上的两侧的硬磁性膜 用于控制磁性多层膜的磁畴的磁性多层膜。 硬磁性膜是如上所述的层叠结构。

公开(公告)号：US08223464B2

公开(公告)日：2012-07-17

申请号：US12615221

申请日：2009-11-09

申请人： Kan Yasui ,  Masato Shiimoto ,  Takeshi Nakagawa ,  Hiroyuki Katada ,  Nobuo Yoshida ,  Hiroyuki Hoshiya

发明人： Kan Yasui ,  Masato Shiimoto ,  Takeshi Nakagawa ,  Hiroyuki Katada ,  Nobuo Yoshida ,  Hiroyuki Hoshiya

IPC分类号： G11B5/33 ,  G11B5/127

CPC分类号： G11B5/3163 ,  G11B5/398

摘要： In one embodiment, a differential-type magnetic read head includes a differential-type magneto-resistive-effect film formed on a substrate, and a pair of electrodes for applying current in a direction perpendicular to a film plane of the film. The film includes a first and second stacked film, each having a pinned layer, an intermediate layer, and a free layer, with the second stacked film being formed on the first stacked film. A side face in a track width direction of the film is shaped to have an inflection point at an intermediate position in a thickness direction of the film, and the side face is shaped to be approximately vertical to the substrate in an upward direction of the substrate from the inflection point. Also, the side face is shaped to be gradually increased in track width as approaching the substrate in a downward direction of the substrate from the inflection point.

摘要翻译： 在一个实施例中，差分型磁读头包括形成在基板上的差分型磁阻效应膜和用于在垂直于膜的膜平面的方向上施加电流的一对电极。 膜包括第一和第二堆叠膜，每个具有钉扎层，中间层和自由层，第二堆叠膜形成在第一堆叠膜上。 膜的轨道宽度方向的侧面成形为在膜的厚度方向上的中间位置具有拐点，并且侧面成形为在基板的上方大致垂直于基板 从拐点。 此外，侧面被成形为在从拐点向基板向下方向接近基板的轨迹宽度上逐渐增加。

公开(公告)号：US20110134564A1

公开(公告)日：2011-06-09

申请号：US12957229

申请日：2010-11-30

申请人： Nobuo Yoshida ,  Masato Shiimoto ,  Kenichi Akita ,  Kan Yasui

发明人： Nobuo Yoshida ,  Masato Shiimoto ,  Kenichi Akita ,  Kan Yasui

IPC分类号： G11B21/02 ,  G11B5/60 ,  G11B5/712

CPC分类号： H01L43/08 ,  B82Y25/00 ,  G01R33/093 ,  G01R33/098 ,  G11B5/3912 ,  G11B5/398

摘要： A magnetic head, according to one embodiment, includes a sensor film, a sensor cap film provided above the sensor film, a pair of shields including an upper magnetic shield and a lower magnetic shield which serve as electrodes that pass current in a film thickness direction of the sensor film, a track insulating film contacting both sides of the sensor film in the track width direction, a graded domain control film arranged on both sides in the track width direction of the sensor film adjacent the track insulating film, and an element height direction insulating film positioned on an opposite side of the sensor film relative to an air-bearing surface, wherein an edge position of the element height direction insulating film adjacent the sensor film on the air-bearing surface side is substantially the same as an edge position of the sensor cap film in the element height direction.

摘要翻译： 根据一个实施例的磁头包括传感器膜，设置在传感器膜上方的传感器盖膜，包括上磁屏蔽和下磁屏蔽的一对屏蔽件，其用作使电流在膜厚度方向上通过的电极 传感器膜的传感器膜的两侧接触的轨道绝缘膜，布置在邻近轨道绝缘膜的传感器膜的轨道宽度方向两侧的梯度控制膜和元件高度 相对于空气轴承表面定位在传感器膜的相对侧上的方向绝缘膜，其中与空气轴承表面侧相邻的传感器膜的元件高度方向绝缘膜的边缘位置与边缘位置基本相同 传感器盖膜在元件高度方向上。

公开(公告)号：US20110116184A1

公开(公告)日：2011-05-19

申请号：US12941953

申请日：2010-11-08

申请人： Kan Yasui ,  Nobuo Yoshida ,  Katsuro Watanabe ,  Norihiro Okawa

发明人： Kan Yasui ,  Nobuo Yoshida ,  Katsuro Watanabe ,  Norihiro Okawa

IPC分类号： G11B5/127 ,  G11B21/02 ,  G11B5/02

CPC分类号： G11B5/398 ,  B82Y25/00 ,  G01R33/093 ,  G01R33/098 ,  G11B5/02 ,  G11B5/1278 ,  G11B5/3146 ,  G11B5/3163 ,  G11B5/3906 ,  G11B2005/0002 ,  G11B2005/0024 ,  H01F10/3254 ,  H01F10/3263 ,  H01F10/329

摘要： According to one embodiment, a method for producing a magnetic head includes depositing a first film above a substrate, etching a pattern into the first film, depositing a second film on the etched portion of the first film, and depositing a third film above the first and second film to form a multilayer magnetic film, wherein the second film is embedded between the first and third film in a portion of the first film that is removed. In another embodiment, a differential magnetic read head includes a magnetic multilayer film comprising a stack of a first magnetic sensor film and a second magnetic sensor film which are not magnetically connected and a hard magnetic film provided on both sides in a track width direction of the magnetic multilayer film for controlling a magnetic domain of the magnetic multilayer film. The hard magnetic film is a laminated structure as described above.

摘要翻译： 根据一个实施例，一种用于制造磁头的方法包括在基板上沉积第一膜，将图案蚀刻到第一膜中，在第一膜的蚀刻部分上沉积第二膜，以及在第一膜上沉积第三膜 和第二膜以形成多层磁性膜，其中第二膜在被去除的第一膜的一部分中嵌入第一和第三膜之间。 在另一个实施例中，差分磁读头包括磁性多层膜，该磁性多层膜包括不磁性连接的第一磁性传感器膜和第二磁性传感器膜的叠层，以及设置在第二磁性传感器膜的轨道宽度方向上的两侧的硬磁性膜 用于控制磁性多层膜的磁畴的磁性多层膜。 硬磁性膜是如上所述的层叠结构。

公开(公告)号：US20100203697A1

公开(公告)日：2010-08-12

申请号：US12763402

申请日：2010-04-20

申请人： Digh HISAMOTO ,  Shin'ichiro Kimura ,  Daiske Okada ,  Kan Yasui

发明人： Digh HISAMOTO ,  Shin'ichiro Kimura ,  Daiske Okada ,  Kan Yasui

IPC分类号： H01L21/336

CPC分类号： H01L27/115 ,  G11C16/0425 ,  H01L21/28282 ,  H01L27/11568 ,  H01L29/792

摘要： An object of the present invention is to provide an integrated semiconductor nonvolatile storage device that can be read at high speed and reprogrammed an increased number of times.In the case of conventional nonvolatile semiconductor storage devices having a split-gate structure, there is a tradeoff between the read current and the maximum allowable number of reprogramming operations. To overcome this problem, an integrated semiconductor nonvolatile storage device of the present invention is configured such that memory cells having different memory gate lengths are integrated on the same chip. This allows the device to be read at high speed and reprogrammed an increased number of times.

摘要翻译： 本发明的目的是提供一种可以高速读取并重新编程次数增加的集成半导体非易失性存储装置。 在具有分割栅结构的常规非易失性半导体存储器件的情况下，读取电流和最大可允许重编程操作次数之间存在权衡。 为了克服这个问题，本发明的集成半导体非易失性存储装置被配置成使得具有不同存储器栅极长度的存储单元集成在同一芯片上。 这允许以高速读取设备并重新编程增加的次数。

公开(公告)号：US20070210371A1

公开(公告)日：2007-09-13

申请号：US11653832

申请日：2007-01-17

申请人： Digh Hisamoto ,  Kan Yasui ,  Shinichiro Kimura ,  Daisuke Okada

发明人： Digh Hisamoto ,  Kan Yasui ,  Shinichiro Kimura ,  Daisuke Okada

IPC分类号： H01L29/788

CPC分类号： H01L29/792 ,  H01L21/28282 ,  H01L27/115 ,  H01L27/11568 ,  H01L29/42344 ,  H01L29/66833

摘要： A memory cell includes a selective gate and a memory gate arranged on one side surface of the selective gate. The memory gate includes one part formed on one side surface of the selective gate and the other part electrically isolated from the selective gate and a p-well through an ONO layer formed below the memory gate. A sidewall-shaped silicon oxide is formed on side surfaces of the selective gate, and a sidewall-shaped silicon dioxide layer and a silicon dioxide layer are formed on side surfaces of the memory gate. The ONO layer formed below the memory gate is terminated below the silicon oxide, and prevents generation of a low breakdown voltage region in the silicon oxide near an end of the memory gate during deposition of the silicon dioxide layer.

摘要翻译： 存储单元包括布置在选择栅极的一个侧表面上的选择栅极和存储栅极。 存储器栅极包括形成在选择栅极的一个侧表面上的一个部分和与选择栅极电隔离的另一部分，以及通过形成在存储栅极下方的ONO层的p阱。 在选择栅极的侧面上形成侧壁状的氧化硅，在存储栅的侧面形成侧壁状的二氧化硅层和二氧化硅层。 形成在存储器栅下方的ONO层终止在氧化硅的下方，并且防止在沉积二氧化硅层期间在存储栅的端部附近的硅氧化物中产生低的击穿电压区域。

公开(公告)号：US07166013B2

公开(公告)日：2007-01-23

申请号：US11004991

申请日：2004-12-07

申请人： Shigeo Moriyama ,  Yoshihiro Ishida ,  Takashi Kugaya ,  Shigeo Ootsuki ,  Soichi Katagiri ,  Sadayuki Nishimura ,  Ryosei Kawai ,  Kan Yasui

发明人： Shigeo Moriyama ,  Yoshihiro Ishida ,  Takashi Kugaya ,  Shigeo Ootsuki ,  Soichi Katagiri ,  Sadayuki Nishimura ,  Ryosei Kawai ,  Kan Yasui

IPC分类号： B24B49/00 ,  B24B51/00 ,  B24B1/00 ,  B24B29/00

CPC分类号： B24B53/017 ,  B24B37/042 ,  B24B41/04 ,  B24B53/12

摘要： The present invention relates to a polishing apparatus, and a semiconductor manufacturing method using the apparatus. Dressing of a grindstone surface is ground by sizing processing whereby dressing of a tool surface can be done while preventing occurrence of cracks on the grindstone surface which is the cause for occurrence of scratches. Further, flatness of the surface of a dressing tool can be guaranteed because of sizing cutting-in; even if a thick grindstone of a few centimeters is used, the flatness can be maintained to the end; and processing with less in-face unevenness can be always carried out. Therefore, the life of the dressing tool can be greatly extended.Further, the present sizing-dressing is carried out jointly with processing of a wafer to thereby enable improvement of throughput of the apparatus as well as maintenance of a processing rate.The present apparatus and method are effective for planarization of various substrate surfaces having irregularities.

摘要翻译： 本发明涉及一种抛光装置以及使用该装置的半导体制造方法。 磨石表面的磨合通过施胶处理进行研磨，由此可以进行工具表面的修整，同时防止在磨石表面产生裂纹，这是产生划痕的原因。 此外，可以保证修整工具的表面的平整度，因为切割的尺寸大小; 即使使用了几厘米厚的砂轮，也可以保持平坦度， 并且可以总是执行具有较少的面内不均匀性的处理。 因此，修整工具的寿命可以大大延长。 此外，与晶片的处理联合进行本施胶修整，从而能够提高装置的生产量以及维持处理速度。 本装置和方法对于具有不规则性的各种衬底表面的平坦化是有效的。

公开(公告)号：US20060057940A1

公开(公告)日：2006-03-16

申请号：US11267306

申请日：2005-11-07

申请人： Shigeo Moriyama ,  Yoshihiro Ishida ,  Takashi Kugaya ,  Shigeo Ootsuki ,  Soichi Katagiri ,  Sadayuki Nishimura ,  Ryosei Kawai ,  Kan Yasui

发明人： Shigeo Moriyama ,  Yoshihiro Ishida ,  Takashi Kugaya ,  Shigeo Ootsuki ,  Soichi Katagiri ,  Sadayuki Nishimura ,  Ryosei Kawai ,  Kan Yasui

IPC分类号： B24B51/00 ,  B24B7/30 ,  B24B1/00 ,  B24B29/00 ,  B24B21/18

CPC分类号： B24B53/017 ,  B24B37/042 ,  B24B41/04 ,  B24B53/02 ,  B24B53/12

摘要： The present invention relates to a polishing apparatus, and a semiconductor manufacturing method using the apparatus. Dressing of a grindstone surface is ground by sizing processing whereby dressing of a tool surface can be done while preventing occurrence of cracks on the grindstone surface which is the cause for occurrence of scratches. Further, flatness of the surface of a dressing tool can be guaranteed because of sizing cutting-in; even if a thick grindstone of a few centimeters is used, the flatness can be maintained to the end; and processing with less in-face unevenness can be always carried out. Therefore, the life of the dressing tool can be greatly extended. Further, the present sizing-dressing is carried out jointly with processing of a wafer to thereby enable improvement of throughput of the apparatus as well as maintenance of a processing rate. The present apparatus and method are effective for planarization of various substrate surfaces having irregularities.