中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

59 records (took 0.018 seconds)

    LAYOUT PATTERN OF A STATIC RANDOM ACCESS MEMORY
    51.
    发明申请
    LAYOUT PATTERN OF A STATIC RANDOM ACCESS MEMORY 审中-公开

    公开(公告)号：US20200083232A1

    公开(公告)日：2020-03-12

    申请号：US16152423

    申请日：2018-10-05

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Chun-Hsien Huang ,  Ching-Cheng Lung ,  Yu-Tse Kuo ,  Shu-Ru Wang ,  Chun-Yen Tseng

    IPC: H01L27/11 ,  H01L27/02 ,  H01L29/08 ,  H01L29/78

    Abstract: A layout pattern of a static random access memory (SRAM) preferably includes a first inverter and a second inverter. Preferably, the first inverter includes a first gate structure extending along a first direction on a substrate, in which the first gate structure includes a gate of a first pull-up device (PL1) and a gate of a first pull-down device (PD1). The second inverter includes a second gate structure extending along the first direction on the substrate, in which the second gate structure includes a gate of a second pull-up device (PL2) and a gate of a second pull-down device (PD2) and the gate of the PD1 is directly under the gate of the PD2.

    STATIC RANDOM-ACCESS MEMORY (SRAM) CELL ARRAY
    55.
    发明申请
    STATIC RANDOM-ACCESS MEMORY (SRAM) CELL ARRAY 有权

    公开(公告)号：US20170317091A1

    公开(公告)日：2017-11-02

    申请号：US15635190

    申请日：2017-06-27

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Chun-Hsien Huang ,  Yu-Tse Kuo ,  Shu-Ru Wang

    IPC: H01L27/11 ,  H01L29/66 ,  H01L29/78

    CPC classification number: H01L29/6681 ,  H01L27/1104 ,  H01L27/1116 ,  H01L29/785

    Abstract: A static random-access memory (SRAM) cell array forming method includes the following steps. A plurality of fin structures are formed on a substrate, wherein the fin structures include a plurality of active fins and a plurality of dummy fins, each PG (pass-gate) FinFET shares at least one of the active fins with a PD (pull-down) FinFET, and at least one dummy fin is disposed between the two active fins having two adjacent pull-up FinFETs thereover in a static random-access memory cell. At least a part of the dummy fins are removed. The present invention also provides a static random-access memory (SRAM) cell array formed by said method.

    Static random access memory unit cell structure and static random access memory unit cell layout structure
    59.
    发明授权
    Static random access memory unit cell structure and static random access memory unit cell layout structure 有权
    静态随机存取单元单元格结构和静态随机存取单元布局结构

    公开(公告)号：US09196352B2

    公开(公告)日：2015-11-24

    申请号：US13776589

    申请日：2013-02-25

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Ching-Wen Hung ,  Po-Chao Tsao ,  Shu-Ru Wang ,  Chia-Wei Huang ,  Chieh-Te Chen ,  Feng-Yi Chang ,  Chih-Sen Huang

    IPC: H01L21/70 ,  G11C11/00 ,  G11C11/412 ,  H01L27/02 ,  H01L27/11

    CPC classification number: G11C11/412 ,  H01L27/0207 ,  H01L27/1104

    Abstract: A static random access memory unit cell layout structure is disclosed, in which a slot contact is disposed on one active area and another one across from the one. A static random access memory unit cell structure and a method of fabricating the same are also disclosed, in which, a slot contact is disposed on drains of a pull-up transistor and a pull-down transistor, and a metal-zero interconnect is disposed on the slot contact and a gate line of another pull-up transistor. Accordingly, there is not an intersection of vertical and horizontal metal-zero interconnects, and there is no place suffering from twice etching. Leakage junction due to stitch recess can be avoided.

    Abstract translation: 公开了一种静态随机存取存储器单元布局结构，其中，槽触点设置在一个有源区上，另一个位于一个有源区上。 还公开了一种静态随机存取存储单元单元结构及其制造方法，其中，在上拉晶体管和下拉晶体管的漏极上设置一个槽触点，并且设置金属零互连 在槽触点和另一个上拉晶体管的栅极线上。 因此，没有垂直和水平的金属零互连，没有两次蚀刻的地方。 可以避免缝合凹陷引起的泄漏接头。

Patent Agency Ranking