公开(公告)号：US06876076B2

公开(公告)日：2005-04-05

申请号：US10184027

申请日：2002-06-27

Applicant: Daniel Gloria ,  André Perrotin

Inventor： Daniel Gloria ,  André Perrotin

IPC: H01L23/528 ,  H01L23/66 ,  H01L23/34

CPC classification number: H01L23/66 ,  H01L23/5283 ,  H01L2223/6622 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A multilayer semiconductor device includes at least one structure for transmitting electrical signals, and in particular, microwave signals. The device includes at least one electrically conductive enclosure that includes a bottom plate and a top plate in two different layers. Lateral walls connect the bottom and top plates. Electrically conductive connecting strips extend into the enclosure and are in an intermediate layer, and are electrically insulated from the enclosure. The enclosure has at least one passage through which extends electrical connections of the connecting strips, which are also electrically insulated from the enclosure.

Abstract translation: 多层半导体器件包括用于传输电信号，特别是微波信号的至少一种结构。 该装置包括至少一个导电外壳，其包括底板和两个不同层中的顶板。 侧壁连接底板和顶板。 导电连接条延伸到外壳中并处于中间层，并与外壳电绝缘。 外壳具有至少一个通道，通过该通道延伸连接条的电连接，其也与外壳电绝缘。

公开(公告)号：US06852373B1

公开(公告)日：2005-02-08

申请号：US09786059

申请日：2000-07-03

Applicant: Pascale Motte ,  Joaquim Torres ,  Brigitte Descouts ,  Jean Palleau

Inventor： Pascale Motte ,  Joaquim Torres ,  Brigitte Descouts ,  Jean Palleau

IPC: C23C16/02 ,  C23C16/34 ,  H01L21/314 ,  H01L21/768 ,  C23C16/40

CPC classification number: H01L21/314 ,  C23C16/0245 ,  C23C16/345 ,  H01L21/3146 ,  H01L21/76801 ,  H01L21/76829

Abstract: A method for depositing a dielectric material on copper apparent on the surface of a structure, by placing the structure in a depositing chamber of CVD type (Chemical Vapor Deposition), adding to the chamber a first gas forming a precursor for the formation of the dielectric material and containing an element able to contaminate copper, adding to the chamber a second gas containing a chemical element intended, together with the element contained in the first gas and able to contaminate copper, to form said dielectric material, the second gas being able to react with the first gas to give the deposit of dielectric material, performing the deposit of dielectric material from the first gas and the second gas, characterized in that the method comprises a step for adding a third gas able to prevent the contamination of copper by said element contained in the first gas.

Abstract translation: 通过将结构放置在CVD型沉积室（化学气相沉积）中，将表面沉积在结构表面上的铜上沉积介电材料的方法，向室中加入形成用于形成电介质的前体的第一气体 材料并且含有能够污染铜的元素，将包含化学元素的第二气体与包含在第一气体中的元素一起并且能够污染铜以形成所述介电材料，第二气体能够 与第一气体反应以产生介电材料的沉积，执行从第一气体和第二气体沉积介电材料，其特征在于该方法包括添加能够防止铜污染的第三气体的步骤 元素包含在第一气体中。

公开(公告)号：US20050024952A1

公开(公告)日：2005-02-03

申请号：US10867381

申请日：2004-06-14

Applicant: Bruno Leconte ,  Paola Cavaleri ,  Sebastien Zink

Inventor： Bruno Leconte ,  Paola Cavaleri ,  Sebastien Zink

IPC: G11C16/10 ,  G11C7/00

CPC classification number: G11C16/10

Abstract: The present invention relates to a memory in integrated circuit comprising a central Flash-type memory comprising memory cells forming pages, a buffer memory capable of storing binary words, and a sequencer for executing an instruction for saving, in a target page of the Flash memory, a series of external words received at an input terminal of the memory. According to the present invention, the sequencer is arranged for, after saving the series of external words in the buffer memory, saving, in the buffer memory, internal words present in the target page and corresponding, due to their address in the page, to locations of words in the buffer memory that have not received any external words, then erasing the target page and saving in the erased page the words present in the buffer memory.

Abstract translation: 本发明涉及一种集成电路中的存储器，包括一个中央闪存型存储器，包括形成页面的存储单元，能够存储二进制字的缓冲存储器，以及用于执行用于保存在Flash存储器的目标页面中的指令的定序器 ，在存储器的输入端接收的一系列外部字。 根据本发明，定序器被设置为在将一系列外部字保存在缓冲存储器中之后，在缓冲存储器中保存存在于目标页面中并由于其在页面中的地址而对应的内部单词到 在缓冲存储器中没有接收到任何外部字的单词的位置，然后擦除目标页面并保存在擦除页面中存在于缓冲存储器中的单词。

公开(公告)号：US20050006772A1

公开(公告)日：2005-01-13

申请号：US10839770

申请日：2004-05-05

Applicant: Michel Vallet

Inventor： Michel Vallet

IPC: H01L23/528 ,  H01L23/544 ,  H01L23/52

CPC classification number: H01L23/544 ,  H01L23/528 ,  H01L2223/5442 ,  H01L2223/54453 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An integrated circuit is provided that includes at least one metallization level having a plurality of dummy conductors. At least one of the dummy conductors has an oriented shape made up of a plurality of non-parallel rectangles in mutual contact. In one embodiment, the at least one dummy conductor is in the form of an “L”. In another embodiment, the at least one dummy conductor is in the form of a Latin cross. In yet another embodiment, the at least one dummy conductor is in the form of a “T”.

Abstract translation: 提供一种集成电路，其包括具有多个虚拟导体的至少一个金属化层。 虚拟导体中的至少一个具有由相互接触的多个非平行矩形构成的定向形状。 在一个实施例中，至少一个虚拟导体是“L”的形式。 在另一个实施例中，至少一个虚拟导体是拉丁十字的形式。 在另一个实施例中，至少一个虚拟导体是“T”的形式。

公开(公告)号：US06842525B1

公开(公告)日：2005-01-11

申请号：US09491953

申请日：2000-01-26

Applicant: Pascal Mellot

Inventor： Pascal Mellot

IPC: H03F3/45 ,  H04R3/00

CPC classification number: H03F3/45479 ,  H03F2200/294 ,  H03F2200/372 ,  H04R3/007

Abstract: An amplification circuit is provided for the signal output from a microphone in which the signal is amplified by a differential structure amplifier. The circuit includes the pull-up voltage, which initializes the operating state of the microphone, being coupled to a first input of the differential structure amplifier and to a second input of the differential structure amplifier through a pull-up resistor.

Abstract translation: 为麦克风输出的信号提供放大电路，其中信号由差分结构放大器放大。 电路包括上拉电压，其初始化麦克风的操作状态，耦合到差分结构放大器的第一输入端，并通过上拉电阻器连接到差分结构放大器的第二输入端。

公开(公告)号：US20050001698A1

公开(公告)日：2005-01-06

申请号：US10815472

申请日：2004-04-01

Applicant: Guillaume Bouche ,  Nick Smears ,  Pascal Ancey ,  Gregory Caruyer

Inventor： Guillaume Bouche ,  Nick Smears ,  Pascal Ancey ,  Gregory Caruyer

IPC: H01L27/20 ,  H03H9/15 ,  H03H9/58

CPC classification number: H03H9/586 ,  H03H2003/0428 ,  H03H2003/0435 ,  H03H2003/0471

Abstract: An electronic component (1) includes a substrate (2) and at least two piezoelectric resonators (3, 4) each having an active element (6, 9), a lower electrode (5, 8) and an upper electrode (7, 10). The lower electrode (5) of the first resonator (3) is made of a material that is different from that of the lower electrode (8) of the second resonator (4) such that the resonators exhibit different resonance frequencies.

Abstract translation: 电子部件（1）包括基板（2）和至少两个各自具有有源元件（6,9），下电极（5,8）和上电极（7,10）的压电谐振器（3,4） ）。 第一谐振器（3）的下电极（5）由不同于第二谐振器（4）的下电极（8）的材料制成，使得谐振器表现出不同的谐振频率。

公开(公告)号：US20040256699A1

公开(公告)日：2004-12-23

申请号：US10815473

申请日：2004-04-01

Applicant: STMICROELECTRONICS SA

Inventor： Vincent Cosnier ,  Yves Morand ,  Olivier Kermarrec ,  Daniel Bensahel ,  Yves Campidelli

IPC: H01L021/336 ,  H01L031/117

CPC classification number: H01L21/28185 ,  H01L21/2807 ,  H01L21/28194 ,  H01L29/4925 ,  H01L29/51 ,  H01L29/517

Abstract: A process and a device for fabricating a semiconductor device having a gate dielectric made of high-k material, includes a step of depositing, directly on the gate dielectric, a first layer of Si1-xGex, where 0.5

Abstract translation: 用于制造具有由高k材料制成的栅极电介质的半导体器件的工艺和器件包括直接在栅极电介质上沉积第一层Si1-xGex的步骤，其中0.5

公开(公告)号：US20040233937A1

公开(公告)日：2004-11-25

申请号：US10826969

申请日：2004-03-31

Applicant: STMicroelectronics SA

Inventor： Ludovic Ruat ,  Paul Kinowski ,  Alexander Czajor

IPC: G11C008/00

CPC classification number: G06F13/385

Abstract: An asynchronous data transmission device includes a data reception terminal receiving data clocked by a sampling signal in synchronization with a local clock signal. A register is connected to the data reception terminal for receiving the data. A clock deviation measuring circuit is connected to the register for determining a number M of periods of the sampling signal appearing during K periods of a synchronization signal received on the data reception terminal, and for comparing the number M to a tolerance margin defined by a lower threshold and an upper threshold.

Abstract translation: 异步数据传输装置包括数据接收终端，与本地时钟信号同步地接收由采样信号计时的数据。 寄存器连接到数据接收终端，用于接收数据。 时钟偏差测量电路连接到寄存器，用于确定在数据接收终端接收到的同步信号的K个周期期间出现的采样信号的周期数M，并将数M与由较低的 阈值和上限阈值。

公开(公告)号：US20040223578A1

公开(公告)日：2004-11-11

申请号：US10841705

申请日：2004-05-07

Applicant: STMICROELECTRONICS SA

Inventor： Jean-Pierre Lagarde

IPC: H03D003/24

CPC classification number: H03L7/0994

Abstract: A circuit is provided for clock recovery from a specified datastream. The circuit includes a reference extraction unit for extracting from the datastream time references defining a reference time base, and a digital Phase Locked Loop coupled to the reference extraction unit. The digital Phase Locked Loop includes a first programmable counter in the guise of a digitally controlled oscillator for overseeing an output time base, a second programmable counter in the guise of a loop divider for overseeing a loop time base, and a dedicated processor capable of executing a program. The program includes a first software module in the guise of a phase comparator for comparing values of the loop time base and the reference time base and generating a loop error; and a second software module in the guise of a loop filter for producing an adaptation value of an increment value of the first programmable counter from the loop error. Also provided are a user terminal for an interactive telebroadcasting system that includes at least one such circuit for clock recovery, and a method for clock recovery from a specified datastream.

Abstract translation: 提供电路用于从指定的数据流中恢复时钟。 该电路包括一个参考提取单元，用于从数据流中提取定义参考时基的时间参考，以及耦合到参考提取单元的数字锁相环。 数字锁相环包括用于监视输出时基的数字控制振荡器的伪装的第一可编程计数器，用于监视环路时基的循环分配器的伪装的第二可编程计数器和能够执行的专用处理器 一个程序。 该程序包括一个相位比较器的伪装的第一软件模块，用于比较环路时基和参考时基的值并产生一个循环误差; 以及环路滤波器的伪装的第二软件模块，用于从循环误差产生第一可编程计数器的增量值的自适应值。 还提供了一种用于交互式电传广播系统的用户终端，其包括用于时钟恢复的至少一个这样的电路以及用于从指定数据流进行时钟恢复的方法。

公开(公告)号：US20040222703A1

公开(公告)日：2004-11-11

申请号：US10817629

申请日：2004-04-01

Applicant: STMicroelectronics SA

Inventor： Philippe Bienvenu ,  Sandra Mattei

IPC: H01H001/50

CPC classification number: H02H11/003 ,  H02H1/04 ,  Y10T307/931

Abstract: A device for protecting a circuit against a polarity reversal of a connection to a D.C. power supply, comprising a controllable switch interposed on said connection between a first terminal of a first voltage of the D.C. power supply and a first terminal of the circuit, and first means for turning-off with a delay the switch in the presence of a reverse polarity.

Abstract translation: 一种用于保护电路免受与直流电源的连接的极性反转的装置，包括插在所述连接上的可控开关，所述连接在所述直流电源的第一电压的第一端和所述电路的第一端之间， 用于在反向极性存在的情况下延迟关断开关的装置。