公开(公告)号：US4871691A

公开(公告)日：1989-10-03

申请号：US269754

申请日：1988-11-08

申请人： Joaquim Torres ,  Roland Madar ,  Claude Bernard ,  Jean-Francois Million-Brodaz

发明人： Joaquim Torres ,  Roland Madar ,  Claude Bernard ,  Jean-Francois Million-Brodaz

IPC分类号： C23C16/42 ,  H01L21/285 ,  H01L21/768

CPC分类号： C23C16/42 ,  H01L21/28518 ,  H01L21/76879 ,  Y10S148/147

摘要： A selective deposition process of a refractory metal silicide onto the silicon apparent surfaces of a wafer partially coated with SiO.sub.2, comprising the following steps: flowing in a cold-wall airtight chamber comprising said wafer a gaseous silane composite at a partial pressure P.sub.Si.sbsb.x.sub.H.sbsb.y and an halogenide of said metal at a partial pressure P.sub.Me ; heating the wafer to a first temperature (T1) for a first duration (t1), P.sub.Si.sbsb.x.sub.H.sbsb.y and P.sub.Me being chosen so as to allow a metal silicide deposition to be formed on the wafer, the silicon being overstoichiometric; and, heating the wafer to a second temperature (T2) lower than the first one for a second duration (t2), T2 being chosen as a function of P.sub.Si.sbsb.x.sub.H.sbsb.y and P.sub.Me so as to allow a stoichiometric metal silicide deposition to be formed on the wafer.

摘要翻译： 将难熔金属硅化物选择性地沉积到部分涂覆有SiO 2的晶片的硅表观表面上，包括以下步骤：在分压PSixHy和卤化物的气体硅烷复合材料中将包含所述晶片的冷壁气密室流动 的所述金属在分压PMe下; 将晶片加热到第一温度（T1）持续第一持续时间（t1），选择PSixHy和PMe以便在晶片上形成金属硅化物沉积，硅是过度化学计量的; 并且将晶片加热到低于第一温度（T2）的第二温度（T2）持续第二持续时间（t2），选择T2作为PSixHy和PMe的函数，以便允许在晶片上形成化学计量的金属硅化物沉积 。

公开(公告)号：US06617665B2

公开(公告)日：2003-09-09

申请号：US10125162

申请日：2002-04-18

申请人： Alexis Farcy ,  Vincent Arnal ,  Joaquim Torres

发明人： Alexis Farcy ,  Vincent Arnal ,  Joaquim Torres

IPC分类号： H01L27108

CPC分类号： H01P3/088 ,  H01F17/0006 ,  H01F41/041 ,  H01L27/08 ,  H01L28/10 ,  H01Q1/36 ,  H01Q11/08 ,  H01Q13/20

摘要： An inductance formed in an integrated circuit chip, formed of a plurality of parallel conductive lines, of optimized width, each conductive line being formed in the thickness of at least one insulating layer, these lines being interconnected by at least one perpendicular conductive segment.

公开(公告)号：US06451669B2

公开(公告)日：2002-09-17

申请号：US09742891

申请日：2000-12-20

申请人： Joaquim Torres ,  Philippe Gayet ,  Michel Haond

发明人： Joaquim Torres ,  Philippe Gayet ,  Michel Haond

IPC分类号： H01L2176

CPC分类号： H01L21/7682 ,  H01L21/31695 ,  H01L23/5222 ,  H01L2924/0002 ,  H01L2924/00

摘要： One embodiment of the invention is directed to a method of forming a metallization level of an integrated circuit including the steps of forming metal areas of a metallization level laterally separated by a first insulating layer, removing the first insulating layer, non-conformally depositing a second insulating layer so that gaps can form between neighboring metal areas, or to obtain a porous layer. The removal of the first insulating layer is performed through a mask, to leave in place guard areas of the first insulating layer around the portions of the metal areas intended for being contacted by a via crossing the second insulating layer.

摘要翻译： 本发明的一个实施方案涉及一种形成集成电路的金属化水平的方法，包括以下步骤：形成由第一绝缘层横向隔开的金属化水平的金属区域，去除第一绝缘层，非保形地沉积第二绝缘层 绝缘层，使得可以在相邻金属区域之间形成间隙，或者获得多孔层。 第一绝缘层的去除是通过掩模进行的，留下第一绝缘层的保护区域围绕金属区域的部分，以便与穿过第二绝缘层的通孔接触。

公开(公告)号：US5075251A

公开(公告)日：1991-12-24

申请号：US404529

申请日：1989-09-08

申请人： Joaquim Torres ,  Jean Palleau ,  Noureddine Bourhila

发明人： Joaquim Torres ,  Jean Palleau ,  Noureddine Bourhila

IPC分类号： H01L21/28 ,  H01L21/285

CPC分类号： H01L21/28052 ,  H01L21/28518 ,  Y10S148/019 ,  Y10S148/147

摘要： A process for forming tungsten or molybdenum silicide on silicon apparent regions (6) of a silicon wafer surface (1) also comprising oxidized regions (2) includes the steps consisting in uniformly coating the wafer with a tungsten or molybdenum layer (10) and annealing at a temperature ranging from 700.degree. C. to 1000.degree. C. The annealing step is carried out in presence of a low pressure gas forming a chemical composite with tungsten or molybdenum. The composite is then selectively etched.

摘要翻译： 还包括氧化区域（2）的硅晶片表面（1）的硅表观区域（6）上形成钨或钼硅化物的方法包括以下步骤：用钨或钼层（10）均匀地涂覆晶片和退火 在700℃至1000℃的温度下进行。退火步骤在形成与钨或钼的化学复合物的低压气体存在下进行。 然后选择性地蚀刻复合材料。

公开(公告)号：US06949444B2

公开(公告)日：2005-09-27

申请号：US10117782

申请日：2002-04-05

申请人： Joaquim Torres ,  Vincent Arnal ,  Alexis Farcy

发明人： Joaquim Torres ,  Vincent Arnal ,  Alexis Farcy

IPC分类号： H01L21/3205 ,  H01L23/522 ,  H01L21/76

CPC分类号： H01L23/522 ,  H01L21/32051 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for forming at least one conductive line intended to receive high-frequency or high-value currents, formed above a given portion of a solid substrate outside of which are formed other elements, including the steps of digging at least one trench in the solid substrate; forming an insulating area in the trench; and forming said conductive line above the insulating area.

摘要翻译： 一种用于形成用于接收高频或高电流电流的至少一条导线的方法，其形成在固体衬底的给定部分之上，其外部形成其它元件，包括以下步骤：在固体中挖掘至少一个沟槽 基质; 在沟槽中形成绝缘区域; 以及在所述绝缘区域上方形成所述导电线。

公开(公告)号：US06852373B1

公开(公告)日：2005-02-08

申请号：US09786059

申请日：2000-07-03

申请人： Pascale Motte ,  Joaquim Torres ,  Brigitte Descouts ,  Jean Palleau

发明人： Pascale Motte ,  Joaquim Torres ,  Brigitte Descouts ,  Jean Palleau

IPC分类号： C23C16/02 ,  C23C16/34 ,  H01L21/314 ,  H01L21/768 ,  C23C16/40

CPC分类号： H01L21/314 ,  C23C16/0245 ,  C23C16/345 ,  H01L21/3146 ,  H01L21/76801 ,  H01L21/76829

摘要： A method for depositing a dielectric material on copper apparent on the surface of a structure, by placing the structure in a depositing chamber of CVD type (Chemical Vapor Deposition), adding to the chamber a first gas forming a precursor for the formation of the dielectric material and containing an element able to contaminate copper, adding to the chamber a second gas containing a chemical element intended, together with the element contained in the first gas and able to contaminate copper, to form said dielectric material, the second gas being able to react with the first gas to give the deposit of dielectric material, performing the deposit of dielectric material from the first gas and the second gas, characterized in that the method comprises a step for adding a third gas able to prevent the contamination of copper by said element contained in the first gas.

摘要翻译： 通过将结构放置在CVD型沉积室（化学气相沉积）中，将表面沉积在结构表面上的铜上沉积介电材料的方法，向室中加入形成用于形成电介质的前体的第一气体 材料并且含有能够污染铜的元素，将包含化学元素的第二气体与包含在第一气体中的元素一起并且能够污染铜以形成所述介电材料，第二气体能够 与第一气体反应以产生介电材料的沉积，执行从第一气体和第二气体沉积介电材料，其特征在于该方法包括添加能够防止铜污染的第三气体的步骤 元素包含在第一气体中。

公开(公告)号：US06706589B2

公开(公告)日：2004-03-16

申请号：US09932468

申请日：2001-08-17

申请人： Vincent Arnal ,  Joaquim Torres

发明人： Vincent Arnal ,  Joaquim Torres

IPC分类号： H01L218242

CPC分类号： H01L28/55 ,  H01L23/5222 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for forming a capacitor with metal armatures in metallization levels above an integrated circuit, including the steps of: depositing over the surface of an integrated circuit an insulating layer having a thickness ranging between 0.5 and 1.5 &mgr;m; digging into the insulating layer to form trenches, of which at least a portion in top view is parallel and separate from one trench to the other; depositing and leveling a metallic material to form conductive lines in the trenches; locally removing the insulating layer to remove it at least from all the intervals separating two conductive lines; conformally depositing a dielectric; and depositing and etching a second metallic material to at least completely fill the intervals between lines.

摘要翻译： 一种用于在集成电路上方的金属化水平形成具有金属电枢的电容器的方法，包括以下步骤：在集成电路的表面上沉积厚度范围在0.5和1.5μm之间的绝缘层; 挖入绝缘层以形成沟槽，其顶视图中的至少一部分平行并且从一个沟槽分离到另一个沟槽; 沉积和调平金属材料以在沟槽中形成导电线; 至少从分离两条导线的所有间隔，局部去除绝缘层以去除绝缘层; 保形地沉积电介质; 以及沉积和蚀刻第二金属材料以至少完全填充线之间的间隔。

公开(公告)号：US5234539A

公开(公告)日：1993-08-10

申请号：US944732

申请日：1992-09-14

申请人： Andre Schiltz ,  Jean Palleau ,  Joaquim Torres

发明人： Andre Schiltz ,  Jean Palleau ,  Joaquim Torres

IPC分类号： H01L21/027 ,  H01L21/768 ,  H05K3/02 ,  H05K3/04 ,  H05K3/40

CPC分类号： H01L21/7688 ,  H01L21/0272 ,  H05K3/02 ,  H05K3/048 ,  H05K3/4076

摘要： A lift-off process for removing a portion of a metal layer (4). The metal layer is formed on a dielectric polymer substrate with interposition of a corresponding portion of an intermediate layer (2). This process comprises the steps of selecting the material of the intermediate layer so that its interface with the metal has a low adhesivity; applying to the structure a mechanical stress causing detachment of the metal at the interface; and chemically removing the intermediate layer.

摘要翻译： 用于去除金属层（4）的一部分的剥离工艺。 金属层形成在具有中间层（2）的相应部分的介电聚合物基板上。 该方法包括选择中间层的材料以使其与金属的界面具有低粘合性的步骤; 向结构施加导致金属在界面处分离的机械应力; 并化学去除中间层。