摘要:
A method of fabricating a MOS transistor by millisecond annealing. A semiconductor substrate with a gate stack comprising a gate electrode overlying a gate dielectric layer on a top surface of a semiconductor substrate is provided. At least one implanting process is performed to form two doped regions on opposite sides of the gate electrode. Millisecond annealing activates dopants in the doped regions. The millisecond anneal includes rapid heating and rapid cooling within 1 to 50 milliseconds.
摘要:
A method to detect the movement of an image sensor according to captured images. An image region is captured from a first image. Then, a first corresponding region matching the first region is captured from a second image. A second image region is captured from the second image. Then, a second corresponding region matching the second captured image region is captured from the first image. Finally, the movement of the image sensor is determined according to the first region and the first corresponding region when a first relative distance between the first region and the first corresponding region is the same as a second relative distance of the second captured image region and the second corresponding region, but in the opposite direction.
摘要:
A method for controlling well capacity of a photodiode includes providing a reference voltage, which is greater than a voltage of ground, to a gate of a transfer transistor while exposing the photodiode whose one end is connected to ground, so as to control the well capacity of the photodiode.
摘要:
A pinned photodiode sensor with gate-controlled SCR switch includes a pinned photodiode and a gate-controlled SCR switch. The SCR switch includes a P-type substrate, an N− doped region, and an N+ doped region formed on the substrate; a P+ doped region formed on the N− doped region; an oxide layer formed on the P substrate, the N− doped region, the N+ doped region, and the P+ doped region; and a gate formed above the P substrate and the N− doped region. The gate includes a P+ doped region and an N+ doped region. During an exposure procedure, a depletion region will not reach the interface between the oxide layer and the substrate, thereby preventing dark current leakage.
摘要:
An active pixel sensor includes a photosensitive element, and first and second transistors. The photosensitive element generates an electrical signal in response to detected light, and updates the electrical signal in response to a reset signal. The first transistor is coupled electrically to the photosensitive element, and amplifies the electrical signal to result in an output signal. The second transistor is coupled electrically to the first transistor, and is responsive to a row select signal for controlling output of the output signal. An image sensing module built from active pixel sensors is also disclosed.
摘要:
An optical apparatus. The optical apparatus is applied to an object surface, comprising a frame, a light emitting device and an optical sensor. The frame is disposed in the optical apparatus, having a first compartment and a second compartment, wherein the first compartment has a first opening and the second compartment has a second opening. The light emitting device is disposed in the first compartment, wherein light emitted from the light emitting device passes through the first opening and is reflected by the object surface outside the frame. The optical sensor is disposed in the second compartment to receive light reflected from the object surface passing through the second opening.
摘要:
A test key for validating the position of a word line structure overlaying a deep trench capacitor of a DRAM. The test key is deposited in the scribe line region of a wafer. The deep trench capacitor is deposited in the scribe line region and has a buried plate. A rectangular word line is deposited in the scribe line and covers a portion of the deep trench capacitor, and two passing word lines are deposited above the deep trench. A first doping region and a second doping region are deposited between the rectangular word line and the first passing word line and between the rectangular word line and the second passing word line respectively. A first plug, a second plug and a third plugs are coupled to the first doping region, the second doping region and the buried plate respectively.
摘要:
A test device and method for detecting alignment of active areas and memory cell structures in DRAM devices with vertical transistors. In the test device, parallel first and second memory cell structures disposed in the scribe line region, each has a deep trench capacitor and a transistor structure. An active area is disposed between the first and second memory cell structures. The active area overlaps the first and second memory cell structures by a predetermined width. First and second conductive pads are disposed on both ends of the first memory cell structures respectively, and third and fourth conductive pads are disposed on both ends of the first memory cell structures respectively.
摘要:
An optical navigation chip. The optical navigation chip is appropriate for an optical pointing device and used for calculating a displacement of the optical navigation chip relative to an operating surface. The optical navigation chip comprises a photo sensor array driven by a photo sensor control circuit for detecting an image of the operating surface, a signal readout circuit coupled with the photo sensor array for reading out the image in analog format, an analog-to-digital conversion (ADC) circuit coupled with the signal readout circuit for converting the image from analog format to digital format, an image qualification circuit coupled with the ADC circuit for determining quality of the image and outputting a quality index accordingly, and a motion detection circuit for outputting the displacement according to the quality index.
摘要:
A test device and method for detecting alignment of deep trench capacitors and active areas in DRAM devices. A quadrilateral active area is disposed in the scribe line region, with four equilaterals and four vertex angles. Parallel first and second deep trench capacitors are disposed in the quadrilateral active area. The first deep trench capacitor has a first surface aligned with a second surface of the second deep trench capacitor. The first and second vertex angles of the four vertex angles have a diagonal line essentially perpendicular to the first and second surfaces. The first and second vertex angles are a predetermined distance from the first surface and the second surface respectively.