公开(公告)号：US07579685B2

公开(公告)日：2009-08-25

申请号：US11339500

申请日：2006-01-26

Applicant: Moon-chul Lee ,  Woon-bae Kim ,  Kae-dong Back ,  Qian Wang ,  Jun-sik Hwang ,  Kyu-dong Jung

Inventor： Moon-chul Lee ,  Woon-bae Kim ,  Kae-dong Back ,  Qian Wang ,  Jun-sik Hwang ,  Kyu-dong Jung

IPC: H01L23/12 ,  H01L23/043

CPC classification number: B81C1/00301 ,  B81B2207/095 ,  H01L21/76898 ,  H01L23/04 ,  H01L23/10 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A wafer level packaging cap and method thereof for a wafer level packaging are provided. The wafer level packaging cap covering a device wafer with a device thereon, includes a cap wafer having on a bottom surface a cavity providing a space for receiving the device, and integrally combined with the device wafer, a plurality of metal lines formed on the bottom surface of the cap wafer to correspond to a plurality of device pads formed on the device wafer to be electrically connected to the device, a plurality of buffer portions connected to the plurality of metal lines and comprising a buffer wafer with a plurality of grooves and a metal filled in the plurality of grooves, a plurality of connection rods electrically connected to the plurality of buffer portions and penetrating the cap wafer from a top portion of the buffer portion, and a plurality of cap pads formed on a top surface of the cap wafer and electrically connected to a plurality of connection rods.

Abstract translation: 提供了一种用于晶片级封装的晶片级封装盖及其方法。 覆盖其上具有器件的器件晶片的晶片级封装盖包括盖晶片，其在底表面上具有提供用于接收器件的空间并与器件晶片整体结合的空腔，形成在底部的多个金属线 盖片晶片的表面对应于形成在器件晶片上以电连接到器件的多个器件焊盘，多个缓冲部分连接到多个金属线并且包括具有多个沟槽的缓冲晶片和 填充在所述多个槽中的金属，多个连接杆，电连接到所述多个缓冲部分，并且从所述缓冲部分的顶部穿透所述盖片;以及形成在所述盖片的顶表面上的多个帽垫 并且电连接到多个连接杆。

公开(公告)号：US20080297564A1

公开(公告)日：2008-12-04

申请号：US11935539

申请日：2007-11-06

Applicant: Yong-won Jeong ,  Hyung Choi ,  Yong-seop Yoon ,  Moon-chul Lee ,  Dong-sik Shim

Inventor： Yong-won Jeong ,  Hyung Choi ,  Yong-seop Yoon ,  Moon-chul Lee ,  Dong-sik Shim

IPC: B41J2/14 ,  B41J2/04

CPC classification number: B41J2/17563 ,  B41J2/1404 ,  B41J2/14145 ,  B41J2002/14403

Abstract: An inkjet printhead includes a substrate in which an ink feed hole is formed, a plurality of ejection devices formed on the substrate at sides of the ink feed hole, a chamber layer stacked on the substrate and in which a plurality of ink chambers, which correspond to the ejection devices and in which ink supplied from the ink feed hole is filled, are formed, and a nozzle layer in which a plurality of nozzles corresponding to the ink chambers are formed, wherein the ink feed hole includes a plurality of through holes formed through the substrate in the thickness direction thereof.

Abstract translation: 喷墨打印头包括其中形成有供墨孔的基板，在供墨孔的侧面形成在基板上的多个喷射装置，堆叠在基板上的室层，其中对应于多个墨室 形成喷墨装置并且从供墨孔供应的油墨被填充，并且形成有与油墨室相对应的多个喷嘴的喷嘴层，其中所述供墨孔包括形成的多个通孔 通过基板的厚度方向。

公开(公告)号：US20080283495A1

公开(公告)日：2008-11-20

申请号：US12058946

申请日：2008-03-31

Applicant: Il Woo KIM ,  Byung Ha Park ,  Moon Chul Lee ,  Dong Sik Shim ,  Kyong Il Kim

Inventor： Il Woo KIM ,  Byung Ha Park ,  Moon Chul Lee ,  Dong Sik Shim ,  Kyong Il Kim

IPC: C23F1/00 ,  B41J2/015

CPC classification number: B41J2/1601 ,  B33Y80/00 ,  B41J2/1628 ,  B41J2/1631 ,  B41J2/1632 ,  B41J2/1639

Abstract: A MEMS (Micro Electro Mechanical System) device and a method of manufacturing the same, in which an detection indicator is formed on a chamber layer stacked on a substrate such that a user easily inspects whether the chamber layer has a required thickness. The MEMS device can include two detection indicators that are formed on the chamber layer and have different depth from each other, or an detection indicator which is formed on the chamber layer and has a tapered sectional shape in which an upper surface of the detection indicator is gradually narrowed in a downward direction such that a user can easily inspect whether the chamber layer has a required thickness. The user can precisely determine whether the chamber layer is planarized to a required thickness by planarizing the detection indicator formed on the chamber layer, and inspecting the detection indicator by using an optical microscope, thereby facilitating inspection for a thickness of the chamber layer.

Abstract translation: 一种MEMS（微机电系统）装置及其制造方法，其中在层叠在基板上的室层上形成检测指示器，使得用户容易地检查室层是否具有所需的厚度。 MEMS器件可以包括形成在室层上并具有彼此不同深度的两个检测指示器，或者形成在腔室层上并具有锥形截面形状的检测指示器，其中检测指示器的上表面是 在向下的方向上逐渐变窄，使得使用者可以容易地检查腔室层是否具有所需的厚度。 用户可以通过平坦化形成在室层上的检测指示器，并且通过使用光学显微镜检查检测指示器来精确地确定室层是否被平坦化到所需厚度，从而便于检查室层的厚度。

公开(公告)号：US07432781B2

公开(公告)日：2008-10-07

申请号：US11392624

申请日：2006-03-30

Applicant: Sang-chul Sul ,  Duck-hwan Kim ,  Chul-soo Kim ,  In-sang Song ,  Moon-chul Lee ,  Kyu-dong Jung ,  Jea-shik Shin

Inventor： Sang-chul Sul ,  Duck-hwan Kim ,  Chul-soo Kim ,  In-sang Song ,  Moon-chul Lee ,  Kyu-dong Jung ,  Jea-shik Shin

IPC: H03H7/46

CPC classification number: H03H3/02 ,  H03H9/0571 ,  H03H9/706

Abstract: A monolithic duplexer and a fabrication method thereof. The monolithic duplexer includes a device wafer, a plurality of elements distanced from each other on a top portion of a device wafer, first sealing parts formed on the top portion of the device wafer, and a plurality of first ground planes formed between the plurality of elements. A cap wafer is also provided having an etched area for packaging the device wafer, a plurality of protrusion parts, a plurality of ground posts, and cavities. Second sealing parts are formed on a bottom portion of the protrusion parts, and a plurality of second ground planes cover the plurality of ground posts. Via holes vertically penetrate the cap wafer to connect to the plurality of the second ground planes, and ground terminals are formed on top portions of the via holes. The first sealing parts and the first ground planes are attached to the second sealing parts and the second ground planes, respectively.

Abstract translation: 一种单片双工器及其制造方法。 单片双工器包括器件晶片，在器件晶片的顶部彼此远离的多个元件，形成在器件晶片的顶部上的第一密封部分和形成在器件晶片的顶部之间的多个第一接地平面 元素。 还提供了盖晶片，其具有用于封装器件晶片，多个突出部分，多个接地柱和空腔的蚀刻区域。 第二密封部分形成在突出部分的底部上，并且多个第二接地平面覆盖多个接地柱。 通孔垂直穿过盖晶片以连接到多个第二接地平面，并且接地端子形成在通孔的顶部上。 第一密封部分和第一接地平面分别附接到第二密封部分和第二接地平面。

公开(公告)号：US07408257B2

公开(公告)日：2008-08-05

申请号：US11390220

申请日：2006-03-28

Applicant: Kyu-dong Jung ,  Woon-bae Kim ,  In-sang Song ,  Moon-chul Lee ,  Jun-sik Hwang ,  Suk-jin Ham

Inventor： Kyu-dong Jung ,  Woon-bae Kim ,  In-sang Song ,  Moon-chul Lee ,  Jun-sik Hwang ,  Suk-jin Ham

IPC: H01L23/04

CPC classification number: H01L23/055 ,  H01L23/04 ,  H01L27/14618 ,  H01L2224/16

Abstract: A packaging chip in which a circuit module is packaged and a method of packaging a circuit module are provided. The packaging chip includes a base wafer; a circuit module on the base wafer; a packaging wafer having a cavity and combined with the base wafer so that the circuit module fits inside the cavity; a connecting electrode connecting upper and lower surfaces of the cavity; and a seed layer between the connecting electrode and the packaging wafer. The method includes etching a lower surface of the packaging wafer to form a cavity, stacking a metal layer in an area of the lower surface, combining the base wafer with the packaging wafer, polishing the packaging wafer, forming a viahole through the packaging wafer, stacking a seed layer on the packaging wafer, plating the inside of the viahole, removing the seed layer and forming an electrode.

Abstract translation: 提供电路模块封装的封装芯片和封装电路模块的方法。 包装芯片包括基底晶片; 基底晶片上的电路模块; 封装晶片，其具有空腔并与所述基底晶片组合，使得所述电路模块装配在所述腔内; 连接所述空腔的上表面和下表面的连接电极; 以及连接电极和封装晶片之间的晶种层。 该方法包括蚀刻封装晶片的下表面以形成空腔，在下表面的区域中堆叠金属层，将基底晶片与封装晶片组合，抛光封装晶片，通过封装晶片形成通孔， 将种子层堆叠在包装晶片上，电镀通孔内部，去除种子层并形成电极。

公开(公告)号：US20080122899A1

公开(公告)日：2008-05-29

申请号：US11778289

申请日：2007-07-16

Applicant: Moon-chul LEE ,  Byung-ha Park ,  Dong-sik Shim ,  Yong-seop Yoon ,  Sung-joon Park ,  Yong-won Jeong ,  Kyong-il Kim

Inventor： Moon-chul LEE ,  Byung-ha Park ,  Dong-sik Shim ,  Yong-seop Yoon ,  Sung-joon Park ,  Yong-won Jeong ,  Kyong-il Kim

IPC: B41J2/17 ,  B23P17/00 ,  B41J2/05 ,  B21D53/76

CPC classification number: B41J2/1603 ,  B41J2/1629 ,  B41J2/1631 ,  B41J2/1632 ,  Y10T29/49401

Abstract: An inkjet print head includes a substrate in which an ink feed hole having an hourglass cross-section is formed, a chamber layer that is stacked on the substrate and has a plurality of ink chambers into which ink supplied from the ink feed hole is filled, and a nozzle layer that is stacked on the chamber layer and has a plurality of nozzles through which the ink is ejected.

Abstract translation: 喷墨打印头包括其中形成具有沙漏横截面的供墨孔的基板，层叠在基板上并具有多个墨水室的室层，从墨水供给孔供应的墨水被填充到其中， 以及喷涂层，其堆叠在所述室层上并具有喷射所述墨的多个喷嘴。

公开(公告)号：US07335974B2

公开(公告)日：2008-02-26

申请号：US11391211

申请日：2006-03-29

Applicant: Jun-sik Hwang ,  Woon-bae Kim ,  Chang-youl Moon ,  Moon-chul Lee ,  Kyu-dong Jung

Inventor： Jun-sik Hwang ,  Woon-bae Kim ,  Chang-youl Moon ,  Moon-chul Lee ,  Kyu-dong Jung

IPC: H01L23/02 ,  H01L21/00

CPC classification number: B81C1/0023 ,  B81B7/007 ,  B81C2203/0118 ,  H01L23/04 ,  H01L23/49816 ,  H01L24/48 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/48463 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/16235 ,  H01L2924/19041 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A multi stack packaging chip and a method of manufacturing the chip are provided. The method includes forming at least one second circuit element on a first wafer; forming a second wafer having a cavity and a one third circuit element formed opposite to the cavity; forming a solder on the second wafer; and combining the second wafer with the first wafer so that the second circuit element and the cavity correspond. The chip includes a flip-chip packaged chip in which a first circuit element is packaged using a first wafer; a second circuit element formed on the first wafer; a second wafer having a cavity and combined with the first wafer so that the cavity and the second circuit element correspond; a third circuit element formed on the second wafer; and a solder formed on the second wafer, the solder electrically coupling the second wafer to a packaging substrate.

Abstract translation: 提供了一种多层封装芯片及其制造方法。 该方法包括在第一晶片上形成至少一个第二电路元件; 形成具有空腔的第二晶片和与所述腔相对形成的一个第三电路元件; 在第二晶片上形成焊料; 以及将所述第二晶片与所述第一晶片组合以使得所述第二电路元件和所述空腔对应。 芯片包括倒装芯片封装芯片，其中使用第一晶片封装第一电路元件; 形成在第一晶片上的第二电路元件; 第二晶片，其具有空腔并与所述第一晶片组合，使得所述空腔和所述第二电路元件对应; 形成在第二晶片上的第三电路元件; 以及形成在所述第二晶片上的焊料，所述焊料将所述第二晶片电耦合到封装衬底。

公开(公告)号：US20070279458A1

公开(公告)日：2007-12-06

申请号：US11653371

申请日：2007-01-16

Applicant: Moon-chul Lee ,  Dong-sik Shim ,  Hyung Choi ,  Yong-seop Yoon

Inventor： Moon-chul Lee ,  Dong-sik Shim ,  Hyung Choi ,  Yong-seop Yoon

IPC: B41J2/05

CPC classification number: B41J2/1603 ,  B41J2/1628 ,  B41J2/1629 ,  B41J2/1632 ,  B41J2/1639

Abstract: An inkjet printhead and a method of manufacturing the inkjet printhead. The inkjet printhead includes a substrate including a trench formed to a predetermined depth in an upper portion of the substrate and an ink feed hole formed through a bottom surface of the trench to supply ink, an etch stop layer formed of a metal and formed on an inner surface of the trench, a plurality of heaters, to create bubbles by heating ink, formed on the substrate, a plurality of electrodes, to apply a current to the plurality of heaters, formed on the substrate, a chamber layer stacked on the substrate and including a plurality of ink chambers formed above respective heaters to receive ink from the ink feed hole via the trench, and a nozzle layer stacked on the chamber layer and including a plurality of nozzles to eject ink from the plurality of ink chambers.

Abstract translation: 喷墨打印头和制造喷墨打印头的方法。 喷墨打印头包括基板，该基板包括在基板的上部形成为预定深度的沟槽，以及通过沟槽的底表面形成供墨的供墨孔，由金属形成的蚀刻停止层， 沟槽的内表面，多个加热器，通过加热形成在基板上的油墨产生气泡，多个电极，以形成在基板上的多个加热器施加电流，堆叠在基板上的室层 并且包括形成在各个加热器上方的多个墨室，以经由所述沟槽从所述供墨孔接收墨;以及喷嘴层，其堆叠在所述腔室层上并且包括多个喷嘴以从所述多个墨室喷射墨。

公开(公告)号：US06975010B2

公开(公告)日：2005-12-13

申请号：US10320679

申请日：2002-12-17

Applicant: Eun-sung Lee ,  Moon-chul Lee ,  Hyun-ok Kim

Inventor： Eun-sung Lee ,  Moon-chul Lee ,  Hyun-ok Kim

IPC: B81C1/00 ,  B81B3/00 ,  H01L29/82

CPC classification number: B81B3/0078 ,  B81B2203/0307 ,  B81C2201/0109

Abstract: A fabrication method for a MEMS structure, the MEMS structure including a fixing portion fixed to the substrate and a floating portion floating above the substrate. A sacrificial layer deposited on the substrate is patterned to have a groove forming a space surrounding the area corresponding to the area in which the fixing portion is to be formed. If the MEMS structure is deposited on the sacrificial layer, a sidewall is formed inside the space and the fixing portion and the floating portion are formed on the sacrificial layer. If the sacrificial layer is removed using an etchant, the sacrificial layer at the bottom of the fixing portion is protected from the etchant by the sidewall and accordingly, the sacrificial layer except the area surrounded by the sidewall is removed. Therefore, only the sacrificial layer under the floating portion is removed. Because the connecting portion is fabricated to have the same thickness as the fixing portion and the floating portion, a strong/durable MEMS structure is provided. Additionally, the boundary between the fixing portion and the floating portion can be precisely determined, and adjustment of the length of the floating portion can be precisely controlled.

Abstract translation: 一种用于MEMS结构的制造方法，所述MEMS结构包括固定到所述基板的固定部分和浮置在所述基板上方的浮动部分。 沉积在基板上的牺牲层被图案化以具有形成围绕与要形成固定部分的区域相对应的区域的空间的凹槽。 如果MEMS结构沉积在牺牲层上，则在空间内形成侧壁，并且在牺牲层上形成固定部分和浮动部分。 如果使用蚀刻剂去除牺牲层，则固定部分底部的牺牲层被侧壁保护而不受蚀刻剂的影响，因此除去由侧壁包围的区域之外的牺牲层。 因此，只有在浮动部分下面的牺牲层被去除。 由于连接部分被制造成具有与固定部分和浮动部分相同的厚度，所以提供了强/耐久的MEMS结构。 此外，可以精确地确定固定部分和浮动部分之间的边界，并且可以精确地控制浮动部分的长度的调节。

公开(公告)号：US20050266472A1

公开(公告)日：2005-12-01

申请号：US11139571

申请日：2005-05-31

Applicant: Tae-sik Park ,  Sung-hee Lee ,  Jung-ho Kang ,  Young-il Kim ,  Moon-chul Lee ,  Jong-hwa Won

Inventor： Tae-sik Park ,  Sung-hee Lee ,  Jung-ho Kang ,  Young-il Kim ,  Moon-chul Lee ,  Jong-hwa Won

IPC: G01N22/00 ,  C12M1/00 ,  C12N15/09 ,  C12Q1/68 ,  G01N27/00 ,  G01N27/02 ,  G01N27/22 ,  G01N33/487 ,  G01N37/00 ,  C12M1/34 ,  H01F21/02

CPC classification number: G01N27/3276

Abstract: An apparatus and method for detecting bio molecule using an inductor element that can detect the bonding reaction between a sample and a biochip by measuring the change of the electrical characteristics of a circuit including the inductance device. The method includes forming a signal conversion unit with at least one inductance device, arranging a biochip in a specified area of the signal conversion unit by immobilizing capturing probe biomolecules on a substrate and measuring electric characteristics of the signal conversion unit, performing a bonding reaction between a sample (such as DNA, RNA, protein, biomolecules, etc.) to be analyzed and the biochip, and measuring the electrical characteristics of the signal conversion unit after the reaction bonding. The result of the bio molecule detection is obtained through an electrical signal, and thus the capability of detecting the bio bonding reaction can be improved in comparison to the conventional apparatus and method.

Abstract translation: 一种使用电感器元件检测生物分子的装置和方法，该电感元件可以通过测量包括电感器件的电路的电特性的变化来检测样品和生物芯片之间的结合反应。 该方法包括：形成具有至少一个电感器件的信号转换单元，通过将捕获探针生物分子固定在基片上并测量信号转换单元的电特性，将生物芯片布置在信号转换单元的指定区域中， 待分析的样品（例如DNA，RNA，蛋白质，生物分子等）和生物芯片，以及测量反应结合后的信号转换单元的电特性。 通过电信号获得生物分子检测的结果，与以往的装置和方法相比，能够提高检测生物结合反应的能力。