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公开(公告)号:US09480837B2
公开(公告)日:2016-11-01
申请号:US14763331
申请日:2014-02-12
Inventor: Toshihiko Noda , Takashi Tokuda , Kiyotaka Sasagawa , Jun Ohta
IPC: A61N1/00 , A61N1/05 , A61B5/0478 , A61B5/0492 , A61B5/00
CPC classification number: A61N1/0529 , A61B5/0478 , A61B5/0492 , A61B5/4064 , A61B5/686 , A61B2562/046 , A61N1/0531 , A61N1/0543
Abstract: Providing an electrode structure capable of realizing an electrode array which allows each of the electrodes to be individually controlled while allowing them to be densely arranged and placed in a living body. According to the present invention, an electrode control circuit electrically connected to an electrode body is fixed to a rear portion of the electrode body within a front-viewed contour of the electrode body. This electrode control circuit may be contained in a recess formed in the rear portion of the electrode body, or it may be fixed to the back face of the electrode body. Conversely, an electrically conductive material layer covering the electrode control circuit may be used as the electrode body. A plurality of such bioelectrodes may be arranged in a two-dimensional form on a substrate or connected by a connection line including an electrical wire. Such configurations allow the bioelectrodes to be densely arranged.
Abstract translation: 提供能够实现电极阵列的电极结构,其允许每个电极被单独控制,同时允许它们被密集地布置并放置在生物体中。 根据本发明,电连接到电极体的电极控制电路在电极体的前视图轮廓内固定到电极体的后部。 该电极控制电路可以容纳在形成在电极体的后部的凹部中,也可以固定在电极体的背面。 相反,可以使用覆盖电极控制电路的导电材料层作为电极体。 多个这样的生物电极可以以二维形式布置在基板上或者通过包括电线的连接线连接。 这种构造允许生物电极密集地布置。
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公开(公告)号:US08999854B2
公开(公告)日:2015-04-07
申请号:US13658583
申请日:2012-10-23
Applicant: Sumitomo Electric Industries, Ltd. , National University Corporation Nara Institute of Science and Technology
Inventor: Takeyoshi Masuda , Tomoaki Hatayama
IPC: H01L21/302 , H01L29/861 , H01L29/78 , H01L29/06 , H01L29/868 , H01L29/739 , H01L21/308 , H01L21/3065 , H01L29/12 , H01L21/02 , H01L29/16
CPC classification number: H01L29/8613 , H01L21/02529 , H01L21/02576 , H01L21/0262 , H01L21/0475 , H01L21/3065 , H01L21/3083 , H01L29/045 , H01L29/06 , H01L29/0615 , H01L29/0619 , H01L29/0623 , H01L29/0661 , H01L29/12 , H01L29/1608 , H01L29/4236 , H01L29/4238 , H01L29/66068 , H01L29/739 , H01L29/78 , H01L29/7813 , H01L29/861 , H01L29/868 , Y10S438/931
Abstract: On a substrate, a silicon carbide layer provided with a main surface is formed. A mask is formed to cover a portion of the main surface of the silicon carbide layer. The main surface of the silicon carbide layer on which the mask is formed is thermally etched using chlorine-based gas so as to provide the silicon carbide layer with a side surface inclined relative to the main surface. The step of thermally etching is performed in an atmosphere in which the chlorine-based gas has a partial pressure of 50% or smaller.
Abstract translation: 在基板上形成具有主表面的碳化硅层。 形成掩模以覆盖碳化硅层的主表面的一部分。 利用氯系气体对其上形成有掩模的碳化硅层的主表面进行热蚀刻,从而为碳化硅层提供相对于主表面倾斜的侧表面。 热蚀刻步骤在氯系气体的分压为50%以下的气氛中进行。
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公开(公告)号:US20140378402A1
公开(公告)日:2014-12-25
申请号:US14375027
申请日:2013-01-29
Inventor: Shigenobu Yano , Takashi Shibahara , Shunichiro Ogura
IPC: C07H23/00
Abstract: Disclosed is a pharmaceutical composition containing as an active ingredient a compound represented by formula (I) or a physiologically acceptable salt thereof, and a method for treating cancer, the method including administering the compound represented by formula (I) or the physiologically acceptable salt thereof.
Abstract translation: 公开了含有作为活性成分的式(I)所示的化合物或其生理学上可接受的盐的药物组合物和治疗癌症的方法,所述方法包括将由式(I)表示的化合物或其生理学上可接受的盐 。
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公开(公告)号:US20130103993A1
公开(公告)日:2013-04-25
申请号:US13715929
申请日:2012-12-14
Inventor: Satoshi Ohtake , Hiroshi Iwata , Michiko Inoue
IPC: G11C29/10
CPC classification number: G11C29/10 , G01R31/318536 , G01R31/318541 , G01R31/318544 , G01R31/318555
Abstract: A scan asynchronous memory element includes: an asynchronous memory element configured to receive an n-input; and a scan control logic circuit configured to generate an n-bit signal input and the n-input to the asynchronous memory element from a scan input. The scan control logic circuit outputs the signal input when a control signal supplied to the scan control logic circuit has a first bit pattern, the scan control logic circuit outputs the scan input when the control signal has a second bit pattern, and the scan control logic circuit outputs a bit pattern allowing the asynchronous memory element to hold a previous value when the control signal has a bit pattern other than the first and second bit patterns.
Abstract translation: 扫描异步存储器元件包括:被配置为接收n输入的异步存储器元件; 以及扫描控制逻辑电路,被配置为从扫描输入生成n位信号输入和对异步存储器元件的n输入。 当提供给扫描控制逻辑电路的控制信号具有第一位模式时,扫描控制逻辑电路输出信号,当控制信号具有第二位模式时,扫描控制逻辑电路输出扫描输入,扫描控制逻辑 当控制信号具有除了第一和第二位模式之外的位模式时,电路输出允许异步存储器元件保持先前值的位模式。
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