公开(公告)号：US20060172708A1

公开(公告)日：2006-08-03

申请号：US11346376

申请日：2006-02-03

Applicant: Jin-soo Park ,  Hwan-min Kang ,  Seong-soo Lee ,  Sung-ho Cho

Inventor： Jin-soo Park ,  Hwan-min Kang ,  Seong-soo Lee ,  Sung-ho Cho

IPC: H04B17/00

CPC classification number: H04B1/71072 ,  H04B7/0891 ,  H04L1/0631

Abstract: A space-time multiuser detector simultaneously reduces multiple access interference (MAI) and multipath channel distortion (MCD) that are disadvantages of mobile communication systems. The space-time multiuser detector includes a plurality of receiving antennas; a channel estimator which estimates signals received via the receiving antennas; a space-time diversity decoder which performs space-time decoding with respect to the signals provided from the channel estimator and performs diversity combination; a signal aligner which aligns the signals provided from the space-time diversity decoder; and a successive interference cancellation detector which generates an interference signal from the signals that are provided from the signal aligner one by one in sequence, and removes the interference signal from the received original signals.

公开(公告)号：US20060055612A1

公开(公告)日：2006-03-16

申请号：US11023723

申请日：2004-12-28

Applicant: Yong-Jin Kim ,  Do-Hoon Kwon ,  Seong-Soo Lee

Inventor： Yong-Jin Kim ,  Do-Hoon Kwon ,  Seong-Soo Lee

IPC: H01Q13/10

CPC classification number: H01Q13/106 ,  H01Q13/10

Abstract: A planar antenna manufactured by patterning a substrate consisting of a dielectric layer, and first and second conductive layers applied, respectively, to both opposite surfaces of the dielectric layer. A first slot is formed in the first conductive layer for radiating electric waves. A second slot is formed in the first conductive layer for intercepting a particular frequency of the electric waves radiated by the first slot. A power supply portion is formed with the first conductive layer for supplying electric current to the first slot. A radiating element formed with the second conductive layer, which is excited by the electric waves radiated by the first slot, and radiates the electric waves.

Abstract translation: 通过将由电介质层构成的衬底图案化并分别施加到电介质层的两个相对表面的第一和第二导电层制造的平面天线。 在用于辐射电波的第一导电层中形成第一槽。 在第一导电层中形成第二槽，用于截取由第一槽辐射的电波的特定频率。 电源部形成有用于向第一槽供给电流的第一导电层。 形成有由第一槽辐射的电波激励的第二导电层并辐射电波的辐射元件。

公开(公告)号：US06483146B2

公开(公告)日：2002-11-19

申请号：US09735864

申请日：2000-12-13

Applicant: Seong-soo Lee ,  Jae-seung Hwang

Inventor： Seong-soo Lee ,  Jae-seung Hwang

IPC: H01L29788

CPC classification number: H01L27/11521 ,  H01L27/115 ,  H01L29/42324

Abstract: A floating gate electrode configuration and process reduces a space critical dimension between adjacent floating gate electrodes while reducing the consumption of a device isolation layer during etching of a dielectric layer overlying the floating gate electrode. The end portions of the floating gate electrode, which is formed separated on a device isolation region, have a step or rounded pattern. In order to realize such a pattern, after a first partial etch of a floating gate electrode material, polymer spacers or silicon nitride spacers are formed along the etched sidewalls. Then, using those spacers as an etching mask, a second etch is performed on the floating gate electrode material to separate the same. Furthermore, after forming polysilicon on the partially etched floating gate electrode material, blanket etching is performed on the polysilicon to form a floating gate electrode having a round pattern of end portions.

Abstract translation: 浮栅电极配置和工艺减少了相邻浮栅之间的空间关键尺寸，同时在蚀刻覆盖浮栅的电介质层的同时减少了器件隔离层的消耗。 形成在器件隔离区域上分离的浮栅电极的端部具有台阶或圆形图案。 为了实现这种图案，在浮置栅电极材料的第一部分蚀刻之后，沿着蚀刻的侧壁形成聚合物间隔物或氮化硅间隔物。 然后，使用这些间隔物作为蚀刻掩模，在浮栅电极材料上进行第二次蚀刻以使其分离。 此外，在部分蚀刻的浮栅电极材料上形成多晶硅之后，对多晶硅进行覆盖蚀刻，以形成具有圆形图案的端部的浮栅。

公开(公告)号：US09060658B2

公开(公告)日：2015-06-23

申请号：US13262192

申请日：2010-03-12

Applicant: Yoo-Jin Choi ,  Young-Gie Kim ,  Jeong-Suk Yoon ,  Seong-Soo Lee ,  Yie-Bin Kim ,  Seung-Min Baek ,  Sang-Ik Na ,  Su-Uk Choe ,  Dong-Hoon Yi ,  Jei-Hun Lee

Inventor： Yoo-Jin Choi ,  Young-Gie Kim ,  Jeong-Suk Yoon ,  Seong-Soo Lee ,  Yie-Bin Kim ,  Seung-Min Baek ,  Sang-Ik Na ,  Su-Uk Choe ,  Dong-Hoon Yi ,  Jei-Hun Lee

IPC: G06K9/00 ,  A47L9/00 ,  G01S15/93 ,  G05D1/02

CPC classification number: A47L9/009 ,  A47L2201/04 ,  G01S15/931 ,  G01S2015/938 ,  G05D1/0246 ,  G05D1/0253 ,  G05D1/0274 ,  G05D2201/0203

Abstract: Disclosed are a mobile robot with a single camera capable of performing a cleaning process with respect to surroundings, and capable of more precisely making a 3D map of the surroundings including a plurality of feature points, and a method for recognizing 3D surroundings of the same. According to the method, images of the surroundings are captured, and a preset number of particles with respect to feature points of a first image are projected to a second image based on matching information of feature points extracted from the two images sequentially captured, thereby extracting 3D information of the surroundings.

Abstract translation: 公开了具有能够对周围进行清洁处理的单个摄像机的移动机器人，并且能够更准确地制作包括多个特征点的周围环境的3D地图，以及用于识别其周围的3D环境的方法。 根据该方法，捕获周围的图像，并且基于从顺序捕获的两个图像中提取的特征点的匹配信息，将关于第一图像的特征点的预定数量的粒子投影到第二图像，从而提取 环境的3D信息。

公开(公告)号：US09048193B2

公开(公告)日：2015-06-02

申请号：US13910734

申请日：2013-06-05

Applicant: Jung-Ik Oh ,  Dae-Hyun Jang ,  Seong-Soo Lee ,  Han-Na Cho

Inventor： Jung-Ik Oh ,  Dae-Hyun Jang ,  Seong-Soo Lee ,  Han-Na Cho

IPC: H01L21/44 ,  H01L21/308 ,  H01L21/768 ,  H01L21/311 ,  H01L27/115 ,  H01L21/027

CPC classification number: H01L21/308 ,  H01L21/0273 ,  H01L21/31144 ,  H01L21/76838 ,  H01L21/76885 ,  H01L27/11575 ,  H01L27/11582

Abstract: A method of forming a multi-floor step pattern structure includes forming a stacked structure having alternating insulating interlayers and sacrificial layers on a substrate. A first photoresist pattern is formed on the stacked structure. A first preliminary step pattern structure is formed by etching portions of the stacked structure using the first photoresist pattern as an etching mask. A passivation layer pattern is formed on upper surfaces of the first photoresist pattern and the first preliminary step pattern structure. A second photoresist pattern is formed by removing a side wall portion of the first photoresist pattern exposed by the passivation layer pattern. A second preliminary step pattern structure is formed by etching exposed insulating interlayers and underlying sacrificial layers using the second photoresist pattern as an etching mask. The above steps may be repeated on the second preliminary step pattern structure to form the multi-floor step pattern structure.

Abstract translation: 形成多层台阶图案结构的方法包括在基板上形成具有交替的绝缘夹层和牺牲层的堆叠结构。 第一光致抗蚀剂图案形成在堆叠结构上。 通过使用第一光致抗蚀剂图案作为蚀刻掩模蚀刻层叠结构的部分来形成第一预备步骤图案结构。 钝化层图案形成在第一光致抗蚀剂图案和第一初步步骤图案结构的上表面上。 通过去除由钝化层图案暴露的第一光致抗蚀剂图案的侧壁部分形成第二光致抗蚀剂图案。 通过使用第二光致抗蚀剂图案作为蚀刻掩模蚀刻暴露的绝缘夹层和下面的牺牲层来形成第二初步步骤图案结构。 可以在第二预备步骤图案结构上重复上述步骤以形成多层台阶图案结构。

公开(公告)号：US08871591B2

公开(公告)日：2014-10-28

申请号：US13600025

申请日：2012-08-30

Applicant: Yong-Hyun Kwon ,  Dae-Hyun Jang ,  Seong-Soo Lee ,  Kyoung-Sub Shin

Inventor： Yong-Hyun Kwon ,  Dae-Hyun Jang ,  Seong-Soo Lee ,  Kyoung-Sub Shin

IPC: H01L21/336

CPC classification number: H01L21/76805 ,  H01L21/76816 ,  H01L21/76831 ,  H01L27/11556 ,  H01L27/11575 ,  H01L27/11582

Abstract: According to example embodiments of inventive concepts, a method includes forming cell patterns and insulating interlayers between the cell patterns on the substrate. An upper insulating interlayer including initial and preliminary contact holes is formed on an uppermost cell pattern. A first reflection limiting layer pattern and a first photoresist layer pattern are formed for exposing a first preliminary contact hole while covering inlet portion of the initial and preliminary contact holes. A first etching process is performed on layers under the first preliminary contact hole to expose the cell pattern at a lower position than a bottom of the first preliminary contact hole. A partial removing process of sidewall portions of the first reflection limiting layer pattern and the first photoresist layer pattern and an etching process on exposed layers through bottom portions of the preliminary contact holes are repeated for forming contact holes having different depths.

Abstract translation: 根据本发明构思的示例性实施例，一种方法包括在基板上的单元图案之间形成单元图案和绝缘夹层。 在最上面的单元图案上形成包括初始接触孔和预接触孔的上绝缘层。 形成第一反射限制层图案和第一光致抗蚀剂层图案，用于暴露第一初步接触孔，同时覆盖初始和初步接触孔的入口部分。 在第一初步接触孔下方的层上进行第一蚀刻处理，以在比第一预接触孔的底部低的位置处露出电池图案。 重复第一反射限制层图案和第一光致抗蚀剂层图案的侧壁部分的部分去除处理以及通过预接触孔的底部的暴露层上的蚀刻工艺，以形成具有不同深度的接触孔。

公开(公告)号：US08675963B2

公开(公告)日：2014-03-18

申请号：US13317295

申请日：2011-10-14

Applicant: Seong Hoon Choi ,  Jang Hyun Park ,  Chang Sun Kim ,  Seong Soo Lee ,  Jung Hwan Choi

Inventor： Seong Hoon Choi ,  Jang Hyun Park ,  Chang Sun Kim ,  Seong Soo Lee ,  Jung Hwan Choi

IPC: G06K9/00

CPC classification number: H04N5/235 ,  G06T5/40 ,  G06T2207/20076

Abstract: An automatic brightness adjusting method and apparatus for image signal processor (ISP) is provided. The image processing apparatus may include a histogram generating unit, a cumulative distribution function calculator, and a histogram equalization (HE) unit. The histogram generating unit may generate a histogram of brightness values of pixels in an input image. The cumulative distribution function calculator may generate a cumulative distribution function and an inverse cumulative distribution function, based on the generated histogram. The HE unit may generate a conversion function based on the cumulative distribution function and the inverse cumulative distribution function, and may apply HE to the input image based on the conversion function so as to generate an output image.

Abstract translation: 提供了一种用于图像信号处理器（ISP）的自动亮度调节方法和装置。 图像处理装置可以包括直方图生成单元，累积分布函数计算器和直方图均衡（HE）单元。 直方图生成单元可以生成输入图像中的像素的亮度值的直方图。 累积分布函数计算器可以基于生成的直方图生成累积分布函数和逆累积分布函数。 HE单元可以基于累积分布函数和逆累积分布函数生成转换函数，并且可以基于转换函数向输入图像应用HE，以生成输出图像。

公开(公告)号：US20120329224A1

公开(公告)日：2012-12-27

申请号：US13495510

申请日：2012-06-13

Applicant: Yoo-chul Kong ,  Jin-kwan Lee ,  Gyung-jin Min ,  Seong-soo Lee

Inventor： Yoo-chul Kong ,  Jin-kwan Lee ,  Gyung-jin Min ,  Seong-soo Lee

IPC: H01L21/308 ,  H01L21/336

CPC classification number: H01L21/31144 ,  H01L21/0332 ,  H01L27/11556 ,  H01L27/11582

Abstract: A method of forming a fine pattern and a method of manufacturing a semiconductor device. The method of forming a fine pattern includes: forming a hard mask layer on a to-be-etched layer; forming on the hard mask layer a first mask pattern including a plurality of elongated openings that are arranged at predetermined intervals in a first direction and a second direction different from the first direction and are offset from each other in adjacent columns in the second direction; forming on the hard mask layer a second mask pattern including at least two linear openings that each pass through the elongated openings in the adjacent columns and extend in the first direction; forming a hard mask pattern by etching the hard mask layer by using the second mask pattern as an etch mask; and etching the to-be-etched layer by using the hard mask pattern.

Abstract translation: 形成精细图案的方法和制造半导体器件的方法。 形成精细图案的方法包括：在被蚀刻层上形成硬掩模层; 在所述硬掩模层上形成第一掩模图案，所述第一掩模图案包括多个细长开口，所述第一掩模图案沿着第一方向以不同于第一方向的第二方向以预定间隔布置，并且在相邻列中沿第二方向彼此偏移; 在所述硬掩模层上形成包括至少两个线性开口的第二掩模图案，每个所述至少两个线性开口穿过所述相邻列中的所述细长开口并在所述第一方向上延伸; 通过使用第二掩模图案作为蚀刻掩模来蚀刻硬掩模层来形成硬掩模图案; 并通过使用硬掩膜图案蚀刻被蚀刻层。

公开(公告)号：US08340606B2

公开(公告)日：2012-12-25

申请号：US11431501

申请日：2006-05-11

Applicant: Jin-soo Park ,  Do-hyung Kim ,  Jin-wook Burm ,  Seong-soo Lee ,  Heung-bae Lee

Inventor： Jin-soo Park ,  Do-hyung Kim ,  Jin-wook Burm ,  Seong-soo Lee ,  Heung-bae Lee

IPC: H04B1/40

CPC classification number: H04B1/04 ,  H03F3/24 ,  H04B2001/0408

Abstract: A transmitter and a signal amplifier are provided. The signal amplifier includes a digital-to-analog converter converting an input digital signal into an analog signal, a local oscillator signal generator outputting in-phase and quadrature-phase oscillator signals, a first mixer mixing the analog signal with the in-phase local oscillator signal to output an in-phase high frequency signal, a second mixer mixing the analog signal with the quadrature-phase local oscillator signal to output a quadrature-phase high frequency signal, a main amplifier amplifying the in-phase high frequency signal output from the first mixer, and an auxiliary amplifier amplifying the quadrature-phase high frequency signal output from the second mixer.

Abstract translation: 提供发射机和信号放大器。 信号放大器包括将输入数字信号转换为模拟信号的数模转换器，输出同相和正交相位振荡器信号的本地振荡器信号发生器，将模拟信号与同相本地 振荡器信号以输出同相高频信号，第二混频器将模拟信号与正交相位本地振荡器信号混合以输出正交相位高频信号，主放大器放大从 第一混频器和放大从第二混频器输出的正交相位高频信号的辅助放大器。

公开(公告)号：US20120019627A1

公开(公告)日：2012-01-26

申请号：US13262192

申请日：2010-03-12

Applicant: Yoo-Jin Choi ,  Young-Gie Kim ,  Jeong-Suk Yoon ,  Seong-Soo Lee ,  Yie-Bin Kim ,  Seung-Min Baek ,  Sang-Ik Na ,  Su-Uk Choe ,  Dong-Hoon Yi ,  Jei-Hun Lee

Inventor： Yoo-Jin Choi ,  Young-Gie Kim ,  Jeong-Suk Yoon ,  Seong-Soo Lee ,  Yie-Bin Kim ,  Seung-Min Baek ,  Sang-Ik Na ,  Su-Uk Choe ,  Dong-Hoon Yi ,  Jei-Hun Lee

IPC: H04N13/02

CPC classification number: A47L9/009 ,  A47L2201/04 ,  G01S15/931 ,  G01S2015/938 ,  G05D1/0246 ,  G05D1/0253 ,  G05D1/0274 ,  G05D2201/0203

Abstract: Disclosed are a mobile robot with a single camera capable of performing a cleaning process with respect to surroundings, and capable of more precisely making a 3D map of the surroundings including a plurality of feature points, and a method for recognizing 3D surroundings of the same. According to the method, images of the surroundings are captured, and a preset number of particles with respect to feature points of a first image are projected to a second image based on matching information of feature points extracted from the two images sequentially captured, thereby extracting 3D information of the surroundings.

Abstract translation: 公开了具有能够对周围环境进行清洁处理的单个摄像机的移动机器人，并且能够更准确地制作包括多个特征点的周围环境的3D地图，以及用于识别其中的3D环境的方法。 根据该方法，捕获周围的图像，并且基于从顺序捕获的两个图像中提取的特征点的匹配信息，将关于第一图像的特征点的预定数量的粒子投影到第二图像，从而提取 环境的3D信息。