公开(公告)号：US07091237B2

公开(公告)日：2006-08-15

申请号：US10476194

申请日：2002-05-09

申请人： Paul John Beswick ,  Christopher Charles Hamlett ,  Vipulkumar Patel ,  Michael Lawrence Sierra ,  Nigel Grahame Ramsden

发明人： Paul John Beswick ,  Christopher Charles Hamlett ,  Vipulkumar Patel ,  Michael Lawrence Sierra ,  Nigel Grahame Ramsden

IPC分类号： A61K31/38 ,  A61K31/34 ,  C07D333/24 ,  C07D307/02

CPC分类号： C07D307/38 ,  C07D307/42 ,  C07D333/16 ,  C07D333/18 ,  C07D405/06 ,  C07D405/12 ,  C07D409/04 ,  C07D409/12

摘要： A compound of formula (I) or pharmaceutically acceptable salts and solvates thereof, for the treatment of a hPPAR mediated disease or condition

摘要翻译： 用于治疗hPPAR介导的疾病或病症的式（I）化合物或其药学上可接受的盐和溶剂合物

公开(公告)号：US20060133754A1

公开(公告)日：2006-06-22

申请号：US11314305

申请日：2005-12-21

申请人： Vipulkumar Patel ,  David Piede ,  Margaret Ghiron ,  Prakash Gothoskar

发明人： Vipulkumar Patel ,  David Piede ,  Margaret Ghiron ,  Prakash Gothoskar

IPC分类号： G02B6/10

CPC分类号： G02F1/025 ,  G02B6/122 ,  G02B6/1228 ,  G02B2006/12061 ,  G02B2006/12097

摘要： A low loss optical waveguiding structure for silicon-on-insulator (SOI)-based arrangements utilizes a tri-material configuration including a rib/strip waveguide formed of a material with a refractive index less than silicon, but greater than the refractive index of the underlying insulating material. In one arrangement, silicon nitirde may be used. The index mismatch between the silicon surface layer (the SOI layer) and the rib/strip waveguide results in a majority of the optical energy remaining within the SOI layer, thus reducing scattering losses from the rib/strip structure (while the rib/strip allows for guiding along a desired signal path to be followed). Further, since silicon nitirde is an amorphous material without a grain structure, this will also reduce scattering losses. Advantageously, the use of silicon nitride allows for conventional CMOS fabrication processes to be used in forming both passive and active devices.

摘要翻译： 用于绝缘体上硅（SOI）的布置的低损耗光波导结构利用三材料构造，其包括由折射率小于硅的材料形成的肋/条波导，但大于 底层绝缘材料。 在一种布置中，可以使用硅氮化硅。 硅表面层（SOI层）和肋/条形波导之间的折射率失配导致剩余在SOI层内的大部分光学能量，从而减少了肋/条带结构的散射损耗（而肋/条允许 用于沿着要遵循的期望信号路径引导）。 此外，由于硅氮化物是不具有晶粒结构的无定形材料，因此也将降低散射损耗。 有利地，使用氮化硅允许常规CMOS制造工艺用于形成无源器件和有源器件。

公开(公告)号：US07020364B2

公开(公告)日：2006-03-28

申请号：US10668947

申请日：2003-09-23

申请人： Margaret Ghiron ,  Prakash Gothoskar ,  Robert Keith Montgomery ,  Vipulkumar Patel ,  Soham Pathak ,  Kalpendu Shastri ,  Katherine A. Yanushefski

发明人： Margaret Ghiron ,  Prakash Gothoskar ,  Robert Keith Montgomery ,  Vipulkumar Patel ,  Soham Pathak ,  Kalpendu Shastri ,  Katherine A. Yanushefski

IPC分类号： G02B6/34

CPC分类号： G02B6/4206

摘要： A trapezoidal shaped single-crystal silicon prism is formed and permanently attached to an SOI wafer, or any structure including a silicon optical waveguide. In order to provide efficient optical coupling, the dopant species and concentration within the silicon waveguide is chosen such that the refractive index of the silicon waveguide is slightly less than that of the prism coupler (refractive index of silicon≈3.5). An intermediate evanescent coupling layer, disposed between the waveguide and the prism coupler, comprises a refractive index less than both the prism and the waveguide. In one embodiment, the evanescent coupling layer comprises a constant thickness. In an alternative embodiment, the evanescent coupling layer may be tapered to improve coupling efficiency between the prism and the waveguide. Methods of making the coupling arrangement are also disclosed.

摘要翻译： 形成梯形形状的单晶硅棱镜，并且永久地附着到SOI晶片或包括硅光波导的任何结构。 为了提供有效的光耦合，选择硅波导内的掺杂物种类和浓度使得硅波导的折射率略小于棱镜耦合器的折射率（硅折射率为0.35）。 设置在波导和棱镜耦合器之间的中间消逝耦合层包括小于棱镜和波导两者的折射率。 在一个实施例中，ev逝耦合层包括恒定的厚度。 在替代实施例中，渐逝耦合层可以是锥形的，以提高棱镜和波导之间的耦合效率。 还公开了制造耦合装置的方法。

公开(公告)号：US07013067B2

公开(公告)日：2006-03-14

申请号：US11054205

申请日：2005-02-09

申请人： Margaret Ghiron ,  Prakash Gothoskar ,  Robert Keith Montgomery ,  Vipulkumar Patel ,  Soham Pathak ,  Kalpendu Shastri ,  Katherine A. Yanushefski

发明人： Margaret Ghiron ,  Prakash Gothoskar ,  Robert Keith Montgomery ,  Vipulkumar Patel ,  Soham Pathak ,  Kalpendu Shastri ,  Katherine A. Yanushefski

IPC分类号： G02B6/26

CPC分类号： G02B6/1228 ,  G02B6/4204

摘要： An arrangement for coupling between a free-space propagating optical signal and an ultrathin silicon waveguide formed in an upper silicon layer (SOI layer) of a silicon-an-insulator (SOI) structure includes a silicon nanotaper structure formed in the (SOI layer) and coupled to the ultrathin silicon waveguide. A dielectric waveguide coupling layer is disposed so as to overly a portion of a dielectric insulating layer in a region where an associated portion of the SOI layer has been removed. An end portion of the dielectric waveguide coupling layer is disposed to overlap an end section of the silicon nanotaper to form a mode conversion region between the free-space signal and the ultrathin silicon waveguide. A free-space optical coupling arrangement is disposed over the dielectric waveguide coupling layer and used to couple between free space and the dielectric waveguide coupling layer and thereafter into the ultrathin silicon waveguide.

摘要翻译： 在自由空间传播的光信号和形成于硅 - 绝缘体（SOI））结构的上硅层（SOI层）中的超薄硅波导之间的耦合的布置包括在（SOI层）中形成的硅纳米锥结构， 并耦合到超薄硅波导。 电介质波导耦合层设置成在去除了SOI层的相关部分的区域中的绝缘层的一部分上。 电介质波导耦合层的端部设置成与硅纳米锥的端部部分重叠以在自由空间信号和超薄硅波导之间形成模式转换区域。 自由空间光耦合装置设置在电介质波导耦合层上，用于将自由空间与电介质波导耦合层之间耦合，此后进入超薄硅波导。

公开(公告)号：US07000207B2

公开(公告)日：2006-02-14

申请号：US10820356

申请日：2004-04-08

申请人： Prakash Gothoskar ,  Margaret Ghiron ,  Vipulkumar Patel ,  Robert Keith Montgomery ,  Kalpendu Shastri ,  Soham Pathak ,  Katherine A. Yanushefski

发明人： Prakash Gothoskar ,  Margaret Ghiron ,  Vipulkumar Patel ,  Robert Keith Montgomery ,  Kalpendu Shastri ,  Soham Pathak ,  Katherine A. Yanushefski

IPC分类号： G06F17/50

CPC分类号： G06F17/5077

摘要： A system and method for providing the layout of non-Manhattan shaped integrated circuit elements using a Manhattan layout system utilizes a plurality of minimal sized polygons (e.g., rectangles) to fit within the boundaries of the non-Manhattan element. The rectangles are fit such that at least one vertex of each rectangle coincides with a grid point on the Manhattan layout system. Preferably, the rectangles are defined by using the spacing being adjacent grid points as the height of each rectangle. As the distance between adjacent grid points decreases, the layout better matches the actual shape of the non-Manhattan element. The system and method then allows for electrical and optical circuit elements to be laid out simultaneously, using the same layout software and equipment.

摘要翻译： 使用曼哈顿布局系统提供非曼哈顿形集成电路元件的布局的系统和方法利用多个最小尺寸的多边形（例如，矩形）来装配在非曼哈顿元件的边界内。 矩形被配合成使得每个矩形的至少一个顶点与曼哈顿布局系统上的网格点重合。 优选地，通过使用相邻网格点的间隔作为每个矩形的高度来定义矩形。 随着相邻网格点之间的距离减小，布局更好地匹配非曼哈顿元素的实际形状。 然后，系统和方法可以使用相同的布局软件和设备同时布置电气和光学电路元件。

公开(公告)号：US06980720B2

公开(公告)日：2005-12-27

申请号：US10818415

申请日：2004-04-05

申请人： Prakash Gothoskar ,  Margaret Ghiron ,  Vipulkumar Patel ,  Robert Keith Montgomery ,  Kalpendu Shastri ,  Soham Pathak ,  Katherine A. Yanushefski

发明人： Prakash Gothoskar ,  Margaret Ghiron ,  Vipulkumar Patel ,  Robert Keith Montgomery ,  Kalpendu Shastri ,  Soham Pathak ,  Katherine A. Yanushefski

IPC分类号： G02B6/12 ,  G02B6/122 ,  G02B6/26 ,  G02B6/32

CPC分类号： G02B6/1228 ,  G02B2006/12097

摘要： A low loss coupling arrangement between a slab/strip waveguide and a rib waveguide in an optical waveguiding structure formed on a silicon-on-insulator (SOI) platform utilizes tapered sections at the input and/or output of the rib waveguide to reduce loss. Optical reflections are reduced by using silicon tapers (either vertical tapers, horizontal tapers, or two-dimensional tapers) that gradually transition the effective index seen by an optical signal propagating along the slab/strip waveguide and subsequently into and out of the rib waveguide. Loss can be further reduced by using adiabatically contoured silicon regions at the input and output of the rib waveguide to reduce mode mismatch between the slab/strip waveguide and rib waveguide. In a preferred embodiment, concatenated tapered and adiabatic sections can be used to provide for reduced optical reflection loss and reduced optical mode mismatch.

摘要翻译： 形成在绝缘体上硅（SOI）平台上的光波导结构中的板/条波导和肋波导之间的低损耗耦合布置在肋波导的输入和/或输出处利用锥形部分来减少损耗。 通过使用沿着板/条波导传播的随后进入和离开肋波导的光信号逐渐转变的有效折射率的硅锥（垂直锥度，水平锥度或二维锥度）来减少光学反射。 通过在肋波导的输入和输出处使用绝热的轮廓的硅区域来减少损耗，以减少板/波导管和肋波导之间的模式失配。 在优选实施例中，级联的锥形和绝热部分可用于提供减少的光学反射损失和减小的光学模式失配。

公开(公告)号：US06963118B2

公开(公告)日：2005-11-08

申请号：US10737343

申请日：2003-12-16

申请人： Shrenik Deliwala ,  Vipulkumar Patel

发明人： Shrenik Deliwala ,  Vipulkumar Patel

IPC分类号： G02B5/04 ,  G02B6/10 ,  G02B6/12 ,  G02B6/122 ,  G02B6/124 ,  G02B6/28 ,  G02B6/34 ,  G02B6/42 ,  G02B6/43 ,  G02B27/10 ,  G02B27/28 ,  G02F1/01 ,  G02F1/015 ,  G02F1/025 ,  G02F1/295 ,  H01L27/12 ,  G02F1/035

CPC分类号： H01L27/1203 ,  B82Y20/00 ,  G02B5/045 ,  G02B6/10 ,  G02B6/12004 ,  G02B6/12007 ,  G02B6/12026 ,  G02B6/12033 ,  G02B6/1225 ,  G02B6/1228 ,  G02B6/124 ,  G02B6/2861 ,  G02B6/34 ,  G02B6/4232 ,  G02B6/43 ,  G02B27/1086 ,  G02B27/144 ,  G02B27/145 ,  G02B27/285 ,  G02B2006/12061 ,  G02B2006/12097 ,  G02B2006/12104 ,  G02B2006/12107 ,  G02B2006/12114 ,  G02B2006/12135 ,  G02B2006/12161 ,  G02B2006/12164 ,  G02B2006/12176 ,  G02F1/0147 ,  G02F1/025 ,  G02F1/295 ,  G02F2001/0152 ,  G02F2201/20

摘要： A method for forming a hybrid active electronic and optical circuit using a lithography mask. The hybrid active electronic and optical circuit comprising an active electronic device and at least one optical device on a Silicon-On-Insulator (SOI) wafer. The SOI wafer including an insulator layer and an upper silicon layer. The upper silicon layer including at least one component of the active electronic device and at least one component of the optical device. The method comprising projecting the lithography mask onto the SOI waver in order to simultaneously pattern the component of the active electronic device and the component of the optical device on the SOI wafer.

摘要翻译： 一种使用光刻掩模形成混合有源电子和光电路的方法。 该混合有源电子和光学电路包括有源电子器件和绝缘体上硅（SOI）晶片上的至少一个光学器件。 SOI晶片包括绝缘体层和上硅层。 上硅层包括有源电子器件的至少一个部件和光学器件的至少一个部件。 该方法包括将光刻掩模投影到SOI浮动器上，以便在SOI晶片上同时对有源电子器件的元件和光学器件的元件进行图案化。

公开(公告)号：US20050236619A1

公开(公告)日：2005-10-27

申请号：US11169932

申请日：2005-06-29

申请人： Vipulkumar Patel ,  Margaret Ghiron ,  Prakash Gothoskar ,  Robert Montgomery ,  Kalpendu Shastri ,  Soham Pathak ,  Katherine Yanushefski

发明人： Vipulkumar Patel ,  Margaret Ghiron ,  Prakash Gothoskar ,  Robert Montgomery ,  Kalpendu Shastri ,  Soham Pathak ,  Katherine Yanushefski

IPC分类号： H01L27/12 ,  H01L27/144 ,  H01L29/04

CPC分类号： H01L27/1443 ,  H01L27/1203

摘要： A conventional CMOS fabrication technique is used to integrate the formation of passive optical devices and active electro-optic devices with standard CMOS electrical devices on a common SOI structure. The electrical devices and optical devices share the same surface SOI layer (a relatively thin, single crystal silicon layer), with various required semiconductor layers then formed over the SOI layer. In some instances, a set of process steps may be used to simultaneously form regions in both electrical and optical devices. Advantageously, the same metallization process is used to provide electrical connections to the electrical devices and the active electro-optic devices.

公开(公告)号：US20050201683A1

公开(公告)日：2005-09-15

申请号：US11054205

申请日：2005-02-09

申请人： Margaret Ghiron ,  Prakash Gothoskar ,  Robert Montgomery ,  Vipulkumar Patel ,  Soham Pathak ,  Kalpendu Shastri ,  Katherine Yanushefski

发明人： Margaret Ghiron ,  Prakash Gothoskar ,  Robert Montgomery ,  Vipulkumar Patel ,  Soham Pathak ,  Kalpendu Shastri ,  Katherine Yanushefski

IPC分类号： G02B6/122 ,  G02B6/14 ,  G02B6/26 ,  G02B6/34 ,  G02B6/42

CPC分类号： G02B6/1228 ,  G02B6/4204

摘要： An arrangement for providing optical coupling between a free-space propagating optical signal and an ultrathin silicon waveguide formed in an upper silicon layer of a silicon-on-insulator (SOI) structure includes a silicon nanotaper structure formed in the upper silicon layer (SOI layer) of the SOI structure and coupled to the ultrathin silicon waveguide. A dielectric waveguide coupling layer, with a refractive index greater than the index of the dielectric insulating layer but less than the refractive index of silicon, is disposed so as to overly a portion of the dielectric insulating layer in a region where an associated portion of the SOI layer has been removed. An end portion of the dielectric waveguide coupling layer is disposed to overlap an end section of the silicon nanotaper to form a mode conversion region between the free-space propagating optical signal and the ultrathin silicon waveguide. A free-space optical coupling arrangement (such as a prism or grating) is disposed over the dielectric waveguide coupling layer and used to couple a propagating optical signal between free space and the dielectric waveguide coupling layer and thereafter into the ultrathin silicon waveguide.

摘要翻译： 用于在自由空间传播的光信号和形成在绝缘体上硅（SOI））结构的上硅层中的超薄硅波导之间提供光耦合的装置包括形成在上硅层（SOI层）中的硅纳米锥结构 ）和耦合到超薄硅波导。 具有大于介电绝缘层的折射率但小于硅的折射率的折射率的介质波导耦合层被布置成过度地在介电绝缘层的一部分中的相关部分 SOI层已被去除。 电介质波导耦合层的端部设置成与硅纳米锥的端部部分重叠以在自由空间传播的光信号和超薄硅波导之间形成模式转换区域。 自由空间光耦合装置（诸如棱镜或光栅）设置在介质波导耦合层之上，用于将传播的光信号耦合在自由空间与介质波导耦合层之间，然后耦合到超薄硅波导中。

公开(公告)号：US20050179986A1

公开(公告)日：2005-08-18

申请号：US11042774

申请日：2005-01-24

申请人： Prakash Gothoskar ,  Margaret Ghiron ,  Robert Montgomery ,  Vipulkumar Patel ,  Soham Pathak ,  David Piede ,  Kalpendu Shastri ,  Katherine Yanushefski

发明人： Prakash Gothoskar ,  Margaret Ghiron ,  Robert Montgomery ,  Vipulkumar Patel ,  Soham Pathak ,  David Piede ,  Kalpendu Shastri ,  Katherine Yanushefski

IPC分类号： G02B26/00 ,  G02F1/00 ,  G02F1/025

CPC分类号： G02F1/025 ,  G02F2202/32

摘要： An SOI-based photonic bandgap (PBG) electro-optic device utilizes a patterned PBG structure to define a two-dimensional waveguide within an active waveguiding region of the SOI electro-optic device. The inclusion of the PBG columnar arrays within the SOI structure results in providing extremely tight lateral confinement of the optical mode within the waveguiding structure, thus significantly reducing the optical loss. By virtue of including the PBG structure, the associated electrical contacts may be placed in closer proximity to the active region without affecting the optical performance, thus increasing the switching speed of the electro-optic device. The overall device size, capacitance and resistance are also reduced as a consequence of using PBGs for lateral mode confinement.

摘要翻译： 基于SOI的光子带隙（PBG）电光器件利用图案化的PBG结构来在SOI电光器件的有源波导区域内限定二维波导。 在SOI结构中包含PBG柱状阵列导致在波导结构内提供光学模式的非常紧密的侧向约束，从而显着减少光学损耗。 通过包括PBG结构，相关联的电触点可以放置在更接近有源区域而不影响光学性能，从而增加电光器件的切换速度。 由于使用PBG用于横向模式限制，整个装置尺寸，电容和电阻也减小。