Wafer-level opto-electronic testing apparatus and method
    1.
    发明申请
    Wafer-level opto-electronic testing apparatus and method 有权
    晶圆级光电测试仪器及方法

    公开(公告)号:US20050194990A1

    公开(公告)日:2005-09-08

    申请号:US11075430

    申请日:2005-03-08

    IPC分类号: G01R31/26

    摘要: A wafer-level testing arrangement for opto-electronic devices formed in a silicon-on-insulator (SOI) wafer structure utilizes a single opto-electronic testing element to perform both optical and electrical testing. Beam steering optics may be formed on the testing element and used to facilitate the coupling between optical probe signals and optical coupling elements (e.g., prism couplers, gratings) formed on the top surface of the SOI structure. The optical test signals are thereafter directed into optical waveguides formed in the top layer of the SOI structure. The opto-electronic testing element also comprises a plurality of electrical test pins that are positioned to contact a plurality of bondpad test sites on the opto-electronic device and perform electrical testing operations. The optical test signal results may be converted into electrical representations within the SOI structure and thus returned to the testing element as electrical signals.

    摘要翻译: 用于在绝缘体上硅(SOI)晶片结构中形成的光电器件的晶片级测试装置利用单个光电测试元件执行光学和电学测试。 光束转向光学元件可以形成在测试元件上,并且用于促进光学探针信号与形成在SOI结构的顶表面上的光耦合元件(例如,棱镜耦合器,光栅)之间的耦合。 此后,光学测试信号被引导到形成在SOI结构的顶层中的光波导中。 光电测试元件还包括多个电测试引脚,其被定位成接触光电器件上的多个接合焊盘测试点并执行电测试操作。 光学测试信号结果可以转换为SOI结构内的电气表示,并因此作为电信号返回到测试元件。

    EMI-EMC shield for silicon-based optical transceiver
    2.
    发明申请
    EMI-EMC shield for silicon-based optical transceiver 审中-公开
    用于硅基光收发器的EMI-EMC屏蔽

    公开(公告)号:US20050135727A1

    公开(公告)日:2005-06-23

    申请号:US11013722

    申请日:2004-12-16

    IPC分类号: G02B6/42 G02B6/12

    摘要: An SOI-based opto-electronic structure includes various electronic components disposed with their associated optical components within a single SOI layer, forming a monolithic arrangement. EMI/EMC shielding is provided by forming a metallized outer layer on the surface of an external prism coupler that interfaces with the SOI layer, the metallized layer including transparent apertures to allow an optical signal to be coupled into and out of the SOI layer. The opposing surface of the prism coupler may also be coated with a metallic material to provide additional shielding. Further, metallic shielding plates may be formed on the SOI structure itself, overlying the locations of EMI-sensitive electronics. All of these metallic layers are ultimately coupled to an external ground plane to isolate the structure and provide the necessary shielding.

    摘要翻译: 基于SOI的光电结构包括在单个SOI层内与其相关联的光学部件一起设置的各种电子部件,形成单片布置。 通过在与SOI层相接的外部棱镜耦合器的表面上形成金属化的外层来提供EMI / EMC屏蔽,金属化层包括透明的孔,以允许光信号耦合到SOI层中。 棱镜耦合器的相对表面也可以用金属材料涂覆以提供额外的屏蔽。 此外,金属屏蔽板可以形成在SOI结构本身上,覆盖EMI敏感电子器件的位置。 所有这些金属层最终被耦合到外部接地平面以隔离结构并提供必要的屏蔽。

    Planar waveguide optical isolator in thin silicon-on-isolator (SOI) structure
    3.
    发明申请
    Planar waveguide optical isolator in thin silicon-on-isolator (SOI) structure 失效
    薄硅隔离器(SOI)结构中的平面波导光隔离器

    公开(公告)号:US20050123232A1

    公开(公告)日:2005-06-09

    申请号:US11005286

    申请日:2004-12-06

    摘要: A planar optical isolator is formed within the silicon surface layer of an SOI structure. A forward-directed signal is applied to an input waveguiding section of the isolator and thereafter propagates through a non-reciprocal waveguide coupling region into an output waveguide section. A rearward-directed signal enters via the output waveguide section and is thereafter coupled into the non-reciprocal waveguide structure, where the geometry of the structure functions to couple only a small amount of the reflected signal into the input waveguide section. In one embodiment, the non-reciprocal structure comprises an N-way directional coupler (with one output waveguide, one input waveguide and N-1 isolating waveguides). In another embodiment, the non-reciprocal structure comprises a waveguide expansion region including a tapered, mode-matching portion coupled to the output waveguide and an enlarged, non-mode matching portion coupled to the input waveguide such that a majority of a reflected signal will be mismatched with respect to the input waveguide section. By cascading a number of such planar SOI-based structures, increased isolation can be achieved—advantageously within a monolithic arrangement.

    摘要翻译: 在SOI结构的硅表面层内形成平面光隔离器。 正向信号被施加到隔离器的输入波导部分,然后通过非互易波导耦合区域传播到输出波导部分中。 后向信号经由输出波导部分进入,然后耦合到不可逆波导结构中,其中结构的几何结构仅将少量的反射信号耦合到输入波导部分中。 在一个实施例中,非互易结构包括N路定向耦合器(具有一个输出波导,一个输入波导和N-1个隔离波导)。 在另一个实施例中,不可逆结构包括波导扩展区域,其包括耦合到输出波导的锥形模式匹配部分和耦合到输入波导的放大的非模式匹配部分,使得反射信号的大部分将 相对于输入波导部分不匹配。 通过级联多个这种平面的基于SOI的结构,可以实现增加的隔离 - 有利地在单片布置中。

    SOI-based photonic bandgap devices
    4.
    发明申请
    SOI-based photonic bandgap devices 有权
    基于SOI的光子带隙器件

    公开(公告)号:US20050179986A1

    公开(公告)日:2005-08-18

    申请号:US11042774

    申请日:2005-01-24

    IPC分类号: G02B26/00 G02F1/00 G02F1/025

    CPC分类号: G02F1/025 G02F2202/32

    摘要: An SOI-based photonic bandgap (PBG) electro-optic device utilizes a patterned PBG structure to define a two-dimensional waveguide within an active waveguiding region of the SOI electro-optic device. The inclusion of the PBG columnar arrays within the SOI structure results in providing extremely tight lateral confinement of the optical mode within the waveguiding structure, thus significantly reducing the optical loss. By virtue of including the PBG structure, the associated electrical contacts may be placed in closer proximity to the active region without affecting the optical performance, thus increasing the switching speed of the electro-optic device. The overall device size, capacitance and resistance are also reduced as a consequence of using PBGs for lateral mode confinement.

    摘要翻译: 基于SOI的光子带隙(PBG)电光器件利用图案化的PBG结构来在SOI电光器件的有源波导区域内限定二维波导。 在SOI结构中包含PBG柱状阵列导致在波导结构内提供光学模式的非常紧密的侧向约束,从而显着减少光学损耗。 通过包括PBG结构,相关联的电触点可以放置在更接近有源区域而不影响光学性能,从而增加电光器件的切换速度。 由于使用PBG用于横向模式限制,整个装置尺寸,电容和电阻也减小。

    SOI-based photonic bandgap devices
    9.
    发明授权
    SOI-based photonic bandgap devices 有权
    基于SOI的光子带隙器件

    公开(公告)号:US07298949B2

    公开(公告)日:2007-11-20

    申请号:US11042774

    申请日:2005-01-24

    IPC分类号: G02B6/10 G02B6/12

    CPC分类号: G02F1/025 G02F2202/32

    摘要: An SOI-based photonic bandgap (PBG) electro-optic device utilizes a patterned PBG structure to define a two-dimensional waveguide within an active waveguiding region of the SOI electro-optic device. The inclusion of the PBG columnar arrays within the SOI structure results in providing extremely tight lateral confinement of the optical mode within the waveguiding structure, thus significantly reducing the optical loss. By virtue of including the PBG structure, the associated electrical contacts may be placed in closer proximity to the active region without affecting the optical performance, thus increasing the switching speed of the electro-optic device. The overall device size, capacitance and resistance are also reduced as a consequence of using PBGs for lateral mode confinement.

    摘要翻译: 基于SOI的光子带隙(PBG)电光器件利用图案化的PBG结构来在SOI电光器件的有源波导区域内限定二维波导。 在SOI结构中包含PBG柱状阵列导致在波导结构内提供光学模式的非常紧密的侧向约束,从而显着减少光学损耗。 通过包括PBG结构,相关联的电触点可以放置在更接近有源区域而不影响光学性能,从而增加电光器件的切换速度。 由于使用PBG用于横向模式限制,整个装置尺寸,电容和电阻也减小。