公开(公告)号：US20090025870A1

公开(公告)日：2009-01-29

申请号：US11994169

申请日：2006-06-30

申请人： Masayuki Tanaka

发明人： Masayuki Tanaka

IPC分类号： B29C65/48 ,  C08J3/28

CPC分类号： C09K3/10 ,  C08F265/04 ,  C08F265/06 ,  C08F290/04 ,  C08F290/06 ,  C08F292/00 ,  C08L2666/02 ,  C09D151/10 ,  C09J151/10 ,  C09K2200/0247 ,  C09K2200/0625 ,  C08F230/08 ,  C08F220/26

摘要： An object of the present invention is to provide a curable composition excellent in on-site formability, excellent in heat resistance, chemical resistance and oil resistance, and low in compression set. The invention relates to a curable composition comprising (a) a vinyl-based polymer containing at least one (meth)acryloyl group in a molecule thereof and having a number average molecular weight of 500 to 1,000,000, (b) an ethylenic unsaturated group-containing compound, (c) a thixotropic property-imparting agent, (d) fumed silica surface-treated with a (meth)acryloyl group-containing silane and (e) a photopolymerization initiator.

摘要翻译： 本发明的目的是提供现场成型性优异，耐热性，耐化学性，耐油性优异，压缩变形性低的固化性组合物。 本发明涉及一种可固化组合物，其包含（a）在其分子中含有至少一个（甲基）丙烯酰基的乙烯基类聚合物，其数均分子量为500〜1,000,000，（b）含烯属不饱和基团 化合物，（c）触变性赋予剂，（d）用（甲基）丙烯酰基的硅烷表面处理的热解法二氧化硅和（e）光聚合引发剂。

公开(公告)号：US20090015552A1

公开(公告)日：2009-01-15

申请号：US12156246

申请日：2008-05-30

申请人： Kenichi Kawasaki ,  Masayuki Tanaka

发明人： Kenichi Kawasaki ,  Masayuki Tanaka

IPC分类号： G06F3/033

CPC分类号： G06F3/0346

摘要： An operation system used for operating a pointer on a display screen includes a first transmitting section, a first receiving section, a measuring section, and an outputting section. The first transmitting section transmits radio waves of a millimeter band. The first receiving section receives the radio waves transmitted from the first transmitting section, a distance between the first transmitting section and the first receiving section being changeable. The measuring section measures an amplitude of the radio waves received by the first receiving section. The outputting section outputs an operation signal for executing an operation of the pointer on the display screen in a depth direction in accordance with a change of the amplitude of the radio waves measured by the measuring section.

摘要翻译： 用于在显示屏幕上操作指针的操作系统包括第一发送部分，第一接收部分，测量部分和输出部分。 第一发送部发送毫米波段的无线电波。 第一接收部分接收从第一发送部分发送的无线电波，第一发送部分和第一接收部分之间的距离是可变的。 测量部分测量由第一接收部分接收的无线电波的幅度。 输出部根据由测量部测量的无线电波的振幅的变化，在深度方向上输出用于执行指示器的操作的操作信号。

公开(公告)号：US20080179655A1

公开(公告)日：2008-07-31

申请号：US12020236

申请日：2008-01-25

申请人： Hirokazu Ishida ,  Masayuki Tanaka ,  Yoshio Ozawa

发明人： Hirokazu Ishida ,  Masayuki Tanaka ,  Yoshio Ozawa

IPC分类号： H01L29/423 ,  H01L21/28

CPC分类号： H01L29/42324 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/40114 ,  H01L29/513

摘要： A nonvolatile semiconductor memory device includes a first insulator, first conductor, element isolation insulator, second insulator and second conductor. The first insulator is formed on the main surface of a substrate and the first conductor is formed on the first insulator. The element isolation insulator is filled into at least part of both side surfaces of the first insulator in a gate width direction thereof and both side surfaces of the first conductor in a gate width direction thereof and is so formed that the upper surface thereof will be set with height between those of the upper and bottom surfaces of the first conductor. The second insulator includes a three-layered insulating film formed of a silicon oxide film, a silicon oxynitride film and a silicon oxide film formed on the first conductor and element isolation insulator. The second conductor is formed on the second insulator.

摘要翻译： 非易失性半导体存储器件包括第一绝缘体，第一导体，元件隔离绝缘体，第二绝缘体和第二导体。 第一绝缘体形成在基板的主表面上，第一导体形成在第一绝缘体上。 元件隔离绝缘体在其栅极宽度方向上填充到第一绝缘体的两个侧表面的至少一部分中，并且第一导体的栅极宽度方向的两个侧表面被形成为使得其上表面将被设置 其高度在第一导体的上表面和底表面之间。 第二绝缘体包括由形成在第一导体和元件隔离绝缘体上的氧化硅膜，氧氮化硅膜和氧化硅膜形成的三层绝缘膜。 第二导体形成在第二绝缘体上。

公开(公告)号：US07335515B2

公开(公告)日：2008-02-26

申请号：US11600734

申请日：2006-11-17

申请人： Hiroshi Tamura ,  Masayuki Tanaka ,  Tatsushi Muta

发明人： Hiroshi Tamura ,  Masayuki Tanaka ,  Tatsushi Muta

IPC分类号： G01N33/533 ,  G01N33/53 ,  G01N33/567

CPC分类号： G01N33/56961 ,  C07K14/43509 ,  G01N33/579 ,  G01N33/582

摘要： A (1→3)-β-D-glucan binding protein, a fluorescence-labeled (1→3)-β-D-glucan binding domain protein, a (1→3)-β-D-glucan measuring agent comprising the same, a method for measuring (1→3)-β-D-glucan using the same, and a (1→3)-β-D-glucan assay kit comprising the same.

摘要翻译： （1-> 3）-β-D-葡聚糖结合蛋白，荧光标记的（1-> 3）-β-D-葡聚糖结合结构域蛋白，（1-> 3）-β-D-葡聚糖测量 包含其的药剂，使用其的β-（1→3）-β-D-葡聚糖的测定方法，以及包含其的（1-> 3）-β-D-葡聚糖测定试剂盒。

公开(公告)号：US20070249120A1

公开(公告)日：2007-10-25

申请号：US11785694

申请日：2007-04-19

申请人： Hirokazu Ishida ,  Masayuki Tanaka

发明人： Hirokazu Ishida ,  Masayuki Tanaka

IPC分类号： H01L21/336 ,  H01L29/94

CPC分类号： H01L27/115 ,  H01L27/11521

摘要： A nonvolatile semiconductor memory device includes a first dielectric layer formed on the major surface of a semiconductor substrate, a floating gate electrode layer formed on the first dielectric layer, a second dielectric layer obtained by sequentially forming, on the floating gate electrode layer, a lower dielectric film mainly containing silicon and nitrogen, an intermediate dielectric film, and an upper dielectric film mainly containing silicon and nitrogen, a control gate electrode layer formed on the second dielectric layer, and a buried dielectric layer formed by covering the two side surfaces in the gate width direction of the stacked structure including the above-mentioned layers. The nonvolatile semiconductor memory device further includes a silicon oxide film formed near the buried dielectric layer in the interface between the floating gate electrode layer and lower dielectric film.

摘要翻译： 非易失性半导体存储器件包括形成在半导体衬底的主表面上的第一电介质层，形成在第一电介质层上的浮栅电极层，通过在浮栅电极层上依次形成下层 主要含有硅和氮的电介质膜，中间电介质膜和主要含有硅和氮的上电介质膜，形成在第二介电层上的控制栅极电极层和通过覆盖第二电介质层中的两个侧表面而形成的掩埋电介质层 包括上述层的层叠结构的栅极宽度方向。 非易失性半导体存储器件还包括在浮置栅极电极层和下部电介质膜之间的界面中形成在掩埋电介质层附近的氧化硅膜。

公开(公告)号：US07247916B2

公开(公告)日：2007-07-24

申请号：US11267334

申请日：2005-11-07

申请人： Yoshio Ozawa ,  Masayuki Tanaka ,  Fumitaka Arai

发明人： Yoshio Ozawa ,  Masayuki Tanaka ,  Fumitaka Arai

IPC分类号： H01L29/76

CPC分类号： H01L27/11521 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11524 ,  H01L29/42324 ,  H01L29/7883

摘要： The memory cell matrix encompasses (a) a plurality device isolation films running along column direction, (b) first conductive layers arranged along row and column-directions, adjacent groups of the first conductive layers are isolated from each other by the device isolation film disposed between the adjacent groups, (c) lower inter-electrode dielectrics arranged respectively on crests of the corresponding first conductive layers, (d) an upper inter-electrode dielectric arranged on the lower inter-electrode dielectric made of insulating material different from the lower inter-electrode dielectrics, and (e) second conductive layers running along the row-direction, arranged on the upper inter-electrode dielectric.

摘要翻译： 存储单元矩阵包括（a）沿着列方向延伸的多个器件隔离膜，（b）沿着行和列方向布置的第一导电层，相邻的第一导电层组通过设置的隔离膜相互隔离 （c）分别布置在相应的第一导电层的顶部上的下部电极间电介质，（d）布置在由绝缘材料制成的下部电极间电介质上的上部电极间电介质， - 电极介质，和（e）布置在上部电极间电介质上的沿着行方向延伸的第二导电层。

公开(公告)号：US07005714B2

公开(公告)日：2006-02-28

申请号：US10724103

申请日：2003-12-01

申请人： Yoshio Ozawa ,  Masayuki Tanaka ,  Fumitaka Arai

发明人： Yoshio Ozawa ,  Masayuki Tanaka ,  Fumitaka Arai

IPC分类号： H01L29/76

CPC分类号： H01L27/11521 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11524 ,  H01L29/42324 ,  H01L29/7883

摘要： The memory cell matrix encompasses (a) a plurality device isolation films running along column direction, (b) first conductive layers arranged along row and column-directions, adjacent groups of the first conductive layers are isolated from each other by the device isolation film disposed between the adjacent groups, (c) lower inter-electrode dielectrics arranged respectively on crests of the corresponding first conductive layers, (d) an upper inter-electrode dielectric arranged on the lower inter-electrode dielectric made of insulating material different from the lower inter-electrode dielectrics, and (e) second conductive layers running along the row-direction, arranged on the upper inter-electrode dielectric.

公开(公告)号：US20050260081A1

公开(公告)日：2005-11-24

申请号：US11190941

申请日：2005-07-28

申请人： Masayuki Tanaka ,  Takashi Nakao ,  Yukihiro Ushiku

发明人： Masayuki Tanaka ,  Takashi Nakao ,  Yukihiro Ushiku

IPC分类号： F04B49/10 ,  C23C16/44 ,  F04B37/16 ,  H01L21/02 ,  F04B49/00 ,  F04B1/00

CPC分类号： C23C16/4412

摘要： A vacuum pumping system includes: an evacuation conduit, having a sequence of monitoring zones serially assigned in an exhaust direction; sensors respectively provided to the monitoring zones and independently detecting the conditions of the monitoring zones; heaters respectively provided to the monitoring zones and being paired with the sensors; and a control unit receiving data signals from the sensors, comparing the data signals with a threshold value, and when the data signals from a specific sensor exceed the threshold value, selectively supplying heating power to a heater of the monitoring zone where the specific sensor is provided.

摘要翻译： 真空泵系统包括：排气管，具有在排气方向上串联排列的一系列监测区; 传感器分别提供给监控区并独立检测监控区的状况; 加热器分别设置在监控区域并与传感器配对; 以及控制单元，其从所述传感器接收数据信号，将所述数据信号与阈值进行比较，并且当来自特定传感器的数据信号超过所述阈值时，选择性地向所述监测区域的加热器供应加热功率， 提供。

公开(公告)号：US20050014354A1

公开(公告)日：2005-01-20

申请号：US10916500

申请日：2004-08-12

申请人： Yoshio Ozawa ,  Masayuki Tanaka ,  Kiyotaka Miyano ,  Shigehiko Saida

发明人： Yoshio Ozawa ,  Masayuki Tanaka ,  Kiyotaka Miyano ,  Shigehiko Saida

IPC分类号： H01L29/78 ,  H01L29/49 ,  H01L21/338 ,  H01L21/3205 ,  H01L21/4763

CPC分类号： H01L29/4983 ,  H01L29/41783 ,  H01L29/6656

摘要： A semiconductor device includes a semiconductor device comprising a semiconductor substrate, source/drain regions formed in the semiconductor substrate, a gate insulation film formed on the semiconductor substrate, a gate electrode formed on the gate insulation film between the source/drain regions, and a gate sidewall spacer formed on side surfaces of the gate electrode, wherein the gate sidewall spacer is composed of silicon oxide containing 0.1-30 atomic % of chlorine.

摘要翻译： 半导体器件包括半导体器件，其包括半导体衬底，形成在半导体衬底中的源极/漏极区域，形成在半导体衬底上的栅极绝缘膜，形成在源极/漏极区域之间的栅极绝缘膜上的栅电极和 形成在栅电极的侧表面上的栅极侧壁间隔物，其中栅极侧壁间隔物由含有0.1-30原子％氯的氧化硅组成。

公开(公告)号：US20050002231A1

公开(公告)日：2005-01-06

申请号：US10724103

申请日：2003-12-01

申请人： Yoshio Ozawa ,  Masayuki Tanaka ,  Fumitaka Arai

发明人： Yoshio Ozawa ,  Masayuki Tanaka ,  Fumitaka Arai

IPC分类号： G11C11/34 ,  H01L21/28 ,  H01L21/336 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

CPC分类号： H01L27/11521 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11524 ,  H01L29/42324 ,  H01L29/7883

摘要： The memory cell matrix encompasses (a) a plurality device isolation films running along column direction, (b) first conductive layers arranged along row and column-directions, adjacent groups of the first conductive layers are isolated from each other by the device isolation film disposed between the adjacent groups, (c) lower inter-electrode dielectrics arranged respectively on crests of the corresponding first conductive layers, (d) an upper inter-electrode dielectric arranged on the lower inter-electrode dielectric made of insulating material different from the lower inter-electrode dielectrics, and (e) second conductive layers running along the row-direction, arranged on the upper inter-electrode dielectric.

摘要翻译： 存储单元矩阵包括（a）沿着列方向延伸的多个器件隔离膜，（b）沿着行和列方向布置的第一导电层，相邻的第一导电层组通过设置的隔离膜相互隔离 （c）分别布置在相应的第一导电层的顶部上的下部电极间电介质，（d）布置在由绝缘材料制成的下部电极间电介质上的上部电极间电介质， - 电极介质，和（e）布置在上部电极间电介质上的沿着行方向延伸的第二导电层。