公开(公告)号：US07730869B2

公开(公告)日：2010-06-08

申请号：US11786977

申请日：2007-04-13

申请人： Yan Li

发明人： Yan Li

IPC分类号： F02B53/00 ,  F01C1/00 ,  F04C18/00 ,  F04C2/00 ,  F16H57/08 ,  F16H37/08 ,  F16H3/44 ,  F16H3/74

CPC分类号： F02B53/04 ,  F01B2009/045 ,  F01C1/077 ,  F02B53/06 ,  Y02T10/17

摘要： Disclosed herein is a housing wheel engine that has a wheel shaped combustion housing, the housing wheel engine can hold several pistons which both sides working inside the combustion housing. The housing wheel engine transfers its rotating movement directly to the driveshaft by the planetary gearsets. A four-stroke time mechanism provided by the planetary gearsets.

摘要翻译： 这里公开了具有轮形燃烧壳体的壳轮发动机，壳体轮发动机可以容纳多个活塞，两个活塞在燃烧壳体内部工作。 外壳轮发动机通过行星齿轮组件将其旋转运动直接传递到驱动轴。 由行星齿轮组提供的四冲程时间机构。

公开(公告)号：US20100126639A1

公开(公告)日：2010-05-27

申请号：US12451232

申请日：2008-06-30

申请人： Liang Zuo ,  Fuxiao Yu ,  Gang Zhao ,  Xiang Zhao ,  Yongliang Yang ,  Yan Li

发明人： Liang Zuo ,  Fuxiao Yu ,  Gang Zhao ,  Xiang Zhao ,  Yongliang Yang ,  Yan Li

IPC分类号： C22F1/05 ,  C22F1/04

CPC分类号： C22C21/02 ,  C22F1/043

摘要： The magnesium-contained high-silicon aluminum alloys for use as structural materials, including profiles, bars, sheets, and forgings, are manufactured by a process including the steps of: casting an alloy ingot by direct chill casting, preheating the ingot to disperse eutectic Si phase particles, and thermal-plastic processing and heat-treating to obtain the product with a final shape and a modified microstructure. The aluminum alloys contain 0.2˜2.0 wt % of Mg and 8˜18 wt % of Si, and have homogeneous and fine microstructure, wherein the aluminum matrix is equiaxed with an average grain size less than 6 μm, and the silicon and second phase particles are dispersed with an average size less than 5 μm. Without adding any modifiers, they are low-costly produced by incorporating the direct chill casting with thermal-plastic processing and heat treatment, which give rise to good plasticity and relatively high strength.

摘要翻译： 用于结构材料的含镁高硅铝合金，包括型材，棒材，片材和锻件，通过包括以下步骤的方法制造：通过直接冷却铸造铸造合金锭，预热锭以分散共晶 Si相颗粒，热塑性加工和热处理，得到具有最终形状和改性微结构的产品。 铝合金含有0.2〜2.0重量％的Mg和8〜18重量％的Si，并且具有均匀且精细的微观结构，其中铝基体的等轴晶粒尺寸小于6μm，硅和第二相颗粒 以小于5μm的平均尺寸分​​散。 没有添加任何改性剂，它们通过引入具有热塑性加工和热处理的直接冷却铸造而成本低廉，这导致良好的塑性和相对高的强度。

公开(公告)号：US07711099B2

公开(公告)日：2010-05-04

申请号：US11315435

申请日：2005-12-22

申请人： Caixia Miao ,  Hao Liu ,  Shaojie Mei ,  Yan Li ,  Yong Zhu

发明人： Caixia Miao ,  Hao Liu ,  Shaojie Mei ,  Yan Li ,  Yong Zhu

IPC分类号： H04M3/42

CPC分类号： H04M7/00 ,  H04M3/58 ,  H04W76/11 ,  H04W76/22

摘要： Disclosed herein is a method and a network structure for moving a call leg, and implementing a call leg move with the network structure. The method includes creating a call leg moving interface and its method interface reference parameters, which are used to move a call leg from an original call to a destination call. The interface reference parameters are an identifier of a call leg to be moved and a destination call identifier. The method further includes, if an application wants to move the call leg, determining the interface reference parameters according to the call leg and the destination call, and invoking the call leg moving interface to move the call leg from the original call to the destination call with the interface reference parameters. In this manner, the disclosed method provides a simple, convenient, easy to implement and spread interface to the application to move the call leg from one call to another.

摘要翻译： 本文公开了一种用于移动呼叫支路的方法和网络结构，并且利用网络结构实现呼叫支路移动。 该方法包括创建呼叫支路移动接口及其方法接口参考参数，用于将呼叫线从原始呼叫移动到目的地呼叫。 接口参考参数是要移动的呼叫支路的标识符和目的地呼叫标识符。 该方法还包括：如果应用程序想要移动呼叫支路，则根据呼叫支路和目的地呼叫确定接口参考参数，并且调用呼叫支路移动接口将呼叫支路从原始呼叫移动到目的地呼叫 具有接口参考参数。 以这种方式，所公开的方法为应用程序提供了简单，方便，易于实现和扩展的接口，以将呼叫线从一个呼叫移动到另一个呼叫。

公开(公告)号：US20100091573A1

公开(公告)日：2010-04-15

申请号：US12249678

申请日：2008-10-10

申请人： Yan Li ,  Yupin Kawing Fong ,  Siu Lung Chan

发明人： Yan Li ,  Yupin Kawing Fong ,  Siu Lung Chan

IPC分类号： G11C16/34 ,  G11C16/10

CPC分类号： G11C11/5628 ,  G11C16/0483 ,  G11C2211/5621

摘要： A group of non-volatile memory cells are programmed in a programming pass by a series of incremental programming pulses where each pulse is followed by a program-verify and possibly program-inhibition step. Performance is improved during the programming pass by delayed starting and prematurely terminating the various verify levels that demarcate the multiple memory states. This amounts to skipping the verifying and inhibiting steps of the fastest and slowest programming (fringe) cells of the group. A reference pulse is established when the fastest cells have all been program-verified relative to a first verify level. The starting of what verify level at what pulse will then be delayed relative to the reference pulse. Verifying stops for a given verify level when only a predetermined number of cells remain unverified relative to that given level. Any errors arising from over- or under-programming of the fringe cells are corrected by an error correction code.

摘要翻译： 一组非易失性存储器单元通过一系列递增编程脉冲在编程过程中被编程，其中每个脉冲之后是程序验证和可能的编程禁止步骤。 在编程过程中，通过延迟启动和过早终止划分多个存储器状态的各种验证电平来提高性能。 这相当于跳过组中最快和最慢编程（边缘）单元的验证和禁止步骤。 当最快的单元格相对于第一验证电平全部被程序验证时，建立参考脉冲。 什么脉冲上的什么验证电平的开始将相对于参考脉冲被延迟。 当相对于该给定级别只有预定数量的单元格未被验证时，验证给定验证级别的停止。 由边缘单元的过度编程或编程不足引起的任何错误都由纠错码进行校正。

公开(公告)号：US20100017846A1

公开(公告)日：2010-01-21

申请号：US12564558

申请日：2009-09-22

申请人： Shibi Huang ,  Peng Zhao ,  Yuxin Mao ,  Shiyong Tan ,  Yan Li ,  Weihua Wei

发明人： Shibi Huang ,  Peng Zhao ,  Yuxin Mao ,  Shiyong Tan ,  Yan Li ,  Weihua Wei

IPC分类号： G06F21/24

CPC分类号： H04L47/2433 ,  H04L12/14 ,  H04L12/66 ,  H04L41/0893 ,  H04L41/0896 ,  H04L41/5003 ,  H04M15/66

摘要： A service processing method, a service processing system, and a PCRF entity are disclosed to overcome this defect in the prior art: The prior art is unable to handle services discriminatively according to the policy context information when different services require the same QoS level. The method includes: receiving bearer priority information from a PCRF entity, where the bearer priority information includes: bearer priority information of a service data stream, bearer priority information of an IP-CAN session, and/or bearer priority information of an IP-CAN bearer; and handling services according to the bearer priority information. In the embodiments of the present invention, the policy context information is converted into bearer priority information so that the PCEF handles services according to the bearer priority information. In this way, different services that require the same QoS level are handled discriminatively according to the policy context information.

摘要翻译： 公开了一种服务处理方法，服务处理系统和PCRF实体来克服现有技术中的这种缺陷：当不同的服务需要相同的QoS级别时，现有技术不能根据策略上下文信息区别地处理服务。 该方法包括：从PCRF实体接收承载优先级信息，其中承载优先级信息包括：业务数据流的承载优先级信息，IP-CAN会话的承载优先级信息和/或IP-CAN承载优先级信息 承载人 并根据承载优先级信息处理业务。 在本发明的实施例中，策略上下文信息被转换为承载优先级信息，使得PCEF根据承载优先级信息来处理业务。 以这种方式，根据策略上下文信息来区别地处理需要相同QoS级别的不同服务。

公开(公告)号：US07616499B2

公开(公告)日：2009-11-10

申请号：US11617541

申请日：2006-12-28

申请人： Jun Wan ,  Jeffrey W. Lutze ,  Jian Chen ,  Yan Li ,  Alex Mak

发明人： Jun Wan ,  Jeffrey W. Lutze ,  Jian Chen ,  Yan Li ,  Alex Mak

IPC分类号： G11C11/34 ,  G11C16/04 ,  G11C16/06

CPC分类号： G11C16/0483 ,  G11C11/5628 ,  G11C16/3454 ,  G11C16/3459 ,  G11C2211/5621

摘要： Data verification in a memory device using a portion of a data retention margin is provided. A bit count is read from the region to determine whether errors will result in the memory. A read in one or more retention margin portions is performed after the normal program verify sequence and if the number of bits in these regions is more than a pre-set the memory will fail verify status. A method of verifying data in a memory device includes the steps of: defining an retention margin between adjacent data thresholds; programming the memory device with data; determining whether bits are present in the data retention margin; and if the number of bits in the retention margin exceeds a threshold, generating an error.

摘要翻译： 提供了使用部分数据保留余量的存储器件中的数据验证。 从区域读取位计数，以确定错误是否会导致内存。 在正常程序验证序列之后执行在一个或多个保留边缘部分中的读取，并且如果这些区域中的位数大于预设，则存储器将失败验证状态。 验证存储器件中的数据的方法包括以下步骤：定义相邻数据阈值之间的保留余量; 使用数据对存储设备进行编程; 确定位是否存在于数据保留余量中; 并且如果保留余量中的比特数超过阈值，则产生错误。

公开(公告)号：US07608628B2

公开(公告)日：2009-10-27

申请号：US11609166

申请日：2006-12-11

申请人： Thomas R. Simpson ,  James Kang ,  Jeffrey S. Albert ,  Cristobal Alhambra ,  Gerald M. Koether ,  James Woods ,  Yan Li

发明人： Thomas R. Simpson ,  James Kang ,  Jeffrey S. Albert ,  Cristobal Alhambra ,  Gerald M. Koether ,  James Woods ,  Yan Li

IPC分类号： C07D215/38 ,  A61K31/47 ,  A61P1/00 ,  A61P35/00 ,  A61P37/00 ,  A61P5/00 ,  A61P9/00

CPC分类号： C07D215/38 ,  C07D215/14 ,  C07D215/52

摘要： Compounds of Formula II wherein R1, A, R2, R3, R4, R5, R8, n, m and q are as described in the specification, pharmaceutically-acceptable salts, methods of making, pharmaceutical compositions containing and methods for using the same.

摘要翻译： 式II的化合物，其中R 1，A，R 2，R 3，R 4，R 5，R 8，n，m和q如说明书中所述，药学上可接受的盐，制备方法，药物组合物及其使用方法。

公开(公告)号：US20090237999A1

公开(公告)日：2009-09-24

申请号：US12051492

申请日：2008-03-19

申请人： Yan Li

发明人： Yan Li

IPC分类号： G11C16/04 ,  G11C16/06

CPC分类号： G11C11/5628 ,  G11C2211/5648

摘要： For a non-volatile memory storing three or more bits per cell, pages of data are written in an order where more than one, but less than all of the logical pages that a physical page along a wordline can store are written concurrently. More than one, but less than all of the logical pages that a physical page along a wordline can store are then written concurrently on an adjacent wordline. The process then comes back to the first wordline and writes at least one more logical page. A process is also described where one or more logical pages are written into a physical page along a wordline, after which one or more logical pages are written into a physical page along an adjacent wordline. A read operation is then performed on the first wordline and the resultant read is corrected based on the result of programming the adjacent wordline. This corrected read is then used in writing at least one more logical page in a second programming operation on the first wordline.

摘要翻译： 对于每个单元存储三个或更多位的非易失性存储器，以与字线一起的物理页面可以存储的所有逻辑页面多于一个但是小于同时写入的所有逻辑页面的顺序写入数据页。 但是，一个字面上可以存储的物理页面上的所有逻辑页面都可以同时写在相邻的字线上。 然后，该过程返回到第一个字线，并写入至少一个逻辑页面。 还描述了一个过程，其中一个或多个逻辑页面沿着字线被写入物理页面，之后将一个或多个逻辑页面沿着相邻字线写入物理页面。 然后对第一字线执行读取操作，并且基于相邻字线的编程结果校正所得到的读取。 然后，在第一字线上的第二编程操作中，将该校正后的读取写入至少一个逻辑页面。

公开(公告)号：US20090237998A1

公开(公告)日：2009-09-24

申请号：US12051462

申请日：2008-03-19

申请人： Yan Li ,  Anne Pao-Ling Koh

发明人： Yan Li ,  Anne Pao-Ling Koh

IPC分类号： G11C16/04 ,  G11C16/06 ,  G11C7/00

CPC分类号： G11C16/10 ,  G06F12/0855 ,  G06F2212/2022 ,  G11C7/1039 ,  G11C7/1078 ,  G11C7/1087 ,  G11C11/5628 ,  G11C11/5642 ,  G11C2207/2245 ,  G11C2211/5623 ,  G11C2211/5642 ,  G11C2211/5643

摘要： A non-volatile memory can perform a first operation (such as a write, for example) on a designated group of one or more addressed pages using a first set of data stored in the corresponding set of data latches and also receive a request for a second operation (such as a read, for example) that also uses some of these corresponding data latches with a second set of data. During the first operation, when at least one latch of each set of the corresponding become available for the second operation, the memory whether there are a sufficient number of the corresponding set of data latches to perform the second operation during the first operation; if not, the second operation is delayed. The memory subsequently can perform the second operation during the first operation when a sufficient number of latches become available; and if, in response to determining whether there are a sufficient number of the corresponding set of data latches to perform the second operation it is determined that there are a sufficient number, performing the second operation during the first operation.

摘要翻译： 非易失性存储器可以使用存储在相应的数据锁存器组中的第一组数据来执行一个或多个寻址页面的指定组上的第一操作（例如写入），并且还接收对 还使用具有第二组数据的这些相应的数据锁存器中的一些的第二操作（例如读取）。 在第一操作期间，当对应的每组的至少一个锁存器变得可用于第二操作时，存储器是否存在足够数量的对应的一组数据锁存器以在第一操作期间执行第二操作; 如果没有，则第二操作被延迟。 当足够数量的锁存器变得可用时，存储器随后可以在第一操作期间执行第二操作; 并且如果响应于确定是否存在足够数量的对应的数据锁存器组来执行第二操作，则确定存在足够的数量，在第一操作期间执行第二操作。

公开(公告)号：US20090178028A1

公开(公告)日：2009-07-09

申请号：US12350820

申请日：2009-01-08

申请人： Steven Francis Best ,  Yan Li ,  Yao Qi ,  Wei Ying Yu ,  Yong Zheng

发明人： Steven Francis Best ,  Yan Li ,  Yao Qi ,  Wei Ying Yu ,  Yong Zheng

IPC分类号： G06F11/36

CPC分类号： G06F11/3664 ,  G06F9/45512 ,  G06F9/541

摘要： A method and system for invoking Just-In-Time debugger is described, which can provide more efficient JIT debugging for complex code mixed applications. A method for invoking a Just-In-Time (JIT) debugger according to one embodiment includes checking a code type of a code address where a JIT debugging request is triggered from a process of a code-mixed application in response to the JIT debugging request from the process; acquiring corresponding JIT debugging information for different code types of the code-mixed application; and invoking a JIT debugger corresponding to the code type in response to the checked code type of the code address in the process and the acquired corresponding JIT debugging information.

摘要翻译： 描述了一种用于调用即时调试器的方法和系统，可以为复杂的代码混合应用程序提供更有效的JIT调试。 根据一个实施例的用于调用即时（JIT）调试器的方法包括：响应于JIT调试请求，从代码混合应用程序的过程检查JIT调试请求被触发的代码地址的代码类型 从过程中 为代码混合应用程序的不同代码类型获取相应的JIT调试信息; 以及响应于所述处理中的代码地址的所检查的代码类型和所获取的相应的JIT调试信息来调用与所述代码类型相对应的JIT调试器。