ZENER DIODE WITH REDUCED SUBSTRATE CURRENT
    62.
    发明申请
    ZENER DIODE WITH REDUCED SUBSTRATE CURRENT 有权
    具有减少衬底电流的ZENER二极管

    公开(公告)号:US20110175199A1

    公开(公告)日:2011-07-21

    申请号:US12689120

    申请日:2010-01-18

    IPC分类号: H01L29/866 H01L29/06

    摘要: A Zener diode is fabricated on a semiconductor substrate having semiconductor material thereon. The Zener diode includes a first well region having a first conductivity type, formed in the semiconductor material. The Zener diode also includes a first region having a second conductivity type, formed in the first well region (the second conductivity type is opposite the first conductivity type). The Zener diode also includes a second region having the first conductivity type, wherein the second region is formed in the first well region and overlying the first region. An electrode is formed in the first region, and the electrode is electrically coupled to the second region.

    摘要翻译: 在其上具有半导体材料的半导体衬底上制造齐纳二极管。 齐纳二极管包括形成在半导体材料中的具有第一导电类型的第一阱区。 齐纳二极管还包括形成在第一阱区(第二导电类型与第一导电类型相反)的第二导电类型的第一区。 齐纳二极管还包括具有第一导电类型的第二区域,其中第二区域形成在第一阱区域中并且覆盖第一区域。 在第一区域中形成电极,并且电极电连接到第二区域。

    Adjustable bipolar transistors formed using a CMOS process
    63.
    发明授权
    Adjustable bipolar transistors formed using a CMOS process 有权
    使用CMOS工艺形成的可调双极晶体管

    公开(公告)号:US07927955B2

    公开(公告)日:2011-04-19

    申请号:US12142115

    申请日:2008-06-19

    IPC分类号: H01L21/331

    摘要: By providing a novel bipolar device design implementation, a standard CMOS process (105-109) can be used unchanged to fabricate useful bipolar transistors (80) and other bipolar devices having adjustable properties by partially blocking the P or N well doping (25) used for the transistor base (581). This provides a hump-shaped base (583, 584) region with an adjustable base width (79), thereby achieving, for example, higher gain than can be obtained with the unmodified CMOS process (101-104) alone. By further partially blocking the source/drain doping step (107) used to form the emitter (74) of the bipolar transistor (80), the emitter shape and effective base width (79) can be further varied to provide additional control over the bipolar device (80) properties. The embodiments thus include prescribed modifications to the masks (57, 62, 72, 46) associated with the bipolar device (80) that are configured to obtain desired device properties. The CMOS process steps (105-109) and flow are otherwise unaltered and no additional process steps are required.

    摘要翻译: 通过提供一种新颖的双极器件设计实现,标准CMOS工艺(105-109)可以不变地用于制造有用的双极晶体管(80)和其他具有可调整特性的双极器件,通过部分阻塞使用的P或N阱掺杂(25) 用于晶体管基极(581)。 这提供了具有可调底座宽度(79)的驼峰形基部(583,584)区域,从而实现例如比仅用未修改的CMOS工艺(101-104)可获得的增益更高的增益。 通过进一步部分地阻挡用于形成双极晶体管(80)的发射极(74)的源/漏掺杂步骤(107),可以进一步改变发射极形状和有效基极宽度(79),以提供对双极晶体管 设备(80)属性。 因此,这些实施例包括与被配置为获得期望的器件特性的与双极器件(80)相关联的掩模(57,62,72,46)的规定修改。 CMOS工艺步骤(105-109)和流程否则不变,并且不需要额外的工艺步骤。

    Multi-gate semiconductor device and method for forming the same
    64.
    发明授权
    Multi-gate semiconductor device and method for forming the same 有权
    多栅半导体器件及其形成方法

    公开(公告)号:US07910441B2

    公开(公告)日:2011-03-22

    申请号:US11489793

    申请日:2006-07-19

    IPC分类号: H01L21/8234

    摘要: A semiconductor device includes a substrate (20), a source region (58) formed over the substrate, a drain region (62) formed over the substrate, a first gate electrode (36) over the substrate adjacent to the source region and between the source and drain regions, and a second gate electrode (38) over the substrate adjacent to the drain region and between the source and drain regions.

    摘要翻译: 半导体器件包括衬底(20),形成在衬底上的源区(58),形成在衬底上的漏区(62),与源区相邻的衬底上的第一栅极(36) 源极和漏极区域以及与漏极区域相邻并且在源极和漏极区域之间的衬底上的第二栅电极(38)。

    BIPOLAR TRANSISTOR
    65.
    发明申请
    BIPOLAR TRANSISTOR 有权
    双极晶体管

    公开(公告)号:US20110012232A1

    公开(公告)日:2011-01-20

    申请号:US12502812

    申请日:2009-07-14

    IPC分类号: H01L29/735 H01L21/331

    摘要: An improved device (20) is provided, comprising, merged vertical (251) and lateral transistors (252), comprising thin collector regions (34) of a first conductivity type sandwiched between upper (362) and lower (30) base regions of opposite conductivity type that are Ohmically coupled via intermediate regions (32, 361) of the same conductivity type and to the base contact (38). The emitter (40) is provided in the upper base region (362) and the collector contact (42) is provided in outlying sinker regions (28) extending to the thin collector regions (34) and an underlying buried layer (28). As the collector voltage increases part of the thin collector regions (34) become depleted of carriers from the top by the upper (362) and from the bottom by the lower (30) base regions. This clamps the thin collector regions' (34) voltage well below the breakdown voltage of the PN junction formed between the buried layer (28) and the lower base region (30). The gain and Early Voltage are increased and decoupled and a higher breakdown voltage is obtained.

    摘要翻译: 提供了一种改进的装置(20),包括合并的垂直(251)和横向晶体管(252),其包括夹在相对的上部(362)和下部(30)底部区域之间的第一导电类型的集电极区域(34) 导电类型通过相同导电类型的中间区域(32,361)和基极触点(38)经欧姆耦合。 发射极(40)设置在上部基极区域(362)中,并且集电极触点(42)设置在延伸到薄的集电极区域(34)和下面的掩埋层(28)的外部沉降片区域(28)中。 当集电极电压增加时,薄集电极区域(34)的一部分从上部(362)从顶部变成载流子,而从底部减少下部(30)的基极区域。 这样使得集电极区域(34)的电压远低于形成在掩埋层(28)和下部基极区域(30)之间的PN结的击穿电压。 增益和早期电压增加和解耦,并获得更高的击穿电压。

    SCHOTTKY DIODE
    66.
    发明申请
    SCHOTTKY DIODE 有权
    肖特基二极管

    公开(公告)号:US20100187577A1

    公开(公告)日:2010-07-29

    申请号:US12359845

    申请日:2009-01-26

    IPC分类号: H01L29/78 H01L21/34

    摘要: Improved Schottky diodes (20) with reduced leakage current and improved breakdown voltage are provided by building a JFET (56) into the diode, serially located in the anode-cathode current path (32). The gates of the JFET (56) formed by doped regions (38, 40) placed above and below the diode's current path (32) are coupled to the anode (312) of the diode (20), and the current path (32) passes through the channel region (46) of the JFET (56). Operation is automatic so that as the reverse voltage increases, the JFET (56) channel region (46) pinches off, thereby limiting the leakage current and clamping the voltage across the Schottky junction (50) at a level below the Schottky junction (50) breakdown. Increased reverse voltage can be safely applied until the device eventually breaks down elsewhere. The impact on device area and area efficiency is minimal and the device can be built using a standard fabrication process so that it can be easily integrated into complex ICs.

    摘要翻译: 通过在串联地位于阳极 - 阴极电流路径(32)中的二极管中构建JFET(56)来提供具有减小的漏电流和改善的击穿电压的改进的肖特基二极管(20)。 由位于二极管电流路径(32)上方和下方的掺杂区域(38,40)形成的JFET(56)的栅极耦合到二极管(20)的阳极(312),并且电流路径(32) 通过JFET(56)的沟道区(46)。 操作是自动的,使得当反向电压增加时,JFET(56)沟道区域(46)夹紧,由此限制漏电流并将肖特基结(50)上的电压钳位在低于肖特基结(50)的水平处, 分解。 可以安全地应用增加的反向电压,直到器件最终在其他地方崩溃。 对器件面积和面积效率的影响最小,可以使用标准制造工艺构建器件,从而可以轻松集成到复杂IC中。

    Telomerase delivery by biodegradable Nanoparticle
    67.
    发明申请
    Telomerase delivery by biodegradable Nanoparticle 审中-公开
    通过生物降解纳米颗粒递送端粒酶

    公开(公告)号:US20090142408A1

    公开(公告)日:2009-06-04

    申请号:US12220221

    申请日:2008-07-22

    IPC分类号: A61K9/14 A61K38/43

    摘要: A therapeutic compound consisting of human telomerase, its catalytic subunit hTert, or a known variant of either, and a biodegradable nanoparticle carrier, which can be administered to cells in a cell culture or in a living animal, is provided herein. The therapeutic compound is envisioned as a method for treating a wide variety of age-related diseases such as idiopathic pulmonary fibrosis, aplastic anemia, dyskeratosis congenita, arteriosclerosis, macular degeneration, osteoporosis, Alzheimer's, diabetes type 2, and any disease that correlates with telomere shortening and may be corrected or ameliorated by lengthening telomeres. The therapeutic compound is also envisioned as method for potentially treating more generic problems of human aging. The nanoparticle carrier is comprised of certain biodegradable biocompatible polymers such as poly(lactide-co-glycolide), poly(lactic acid), poly(alkylene glycol), polybutylcyanoacrylate, poly(methylmethacrylate-co-methacrylic acid), poly-allylamine, polyanhydride, polyhydroxybutyric acid, polycaprolactone, lactide-caprolactone copolymers, polyhydroxybutyrate, polyalkylcyanoacrylates, polyanhydrides, polyorthoester or a combination thereof. The nanoparticle may incorporate a targeting moiety to direct the nanoparticle to a particular tissue type or a location within a cell. The nanoparticle may incorporate a plasticizer to facilitate sustained release of telomerase such as L-tartaric acid dimethyl ester, triethyl citrate, or glyceryl triacetate. A nanoparticle of the present invention can further contain a polymer that affects the charge or lipophilicity or hydrophilicity of the particle. Any biocompatible hydrophilic polymer can be used for this purpose, including but not limited to, poly(vinyl alcohol).

    摘要翻译: 本文提供由人端粒酶,其催化亚单位hTert或其可以施用于细胞培养物或活体动物中的细胞的已知变体和可生物降解的纳米粒子载体组成的治疗化合物。 治疗化合物被设想为治疗各种年龄相关疾病的方法,例如特发性肺纤维化,再生障碍性贫血,先天性角化不全,动脉硬化,黄斑变性,骨质疏松症,阿尔茨海默病,2型糖尿病和与端粒相关的任何疾病 缩短,并可以通过延长端粒来改正或改善。 治疗化合物也被设想为用于潜在地治疗更常见的人类衰老问题的方法。 纳米颗粒载体由某些可生物降解的生物相容性聚合物如聚(丙交酯 - 共 - 乙交酯),聚(乳酸),聚(亚烷基二醇),聚氰基丙烯酸丁酯,聚(甲基丙烯酸甲酯 - 共 - 甲基丙烯酸),聚烯丙基胺,聚酐 ,聚羟基丁酸,聚己内酯,丙交酯 - 己内酯共聚物,聚羟基丁酸酯,聚氰基氰基丙烯酸烷基酯,聚酐,聚原酸酯或其组合。 纳米颗粒可以结合靶向部分以将纳米颗粒引导到特定组织类型或细胞内的位置。 纳米颗粒可以掺入增塑剂以促进端粒酶例如L-酒石酸二甲酯,柠檬酸三乙酯或三乙酸甘油酯的持续释放。 本发明的纳米颗粒还可以含有影响颗粒的电荷或亲油性或亲水性的聚合物。 任何生物相容的亲水性聚合物可用于此目的,包括但不限于聚(乙烯醇)。

    Multi-gate semiconductor device and method for forming the same
    68.
    发明申请
    Multi-gate semiconductor device and method for forming the same 有权
    多栅半导体器件及其形成方法

    公开(公告)号:US20080121997A1

    公开(公告)日:2008-05-29

    申请号:US11489793

    申请日:2006-07-19

    IPC分类号: H01L29/78 H01L21/04

    摘要: A semiconductor device includes a substrate (20), a source region (58) formed over the substrate, a drain region (62) formed over the substrate, a first gate electrode (36) over the substrate adjacent to the source region and between the source and drain regions, and a second gate electrode (38) over the substrate adjacent to the drain region and between the source and drain regions.

    摘要翻译: 半导体器件包括衬底(20),形成在衬底上的源区(58),形成在衬底上的漏区(62),与源区相邻的衬底上的第一栅极(36) 源极和漏极区域以及与漏极区域相邻并且在源极和漏极区域之间的衬底上的第二栅电极(38)。

    Inhibitor of the inflammatory response induced by TNF&agr; and IL-1
    69.
    发明授权
    Inhibitor of the inflammatory response induced by TNF&agr; and IL-1 有权
    TNFalpha和IL-1诱导的炎症反应抑制剂

    公开(公告)号:US06645728B2

    公开(公告)日:2003-11-11

    申请号:US09871889

    申请日:2001-06-01

    IPC分类号: G01N33567

    CPC分类号: C12N9/1205

    摘要: The present invention provides the molecular basis for cytokine induction of NF-&kgr;B-dependent immune and inflammatory responses, emphasizing a role for both NIK-NIK and NIK-IKK protein—protein interactions. A relatively small region of NIK selectively impairs the NIK-IKK interaction. The present invention provides a novel and highly specific method for modulating NF-&kgr;B-dependent immune, inflammatory, and anti-apoptotic responses, based on interruption of the critical protein—protein interaction of NIK and IKK. The present invention provides methods for inhibiting NF-&kgr;B-dependent gene expression, using mutant NIK proteins. One embodiment of the present invention provides kinase-deficient NIK mutant proteins that inhibit activation of IKK. Another embodiment of the invention provides N-terminus NIK mutant proteins that bind IKK, thus inhibiting NIK/IKK interaction.

    摘要翻译: 本发明提供NF-κB依赖性免疫和炎症反应的细胞因子诱导的分子基础,强调NIK-NIK和NIK-IKK蛋白质 - 蛋白质相互作用的作用。 NIK相对较小的区域选择性地损害NIK-IKK相互作用。 本发明提供了一种基于NIK和IKK的关键蛋白质 - 蛋白质相互作用中断来调节NF-κB依赖性免疫,炎症和抗凋亡反应的新型和高度特异性的方法。 本发明提供使用突变NIK蛋白抑制NF-κB依赖性基因表达的方法。 本发明的一个实施方案提供抑制IKK活化的激酶缺陷型NIK突变蛋白。 本发明的另一个实施方案提供结合IKK的N末端NIK突变蛋白,从而抑制NIK / IKK相互作用。

    Low temperature, high quality silicon dioxide thin films deposited using tetramethylsilane (TMS) for stress control and coverage applications
    70.
    发明授权
    Low temperature, high quality silicon dioxide thin films deposited using tetramethylsilane (TMS) for stress control and coverage applications 有权
    使用四甲基硅烷(TMS)沉积的低温,高品质二氧化硅薄膜用于应力控制和覆盖应用

    公开(公告)号:US06531193B2

    公开(公告)日:2003-03-11

    申请号:US09734232

    申请日:2000-12-11

    IPC分类号: C23C1640

    摘要: Silicon dioxide thin film have been deposited at temperatures from 25° C. to 250° C. by plasma enhanced chemical vapor deposition (PECVD) using tetramethylsilane (TMS) as the silicon containing precursor. At these temperatures, the PETMS oxide films have been found to exhibit adjustable stress and adjustable conformality. Post deposition annealing in forming gas at or below the deposition temperatures has been shown to be very effective in improving the PETMS oxide properties while preserving the low temperature aspect of the PETMS oxides.

    摘要翻译: 通过使用四甲基硅烷(TMS)作为含硅前体的等离子体增强化学气相沉积(PECVD),在25℃至250℃的温度下沉积二氧化硅薄膜。 在这些温度下,已经发现PETMS氧化物膜具有可调节的应力和可调整的共形性。 已经表明,在沉积温度或低于沉积温度的成形气体中的后沉积退火在改善PETMS氧化物性能同时保持PETMS氧化物的低温方面是非常有效的。