公开(公告)号：US20220181501A1

公开(公告)日：2022-06-09

申请号：US17114554

申请日：2020-12-08

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Siva P. Adusumilli ,  John J. Ellis-Monaghan ,  Steven M. Shank ,  Yves T. Ngu ,  Michael J. Zierak

IPC: H01L29/786 ,  H01L29/04 ,  H01L21/02 ,  H01L21/8234

Abstract: Disclosed is a structure including a semiconductor layer with a device area and, within the device area, a monocrystalline portion and polycrystalline portion(s) that extend through the monocrystalline portion. The structure includes an active device including a device component, which is in device area and which includes polycrystalline portion(s). For example, the device can be a field effect transistor (FET) (e.g., a simple FET or a multi-finger FET for a low noise amplifier or RF switch) with at least one source/drain region, which is in the device area and which includes at least one polycrystalline portion that extends through the monocrystalline portion. The embodiments can vary with regard to the type of structure (e.g., bulk or SOI), with regard to the type of device therein, and also with regard to the number, size, shape, location, orientation, etc. of the polycrystalline portion(s). Also disclosed is a method for forming the structure.

公开(公告)号：US11322357B2

公开(公告)日：2022-05-03

申请号：US16806383

申请日：2020-03-02

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Siva P. Adusumilli ,  Anthony K. Stamper ,  Michel J. Abou-Khalil ,  John J. Ellis-Monaghan ,  Bojidha Babu

IPC: H01L21/265 ,  H01L21/762 ,  H01L21/324 ,  H01L29/04

Abstract: Structures including electrical isolation and methods of forming a structure including electrical isolation. A first polycrystalline layer is located in a substrate, and a second polycrystalline layer is positioned between the first polycrystalline layer and a top surface of the substrate. The substrate includes a first portion of the single-crystal semiconductor material that is positioned between the second polycrystalline layer and the top surface of the substrate. The substrate includes a second portion of the single-crystal semiconductor material that is positioned between the first polycrystalline layer and the second polycrystalline layer. The first polycrystalline layer has a thickness. The second polycrystalline layer has a portion with a thickness that is greater than the thickness of the first polycrystalline layer.

公开(公告)号：US11282883B2

公开(公告)日：2022-03-22

申请号：US16713423

申请日：2019-12-13

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： John J. Ellis-Monaghan ,  Steven M. Shank ,  Vibhor Jain ,  Anthony K. Stamper ,  John J. Pekarik

IPC: H01L31/113 ,  H01L27/146

Abstract: Structures including a photodiode and methods of fabricating such structures. A trench extends from a top surface of a substrate to a depth into the substrate. The photodiode includes an active layer positioned in the trench. Trench isolation regions, which are located in the substrate, are arranged to surround the trench. A portion of the substrate is positioned in a surrounding relationship about the active layer and between the active layer and the trench isolation regions.

公开(公告)号：US11276770B2

公开(公告)日：2022-03-15

申请号：US16674432

申请日：2019-11-05

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Mankyu Yang ,  Jagar Singh ,  Alexander Martin ,  John J. Ellis-Monaghan

IPC: H01L29/735 ,  H01L29/737 ,  H01L29/06 ,  H01L29/417 ,  H01L29/10

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to gate controlled transistors and methods of manufacture. The structure includes: an emitter region; a collector region; base regions on opposing sides of the emitter region and the collector region; and a gate structure composed of a body region and leg regions, the body region being located between the base regions on opposing sides of the emitter region and the collector region, and the leg regions isolating the base regions from both the emitter region and the collector region.

公开(公告)号：US11271079B2

公开(公告)日：2022-03-08

申请号：US16743584

申请日：2020-01-15

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Anthony K. Stamper ,  Steven M. Shank ,  John J. Pekarik ,  Vibhor Jain ,  John J. Ellis-Monaghan

IPC: H01L29/16 ,  H01L21/02 ,  H01L27/12 ,  H01L21/762

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a wafer with crystalline silicon and trap rich polysilicon layer and methods of manufacture. The structure includes: semiconductor-on-insulator (SOI) wafer composed of a lower crystalline semiconductor layer, a polysilicon layer over the lower crystalline semiconductor layer, an upper crystalline semiconductor layer over the polysilicon layer, a buried insulator layer over the upper crystalline semiconductor layer, and a top crystalline semiconductor layer over the buried insulator layer.

公开(公告)号：US20210351306A1

公开(公告)日：2021-11-11

申请号：US16868773

申请日：2020-05-07

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Siva P. Adusumilli ,  Mark D. Levy ,  Vibhor Jain ,  John J. Ellis-Monaghan

IPC: H01L31/0232 ,  H01L27/144 ,  H01L31/028 ,  H01L31/105 ,  H01L31/18

Abstract: A photodetector includes a photodetecting region in a semiconductor substrate, and a reflector extending at least partially along a sidewall of the photodetecting region in the semiconductor substrate. The reflector includes an air gap defined in the semiconductor substrate. The reflector allows use of thinner germanium for the photodetecting region. The air gap may have a variety of internal features to direct electromagnetic radiation towards the photodetecting region.

公开(公告)号：US11171095B1

公开(公告)日：2021-11-09

申请号：US16855185

申请日：2020-04-22

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Vibhor Jain ,  Ajay Raman ,  Sebastian T. Ventrone ,  John J. Ellis-Monaghan ,  Siva P. Adusumilli ,  Yves T. Ngu

IPC: H01L23/00

Abstract: The present disclosure relates to an active x-ray attack prevention structure for secure integrated circuits. In particular, the present disclosure relates to a structure including a functional circuit, and at least one latchup sensitive diode circuit configured to induce a latchup condition in the functional circuit, placed in proximity of the functional circuit.

公开(公告)号：US20210280672A1

公开(公告)日：2021-09-09

申请号：US16807453

申请日：2020-03-03

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Anthony K. Stamper ,  Vibhor Jain ,  John J. Pekarik ,  Steven M. Shank ,  John J. Ellis-Monaghan

IPC: H01L29/06 ,  H01L29/04 ,  H01L29/737 ,  H01L27/102 ,  H01L21/762

Abstract: Structures including electrical isolation and methods of forming a structure including electrical isolation. A semiconductor layer is formed over a semiconductor substrate and shallow trench isolation regions are formed in the semiconductor layer. The semiconductor layer includes single-crystal semiconductor material having an electrical resistivity that is greater than or equal to 1000 ohm-cm. The shallow trench isolation regions are arranged to surround a portion of the semiconductor layer to define an active device region. A polycrystalline layer is positioned in the semiconductor layer and extends laterally beneath the active device region and the shallow trench isolation regions that surround the active device region.

公开(公告)号：US20210183918A1

公开(公告)日：2021-06-17

申请号：US16713423

申请日：2019-12-13

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： John J. Ellis-Monaghan ,  Steven M. Shank ,  Vibhor Jain ,  Anthony K. Stamper ,  John J. Pekarik

IPC: H01L27/146

Abstract: Structures including a photodiode and methods of fabricating such structures. A trench extends from a top surface of a substrate to a depth into the substrate. The photodiode includes an active layer positioned in the trench. Trench isolation regions, which are located in the substrate, are arranged to surround the trench. A portion of the substrate is positioned in a surrounding relationship about the active layer and between the active layer and the trench isolation regions.

公开(公告)号：US20210132461A1

公开(公告)日：2021-05-06

申请号：US16674711

申请日：2019-11-05

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Vibhor Jain ,  Siva P. Adusumilli ,  John J. Ellis-Monaghan

IPC: G02F1/225 ,  H01L31/0232

Abstract: Structures including a photodetector and methods of fabricating such structures. A substrate, which is composed of a semiconductor material, includes a first trench, a second trench, and a pillar of the semiconductor material that is laterally positioned between the first trench and the second trench. A first portion of a dielectric layer is located in the first trench and a second portion of the dielectric layer is located in the second trench. A waveguide core is coupled to the pillar at a top surface of the substrate.