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    Filter for network intrusion and virus detection
    61.
    发明授权
    Filter for network intrusion and virus detection 有权

    公开(公告)号：US10218739B2

    公开(公告)日：2019-02-26

    申请号：US15049519

    申请日：2016-02-22

    Applicant: Intel Corporation

    Inventor： Vinodh Gopal ,  Christopher F. Clark ,  Gilbert M. Wolrich ,  Wajdi K. Feghali

    IPC: H04L29/06 ,  G06F17/30 ,  G06F7/02 ,  G06F21/56

    Abstract: Methods and apparatus to perform string matching for network packet inspection are disclosed. In some embodiments there is a set of string matching slice circuits, each slice circuit of the set being configured to perform string matching steps in parallel with other slice circuits. Each slice circuit may include an input window storing some number of bytes of data from an input data steam. The input window of data may be padded if necessary, and then multiplied by a polynomial modulo an irreducible Galois-field polynomial to generate a hash index. A storage location of a memory corresponding to the hash index may be accessed to generate a slice-hit signal of a set of H slice-hit signals. The slice-hit signal may be provided to an AND-OR logic array where the set of H slice-hit signals is logically combined into a match result.

    Systems, methods, and apparatuses for decompression using hardware and software
    62.
    发明授权
    Systems, methods, and apparatuses for decompression using hardware and software 有权

    公开(公告)号：US10069512B2

    公开(公告)日：2018-09-04

    申请号：US15479087

    申请日：2017-04-04

    Applicant: Intel Corporation

    Inventor： Vinodh Gopal ,  James D. Guilford ,  Kirk S. Yap ,  Sean M. Gulley ,  Gilbert M. Wolrich

    IPC: H03M7/30 ,  H03M7/46

    Abstract: Detailed herein are embodiments of systems, methods, and apparatuses for decompression using hardware and software. For example, in embodiment a hardware apparatus comprises an input buffer to store incoming data from a compressed stream, a selector to select at least one byte stored in the input buffer, a decoder to decode the selected at least one byte and determine if the decoded at least one byte is a literal or a symbol, an overlap condition, a size of a record from the decoded stream, a length value of the data to be retrieved from the decoded stream, and an offset value for the decoded data, and a token format converter to convert the decoded data and data from source and destination offset base registers into a fixed-length token.

    Generating multiple secure hashes from a single data buffer
    65.
    发明授权
    Generating multiple secure hashes from a single data buffer 有权

    公开(公告)号：US09917689B2

    公开(公告)日：2018-03-13

    申请号：US15231595

    申请日：2016-08-08

    Applicant: Intel Corporation

    Inventor： Sean M. Gulley ,  Vinodh Gopal ,  Wajdi K. Feghali ,  James D. Guilford ,  Gilbert M. Wolrich ,  Kirk S. Yap

    IPC: H04L9/06 ,  G06F21/72 ,  H04L9/32

    CPC classification number: H04L9/0643 ,  G06F9/30007 ,  G06F21/72 ,  H04L9/3242 ,  H04L2209/12 ,  H04L2209/125 ,  H04L2209/20

    Abstract: One embodiment provides an apparatus. The apparatus includes a single instruction multiple data (SIMD) hash module configured to apportion at least a first portion of a message of length L to a number (S) of segments, the message including a plurality of sequences of data elements, each sequence including S data elements, a respective data element in each sequence apportioned to a respective segment, each segment including a number N of blocks of data elements and to hash the S segments in parallel, resulting in S segment digests, the S hash digests based, at least in part, on an initial value and to store the S hash digests; a padding module configured to pad a remainder, the remainder corresponding to a second portion of the message, the second portion related to the length L of the message, the number of segments and a block size; and a non-SIMD hash module configured to hash the padded remainder, resulting in an additional hash digest and to store the additional hash digest.

    Method and apparatus for efficiently executing hash operations
    67.
    发明授权
    Method and apparatus for efficiently executing hash operations 有权

    公开(公告)号：US09912481B2

    公开(公告)日：2018-03-06

    申请号：US14228056

    申请日：2014-03-27

    Applicant: INTEL CORPORATION

    Inventor： Gilbert M. Wolrich ,  Vinodh Gopal ,  Kirk S. Yap ,  Wajdi K. Feghali

    IPC: H04L9/32 ,  G06F12/08 ,  G06F12/0811 ,  H04L9/06

    CPC classification number: H04L9/3239 ,  G06F9/30007 ,  G06F12/0811 ,  G06F2212/283 ,  H04L9/0643 ,  H04L2209/125

    Abstract: An apparatus and method are described for executing hash functions on a processor. For example, one embodiment of a processor comprises: a register set including a first storage location and a second storage location in which state variables for a hash function are to be stored; an execution unit to execute the hash function and to initially designate the first storage location as storing a first set of state values used for computing rounds of the hash function, and to initially designate a second storage location as storing a second set of state values also used for computing the rounds of the hash function; and the execution unit to execute a plurality of rounds of the hash function using the first and second sets of state data, wherein executing includes swapping the designations of the first storage location and second storage location such that the first storage location is designated to store the first set of state values for a first set of rounds and the second set of state values for a second set of rounds, and wherein the second storage location is designated to store the second set of state values for the first set of rounds and the first set of state values for the second set of rounds.

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