DISAGGREGATED COMPUTING FOR DISTRIBUTED CONFIDENTIAL COMPUTING ENVIRONMENT

    公开(公告)号:US20240184639A1

    公开(公告)日:2024-06-06

    申请号:US18538171

    申请日:2023-12-13

    CPC classification number: G06F9/5083 G06F9/3814 G06F9/5027 G06T1/20 G06T1/60

    Abstract: An apparatus to facilitate disaggregated computing for a distributed confidential computing environment is disclosed. The apparatus includes one or more processors to facilitate receiving a manifest corresponding to graph nodes representing regions of memory of a remote client machine, the graph nodes corresponding to a command buffer and to associated data structures and kernels of the command buffer used to initialize a hardware accelerator and execute the kernels, and the manifest indicating a destination memory location of each of the graph nodes and dependencies of each of the graph nodes; identifying, based on the manifest, the command buffer and the associated data structures to copy to the host memory; identifying, based on the manifest, the kernels to copy to local memory of the hardware accelerator; and patching addresses in the command buffer copied to the host memory with updated addresses of corresponding locations in the host memory.

    DISAGGREGATED COMPUTING FOR DISTRIBUTED CONFIDENTIAL COMPUTING ENVIRONMENT

    公开(公告)号:US20240086258A1

    公开(公告)日:2024-03-14

    申请号:US18511296

    申请日:2023-11-16

    CPC classification number: G06F9/5083 G06F9/3814 G06F9/5027 G06T1/20 G06T1/60

    Abstract: An apparatus to facilitate disaggregated computing for a distributed confidential computing environment is disclosed. The apparatus includes one or more processors to facilitate receiving a manifest corresponding to graph nodes representing regions of memory of a remote client machine, the graph nodes corresponding to a command buffer and to associated data structures and kernels of the command buffer used to initialize a hardware accelerator and execute the kernels, and the manifest indicating a destination memory location of each of the graph nodes and dependencies of each of the graph nodes; identifying, based on the manifest, the command buffer and the associated data structures to copy to the host memory; identifying, based on the manifest, the kernels to copy to local memory of the hardware accelerator; and patching addresses in the command buffer copied to the host memory with updated addresses of corresponding locations in the host memory.

    INFERRED SHADING MECHANISM
    66.
    发明申请

    公开(公告)号:US20220101597A1

    公开(公告)日:2022-03-31

    申请号:US17032348

    申请日:2020-09-25

    Abstract: An apparatus to facilitate inferred object shading is disclosed. The apparatus comprises one or more processors to receive rasterized pixel data and hierarchical data associated with one or more objects and perform an inferred shading operation on the rasterized pixel data, including using one or more trained neural networks to perform texture and lighting on the rasterized pixel data to generate a pixel output, wherein the one or more trained neural networks uses the hierarchical data to learn a three-dimensional (3D) geometry, latent space and representation of the one or more objects.

    Use of inner coverage information by a conservative rasterization pipeline to enable EarlyZ for conservative rasterization

    公开(公告)号:US11151683B2

    公开(公告)日:2021-10-19

    申请号:US16583478

    申请日:2019-09-26

    Abstract: Embodiments described herein are generally directed to conservative rasterization pipeline configurations that allow EarlyZ to be enabled for conservative rasterization. An embodiment of a method includes receiving, by a conservative rasterizer, a primitive; creating, by the conservative rasterizer, a pixel location stream based on the primitive and inner coverage data for each pixel within the pixel location stream indicative of whether the corresponding pixel is fully covered or partially covered by the primitive; for each block of pixels of the pixel location stream, launching, by the conservative rasterizer, a thread of a pixel shader, including causing EarlyZ to be performed or not for fully covered pixels and partially covered pixels, respectively; and generating, by the pixel shader, a stream of pixel updates by conditionally processing the pixel location stream to incorporate pixel shading characteristics, including for partially covered pixels computing a depth value and causing LateZ to be performed.

    Apparatus and method for real time graphics processing using local and cloud-based graphics processing resources

    公开(公告)号:US11127107B2

    公开(公告)日:2021-09-21

    申请号:US16588855

    申请日:2019-09-30

    Abstract: An apparatus and method for scheduling threads on local and remote processing resources. For example, one embodiment of an apparatus comprises: a local graphics processor to execute threads of an application; graphics processor virtualization circuitry and/or logic to generate a virtualized representation of a local processor; a scheduler to identify a first subset of the threads for execution on a local graphics processor and a second subset of the threads for execution on a virtualized representation of a local processor; the scheduler to schedule the first subset of threads on the local graphics processor and the second subset of the threads by transmitting the threads or a representation thereof to Cloud-based processing resources associated with the virtualized representation of the local processor; and the local graphics processor to combine first results of executing the first subset of threads on the local graphics processor with second results of executing the second subset of threads on the Cloud-based processing resources to render an image frame.

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