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公开(公告)号:US20170345905A1
公开(公告)日:2017-11-30
申请号:US15162716
申请日:2016-05-24
Applicant: Infineon Technologies AG
Inventor: Ralf Siemieniec , Dethard Peters , Romain Esteve , Wolfgang Bergner , Thomas Aichinger , Daniel Kueck , Roland Rupp , Bernd Zippelius , Karlheinz Feldrapp , Christian Strenger
IPC: H01L29/423 , H01L29/739 , H01L29/20 , H01L29/16 , H01L29/10 , H01L29/78 , H01L29/04
CPC classification number: H01L29/4236 , H01L29/04 , H01L29/045 , H01L29/0696 , H01L29/1095 , H01L29/1608 , H01L29/2003 , H01L29/407 , H01L29/66068 , H01L29/7397 , H01L29/7827
Abstract: A semiconductor device includes trench gate structures extending from a first surface into a semiconductor body from a wide-bandgap semiconductor material. The trench gate structures separate mesa portions of the semiconductor body from each other. In the mesa portions, body regions form first pn junctions with a drain structure and directly adjoin first mesa sidewalls. Source regions in the mesa portions form second pn junctions with the body regions, wherein the body regions separate the source regions from the drain structure. The source regions directly adjoin the first mesa sidewalls and second mesa sidewalls opposite to the first mesa sidewalls.
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公开(公告)号:US20170117352A1
公开(公告)日:2017-04-27
申请号:US15400299
申请日:2017-01-06
Applicant: Infineon Technologies AG
Inventor: Romain Esteve , Dethard Peters , Wolfgang Bergner , Ralf Siemieniec , Thomas Aichinger , Daniel Kueck
CPC classification number: H01L29/063 , H01L21/02236 , H01L21/045 , H01L21/0465 , H01L21/0475 , H01L21/049 , H01L21/3065 , H01L21/31111 , H01L21/324 , H01L21/3247 , H01L29/1095 , H01L29/1608 , H01L29/4236 , H01L29/42364 , H01L29/66068 , H01L29/66734 , H01L29/7813
Abstract: A SIC transistor device includes a silicon-carbide semiconductor substrate having a plurality of first doped regions laterally spaced apart from one another and beneath a main surface of the substrate, a second doped region extending from the main surface to a third doped region that is above the first doped regions, and a plurality of fourth doped regions in the substrate extending from the main surface to the first doped regions. The second doped region has a first conductivity type. The first, third and fourth doped regions have a second conductivity type opposite the first conductivity type. A gate trench extends through the second and third doped regions. The gate trench has sidewalls, a bottom and rounded corners between the bottom and the sidewalls.
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63.
公开(公告)号:US20160139077A1
公开(公告)日:2016-05-19
申请号:US14930295
申请日:2015-11-02
Applicant: Infineon Technologies AG
Inventor: Sabine Gruber , Thomas Aichinger , Stefan Krivec , Thomas Ostermann
IPC: G01N27/447 , G01N27/414 , G01N27/27 , G01N27/453
CPC classification number: G01N27/44704 , G01N27/27 , G01N27/414 , G01N27/453
Abstract: An apparatus for analyzing ion kinetics in a dielectric probe structure includes an ion reservoir abutting the dielectric probe structure and configured to supply mobile ions to the dielectric probe structure, a capacitor structure configured to generate an electric field in the dielectric probe structure along a vertical direction, and an electrode structure configured to generate an electrophoretic force on mobile ions in the dielectric probe structure along a lateral direction. A method for analyzing ion kinetics in the dielectric probe structure of the apparatus is also provided.
Abstract translation: 用于分析电介质探针结构中的离子动力学的装置包括邻接电介质探针结构并被配置为向介电探针结构提供移动离子的离子储存器,电容器结构,被配置为沿着垂直方向在电介质探针结构中产生电场 以及电极结构,其被配置为沿着横向方向在介电探针结构中的移动离子上产生电泳力。 还提供了用于分析该装置的电介质探针结构中的离子动力学的方法。
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