Abstract:
A baseband controller system creates and maintains a schedule of synchronized events and reviews the schedule as a part of determining whether to initiate a transmission of a non-synchronous event (one that is not time sensitive, for example, e-mail). One aspect of the present invention is to create a system and method that avoids a possibility of collision between synchronized and non-synchronized communication events. A synchronized event is a scheduled transmission of time sensitive data such as what is often known as continuous bit rate data. Examples include video and voice wherein a collision (inability to transmit the continuous bit rate data) may result in degradation of signal quality at the receiving end. The inventive system and method evaluate the schedule of synchronized events in relation to the present time and determine whether a non-synchronized event may be transmitted without the likelihood of a collision. Making the determination that such a transmission may occur includes evaluating future time periods to see if a synchronized event is scheduled during a time period in which the non-synchronized event would continue to be transmitted for those non-synchronized events that span two or more defined time periods in length.
Abstract:
A double diffused region (65), (75), (85) is formed in a semiconductor substrate or in an epitaxial layer (20) formed on the semiconductor substrate. The double diffused region is formed by first implanting light implant specie such as boron through an opening in a photoresist layer prior to a hard bake process. Subsequent to the hard bake process, a heavy implant species such as arsenic is implanted into the epitaxial layer. During subsequent processing, such as during LOCOS formation, a double diffused region is formed by a thermal anneal. A dielectric layer (120) is formed on the epitaxial layer (20) and gate structures (130), (135) are formed over the dielectric layer (120).
Abstract:
A wireless local area network (WLAN) transceiving integrated circuit includes a WLAN interface, an input buffer, an input buffer controller, and a processor. The WLAN transceiving integrated circuit may also include an output buffer, an output buffer controller, a transcoder, and/or an audio Coder-Decoder (CODEC). The WLAN transceiving integrated circuit is installed in a WLAN device that services voice communications. The input buffer receives packetized audio data from the WLAN interface. When the input buffer satisfies a buffer vacancy threshold, the processor and the input buffer controller cooperatively operate to fill at least a portion of the input buffer with packetized audio data. The processor copies packetized audio data from the input buffer and fills the input buffer with the copied packetized audio data to maintain an audio pattern in the input buffer. The input buffer controller fills the input buffer when the processor is available and after copying/filling is no longer effective. The processor operates to maintain the audio pattern when additional packetized audio data is received by the WLAN interface. These operations are also performed for the output buffer, which receives packetized audio data from the transcoder and writes the packetized audio data to the WLAN interface.
Abstract:
Double diffused MOS (DMOS) transistors feature extended drain regions to provide depletion regions which drop high drain voltages to lower voltages at the gate edges. DMOS transistors exhibit lower drain breakdown potential in the on-state than in the off-state than in the off-state due to snapback by a parasitic bipolar transistor that exists in parallel with the DMOS transistor. The instant invention is a cascoded DMOS transistor in an integrated circuit incorporating an NMOS transistor on the DMOS source node to reverse bias the parasitic emitter-base junction during on-state operation, eliminating snapback. The NMOS transistor may be integrated with the DMOS transistor by connections in the interconnect system of the integrated circuit, or the NMOS transistor and DMOS transistor may be fabricated in a common p-type well and integrated in the IC substrate. Methods of fabricating an integrated circuit with the incentive cascoded DMOS transistor are also disclosed.
Abstract:
A semiconductor device comprising a first transistor device on or in a semiconductor substrate and a second transistor device on or in the substrate. The device further comprises an insulating trench located between the first transistor device and the second transistor device. At least one upper corner of the insulating trench is a rounded corner in a lateral plane of the substrate.
Abstract:
A wireless local area network (WLAN) transceiving integrated circuit includes a WLAN interface, an input buffer, an input buffer controller, and a processor. The WLAN transceiving integrated circuit may also include an output buffer, an output buffer controller, a transcoder, and/or an audio Coder-Decoder (CODEC). The WLAN transceiving integrated circuit is installed in a WLAN device that services voice communications. The input buffer receives packetized audio data from the WLAN interface. When the input buffer satisfies a buffer vacancy threshold, the processor and the input buffer controller cooperatively operate to fill at least a portion of the input buffer with packetized audio data. The processor copies packetized audio data from the input buffer and fills the input buffer with the copied packetized audio data to maintain an audio pattern in the input buffer. The input buffer controller fills the input buffer when the processor is available and after copying/filling is no longer effective. The processor operates to maintain the audio pattern when additional packetized audio data is received by the WLAN interface. These operations are also performed for the output buffer, which receives packetized audio data from the transcoder and writes the packetized audio data to the WLAN interface.
Abstract:
The present invention provides an integrated circuit and a method of manufacture therefore. The integrated circuit (100, 1000), in one embodiment without limitation, includes a dielectric layer (120, 1020) located over a wafer substrate (110, 1010), and a semiconductor substrate (130, 1030) located over the dielectric layer (120, 1020), the semiconductor substrate (130, 1030) having one or more transistor devices (140, 1040) located therein or thereon. The integrated circuit (100, 1000) may further include an interconnect (170, 1053) extending entirely through the semiconductor substrate (130, 1030) and the dielectric layer (120, 1020), thereby electrically contacting the wafer substrate (110, 1010).
Abstract:
A remote mobile medical communication apparatus is suitable for use in communicating with a remote terminal for monitoring and treating a patient. The apparatus comprises a communicating unit, for transmitting a local communication information to the remote terminal, and receiving a remote communication information from the remote terminal. A patient-monitor interface unit receives at least one patient vital-sign signal from the patient, and then transmits to the remote terminal via the communicating unit. A bi-directional audio/video communication unit is for communicating with the remote terminal with an audio/video information via the communicating unit. An instruction from the remote terminal is instructed if the patient needs a treatment. A system and method use the function of the remote mobile medical communication apparatus.
Abstract:
A baseband controller includes a microsequencer with special hardware resources circuitry and a configuration that supports real-time Bluetooth functionality for an upper limit of Bluetooth slave devices. The microsequencer includes a 72-bit correlator that may also be used as an accumulator, wherein the topology provides that the correlator can communicate with a 72-bit arithmetic logic unit that correspondingly enables the correlator to act as an accumulator. The microsequencer also includes a plurality of clocks and timers for facilitating Bluetooth timing functionality, and at least four registers for temporarily storing computational data, where each of the storage registers have different sizes for accommodating different-sized packets of computational data.
Abstract:
Segmented power transistors and fabrication methods are disclosed in which transistor segments are spaced from one another to facilitate thermal diffusion, and in which other electrical devices can be formed in the spaces between transistor segments.