公开(公告)号：US20080273857A1

公开(公告)日：2008-11-06

申请号：US12166744

申请日：2008-07-02

申请人： Kenji Toyoda ,  Hideo Hibino

发明人： Kenji Toyoda ,  Hideo Hibino

IPC分类号： H04N5/91

CPC分类号： G11B27/00 ,  G11B19/022 ,  G11B27/105 ,  G11B27/11 ,  G11B27/326 ,  G11B27/329 ,  G11B2220/20 ,  G11B2220/65 ,  H04N5/781

摘要： An image playback apparatus and in image recording apparatus are designed to permit image playback from a selected position in an image file recorded to a directly accessible memory, such as a magnetic disk. During recording of an image file, the user can designate one or more candidate playback start positions in the file, and corresponding pointers are stored as part of the image file. When the file is to be played back, the playback apparatus accesses the pointer(s) and allows the user to select playback from the corresponding position(s) in the image file. Also the playback apparatus can rewrite pointers in an image file, whereby the user can designate candidate starting positions for future playback of the file.

摘要翻译： 图像重放装置和图像记录装置被设计为允许从记录到诸如磁盘的直接可访问存储器的图像文件中的选定位置进行图像重放。 在记录图像文件期间，用户可以指定文件中的一个或多个候选重放开始位置，并且相应的指针被存储为图像文件的一部分。 当要播放文件时，播放装置访问指针并允许用户从图像文件中的对应位置选择播放。 此外，重放装置可以重写图像文件中的指针，由此用户可以指定候选的起始位置以供将来回放文件。

公开(公告)号：US07002388B2

公开(公告)日：2006-02-21

申请号：US11080454

申请日：2005-03-16

申请人： Takashi Nishikawa ,  Kenji Toyoda ,  Takashi Ohtsuka

发明人： Takashi Nishikawa ,  Kenji Toyoda ,  Takashi Ohtsuka

IPC分类号： H03K3/289 ,  H03K3/356

CPC分类号： H03K3/356008 ,  G11C11/22

摘要： The present invention provides a method of driving a nonvolatile flip-flop circuit comprising the following steps of: a data hold step of holding an input data signal D utilizing polarization of a ferroelectric material of a ferroelectric gate transistor (601) when the data signal D is input while a first clocked inverter (604), a second clocked inverter (603), and a third switching element (602) are turned on and a first switching element (605), a second switching element (607), and a third clocked inverter (608) are turned off; and a data output step of outputting an output signal Q (−Q) based on the held data signal D placing the first clocked inverter (604), the second clocked inverter (603), and the third switching element (602) in the OFF state and placing the first switching element (605), the second switching element (607), and the third clocked inverter (608) in the ON state so as to interrupt an input of a data signal and maintain a polarization state of the ferroelectric material of the ferroelectric gate transistor (601).

摘要翻译： 本发明提供了一种驱动非易失性触发电路的方法，包括以下步骤：数据保持步骤，当数据信号D（D）被利用时，利用铁电栅极晶体管（601）的铁电材料的极化来保持输入数据信号D 在第一时钟反相器（604），第二时钟反相器（603）和第三开关元件（602）导通时，第一开关元件（605），第二开关元件（607）和第三开关元件 时钟反相器（608）关闭; 以及数据输出步骤，基于将第一时钟反相器（604），第二时钟反相器（603）和第三开关元件（602）放置在OFF中的保持数据信号D输出输出信号Q（-Q） 状态，并且将第一开关元件（605），第二开关元件（607）和第三时钟反相器（608）置于导通状态，以便中断数据信号的输入并保持铁电材料的极化状态 的铁电栅极晶体管（601）。

公开(公告)号：US06862226B2

公开(公告)日：2005-03-01

申请号：US10784257

申请日：2004-02-24

申请人： Kenji Toyoda ,  Takashi Ohtsuka

发明人： Kenji Toyoda ,  Takashi Ohtsuka

IPC分类号： G11C14/00 ,  H01L27/10 ,  H03K3/356 ,  G11C11/00

CPC分类号： G11C14/009 ,  G11C13/0004 ,  G11C14/0072 ,  H01L27/101 ,  H03K3/356008

摘要： A method of driving a non-volatile flip-flop circuit comprising a first inverter (INV1) coupled to a first memory node (9) and a second memory node (10), a second inverter (INV2) coupled to the second memory node (10) and the first memory node (9), a first pass transistor (5), a second pass transistor (6), a first switching element for control (7) and a first variable resistor element (15) which are connected serially to each other and are connected between the first memory node (9) and a plate line (18), and a second switching element for control (8) and a second variable resistor element (16) which are connected serially to each other and are connected between the second memory node (10) and the plate line (18), wherein the resistance values of the first and second variable resistor elements (15, 16) can be changed by the heat generated by a current.

摘要翻译： 一种驱动非易失性触发器电路的方法，包括耦合到第一存储器节点（9）和第二存储器节点（10）的第一反相器（INV1），耦合到第二存储器节点 10）和第一存储器节点（9），第一传输晶体管（5），第二传输晶体管（6），用于控制的第一开关元件（7）和第一可变电阻元件（15），其串联连接到 彼此连接并且连接在第一存储节点（9）和板线（18）之间，以及用于控制的第二开关元件（8）和第二可变电阻元件（16），它们彼此串联连接并被连接 在第二存储节点（10）和板线（18）之间，其中可以通过由电流产生的热量来改变第一和第二可变电阻元件（15,16）的电阻值。

公开(公告)号：US06847071B2

公开(公告)日：2005-01-25

申请号：US10161696

申请日：2002-06-05

申请人： Michihito Ueda ,  Kenji Toyoda ,  Kiyoyuki Morita ,  Takashi Ohtsuka

发明人： Michihito Ueda ,  Kenji Toyoda ,  Kiyoyuki Morita ,  Takashi Ohtsuka

IPC分类号： H01L27/10 ,  G11C27/00 ,  H01L27/108 ,  H01L29/76 ,  H01L29/94 ,  H01L31/119

CPC分类号： G11C27/005 ,  G11C11/54 ,  H01L2924/0002 ,  H01L2924/00

摘要： In an electric potential generating device, a source of an N type MIS transistor is mutually connected to that of a P type MIS transistor and also connected to an output terminal. A drain of an N type MIS transistor 54 is connected to a power supply voltage supply portion for supplying power supply voltage VDD, and a drain of the P type MIS transistor is connected to a ground. In addition, a substrate potential of the N type MIS transistor is a ground voltage VSS, and that of a P type MIS transistor 56 is the power supply voltage VDD. Thus, it is constituted as a source follower circuit for taking output out of the source. It is possible, by utilizing this electric potential generating device, to obtain a logic transformation circuit for stably switching between NOR operation and NAND operation.

摘要翻译： 在电位产生装置中，N型MIS晶体管的源极相互连接到P型MIS晶体管的源极，并且还连接到输出端子。 N型MIS晶体管54的漏极连接到用于提供电源电压VDD的电源电压供应部分，并且P型MIS晶体管的漏极连接到地。 此外，N型MIS晶体管的衬底电位为接地电压VSS，P型MIS晶体管56的衬底电位为电源电压VDD。 因此，它构成为用于从源极输出的源极跟随器电路。 通过利用该电位产生装置可以获得用于在NOR操作和NAND操作之间稳定切换的逻辑变换电路。

公开(公告)号：US06674150B2

公开(公告)日：2004-01-06

申请号：US10127579

申请日：2002-04-23

申请人： Takeshi Takagi ,  Koichiro Yuki ,  Kenji Toyoda ,  Yoshihiko Kanzawa

发明人： Takeshi Takagi ,  Koichiro Yuki ,  Kenji Toyoda ,  Yoshihiko Kanzawa

IPC分类号： H01L27082

CPC分类号： H01L29/7378 ,  H01L29/161 ,  H01L29/66242

摘要： A heterojunction bipolar transistor is fabricated by stacking a Si collector layer, a SiGeC base layer and a Si emitter layer in this order. By making the amount of a lattice strain in the SiGeC base layer on the Si collector layer 1.0% or less, the band gap can be narrower than the band gap of the conventional practical SiGe (the Ge content is about 10%), and good crystalline can be maintained after a heat treatment. As a result, a narrow band gap base with no practical inconvenience can be realized.

公开(公告)号：US06271691B1

公开(公告)日：2001-08-07

申请号：US09605887

申请日：2000-06-29

申请人： Kenji Toyoda ,  Kimio Maruyama ,  Eisuke Inoue

发明人： Kenji Toyoda ,  Kimio Maruyama ,  Eisuke Inoue

IPC分类号： H03K522

CPC分类号： H03F3/393 ,  H03K5/249

摘要： A chopper type voltage comparison circuit is disclosed which restrain leakage current between an input and output nodes of each amplifying circuit to enable normal voltage comparisons even if a threshold voltage for each transistor is reduced to diminish a power supply voltage. This chopper type voltage comparison circuit comprises a capacitor C1 having an input voltage or a reference voltage selectively supplied to one end thereof depending on whether a voltage input operation or a voltage comparison operation is to be performed, a CMOS clocked inverter circuit CINV1 for voltage amplification having a voltage at the other end of the capacitor input to an input node thereof and having a clock gate section biased so as to be constantly conductive, and a CMOS clocked inverter circuit CINV4 for input voltage setting having the same circuit configuration as the CMOS clocked inverter circuit for voltage amplification, having an input and output nodes short-circuited thereto, and connected to the input node of the CMOS clocked inverter circuit for voltage amplification so that the clock gate section is switch-controlled to be turned on for the voltage input operation, while the clock gate section is switch-controlled to be turned off for the voltage comparison operation.

摘要翻译： 公开了一种斩波型电压比较电路，其抑制每个放大电路的输入和输出节点之间的漏电流，以便即使降低每个晶体管的阈值电压以减小电源电压，也能进行正常电压比较。 该斩波型电压比较电路包括：电容器C1，其具有根据是否要执行电压输入操作或电压比较操作选择性地提供给其一端的输入电压或参考电压;用于电压放大的CMOS时钟反相器电路CINV1 在输入到其输入节点的电容器的另一端处具有电压，并且具有偏置以恒定导通的时钟门极部分;以及具有与CMOS时钟相同的电路配置的输入电压设置的CMOS时钟反相器电路CINV4 用于电压放大的逆变器电路，具有与其短路的输入和输出节点，并连接到CMOS时钟反相器电路的输入节点用于电压放大，使得时钟门极部分被开关控制为导通，用于电压输入 操作时，而对于电压比较运算，时钟门极段被开关控制为截止 ation。

公开(公告)号：US4704617A

公开(公告)日：1987-11-03

申请号：US811430

申请日：1985-12-20

申请人： Hiroshi Sato ,  Kohei Kadowaki ,  Kaoru Naito ,  Kenji Toyoda ,  Hidehisa Tsuchihashi

发明人： Hiroshi Sato ,  Kohei Kadowaki ,  Kaoru Naito ,  Kenji Toyoda ,  Hidehisa Tsuchihashi

IPC分类号： B41J2/355 ,  G01D15/10 ,  H04N1/193 ,  H04N1/40 ,  B41J3/20

CPC分类号： G01D15/10 ,  B41J2/355 ,  H04N1/1931 ,  H04N1/40031

摘要： A printer comprises image signal generating element for repeatedly generating one line of image signal, compare element having a plurality of reference levels and comparing the image signal with selected one of the reference levels, thermal head element having a line of heating elements for printing one line of image signal, current supply element for supplying currents to the heating elements in accordance with the compare results, setting element for setting a continuous energization period for supplying the current to the heating elements from the supply element, and control element for controlling the supply element to provide a first period during which the energization of the heating elements in a first group is inhibited and a second period during which the energization of the heating elements in a second group are inhibited.

摘要翻译： 打印机包括用于重复产生一行图像信号的图像信号产生元件，具有多个参考电平的比较元件，并将图像信号与所选择的参考电平进行比较，热敏元件具有用于打印一行的加热元件线 的图像信号，根据比较结果向加热元件供给电流的电流源元件，用于设定用于从供给元件向加热元件供给电流的连续通电周期的设定元件，以及用于控制供给元件的控制元件 以提供禁止第一组中的加热元件的通电的第一时段，以及抑制第二组中的加热元件的通电的第二时段。

公开(公告)号：US4504837A

公开(公告)日：1985-03-12

申请号：US395241

申请日：1982-07-06

申请人： Kenji Toyoda ,  Kaoru Naito ,  Norio Yamamura

发明人： Kenji Toyoda ,  Kaoru Naito ,  Norio Yamamura

IPC分类号： B41J2/325 ,  B41M5/34 ,  G01D15/16 ,  B32B7/14 ,  B44C1/16 ,  G01D15/10

CPC分类号： B41J2/325 ,  B41M5/345 ,  Y10T428/24876

摘要： A recording method comprises the steps of selectively applying heat to individual heat sensitive color forming sheets each comprising a supporting sheet and a transparent color forming layer on the supporting sheet, which color forming layer is adhesive and develops a color under the action of heat but the colors developed in the individual layers being different from each other, thereby forming monochromic images in different colors on the individual color forming sheets; and separating each color forming layer with the formed monochromic image from the corrresponding supporting sheet and laying the separated individual layers on a common base sheet successively in layers making use of their own adhesiveness.

摘要翻译： 一种记录方法包括以下步骤：在支撑片上将包含支撑片和透明成色层的各个热敏成色片选择性地加热，所述成色层在加热的作用下粘合并显色，但是 在各个层中显影的颜色彼此不同，从而在各个成色片上形成不同颜色的单色图像; 并将来自对应的支撑片材的所形成的单色图像分离成各个成色层，并且使用它们自身的粘附性，将分离的各层依次层叠在共同的基片上。

公开(公告)号：US4420773A

公开(公告)日：1983-12-13

申请号：US275403

申请日：1981-06-18

申请人： Kenji Toyoda ,  Takao Watanabe ,  Hideya Inoue ,  Atsumi Kasuya ,  Yutaka Ichihara ,  Akira Miyaji

发明人： Kenji Toyoda ,  Takao Watanabe ,  Hideya Inoue ,  Atsumi Kasuya ,  Yutaka Ichihara ,  Akira Miyaji

IPC分类号： G11B27/024 ,  G11B31/00 ,  G11C19/28 ,  H04N1/21 ,  H04N5/225 ,  H04N5/76

CPC分类号： H04N1/00129 ,  G11B27/024 ,  G11B31/006 ,  G11C19/287 ,  H04N1/2112 ,  H04N1/2158 ,  H04N1/217 ,  H04N5/2251 ,  H04N2101/00 ,  H04N2201/0055 ,  H04N2201/0086 ,  Y10S358/906

摘要： An electronic photographic camera includes an imaging optical system operable to be focused to an object to be photographed, a solid state imaging sensing device including a plurality of light-receiving elements disposed in the imaging plane of the imaging optical system and capable of producing a charge corresponding to the quantity of incident light and accumulating the charge therein, first transfer means having a first output terminal and adapted to transfer the charge accumulated in each of the elements separately to the first output terminal, and second transfer means having a second output terminal and adapted to transfer the charges produced in some or all of the elements collectively to the second output terminal, and metering means for measuring the brightness of the object from the charge transferred by the second transfer means.

摘要翻译： 电子照相机包括可操作以聚焦到待拍摄物体的成像光学系统，固态成像感测装置，其包括设置在成像光学系统的成像平面中的多个光接收元件，并且能够产生电荷 对应于入射光量并累积其中的电荷，第一传送装置具有第一输出端子，适于将累积在每个元件中的电荷分别传送到第一输出端子，第二传送装置具有第二输出端子和 适于将一些或所有元件中产生的电荷集中地传送到第二输出端子;以及计量装置，用于根据由第二传送装置传送的电荷测量物体的亮度。

公开(公告)号：US4352548A

公开(公告)日：1982-10-05

申请号：US256951

申请日：1981-04-23

申请人： Kenji Toyoda

发明人： Kenji Toyoda

IPC分类号： G03B7/087 ,  G03B7/081 ,  G03B7/20 ,  G03B17/12 ,  G03B7/08

CPC分类号： G03B7/20 ,  G03B7/087

摘要： In a camera of the interchangeable lens type having a body having a program exposure control device and a lens mount; and an interchangeable lens mounted on the body through the mount, there is provided program varying means in the program exposure control device, information means on the interchangeable lens, and interlock means for setting the program varying means so that when the interchangeable lens is mounted on the body, the program varying means selects a program corresponding to the information possessed by the information means.

摘要翻译： 在具有具有程序曝光控制装置和透镜支架的主体的可互换镜头类型的相机中; 以及通过安装件安装在本体上的可互换镜头，在程序曝光控制装置中设置程序改变装置，在可互换镜头上的信息装置和用于设置程序改变装置的互锁装置，使得当可更换镜头安装在 程序改变装置选择与信息装置所拥有的信息相对应的程序。