公开(公告)号：US20240393946A1

公开(公告)日：2024-11-28

申请号：US18791933

申请日：2024-08-01

Applicant: KIOXIA CORPORATION

Inventor： Naoki ESAKA ,  Shinichi KANNO

IPC: G06F3/06

Abstract: According to one embodiment, a controller of a memory system performs a first operation a plurality of times for each of a plurality of first blocks. The first operation includes a write operation for writing data in a first write mode for writing m-bit data per memory cell and a data erase operation. While a second block is not a defective block, the controller performs a second operation a plurality of times for the second block. The second operation includes a write operation for writing data in a second write mode for writing n-bit data per memory cell and a data erase operation. When the second block is a defective block, the controller selects a first block from the plurality of first blocks, and writes second write data to the selected first block in the second write mode.

公开(公告)号：US20240311291A1

公开(公告)日：2024-09-19

申请号：US18595633

申请日：2024-03-05

Applicant: Kioxia Corporation

Inventor： Shinichi KANNO

IPC: G06F12/02

CPC classification number: G06F12/0246 ,  G06F2212/7203

Abstract: According to one embodiment, a memory system includes a nonvolatile memory, a first write buffer, a second write buffer having a capacity smaller than that of the first write buffer and a bandwidth larger than that of the first write buffer, and a controller. When the write speed of the first group is less than a first value, the controller loads unloaded data among first data into the first write buffer, and after an amount of the first data reaches or exceeds a minimum write size, writes the first data to a first write destination block. When the write speed of the second group is greater than or equal to the first value, the controller loads second data having the minimum write size into the second write buffer and writes the second data to the second write destination block.

公开(公告)号：US20240295991A1

公开(公告)日：2024-09-05

申请号：US18645482

申请日：2024-04-25

Applicant: KIOXIA CORPORATION

Inventor： Shinichi KANNO

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/064 ,  G06F3/0656 ,  G06F3/0679

Abstract: According to one embodiment, a memory system checks a first total size indicative of a sum of data lengths specified by first write commands stored in a first submission queue of a host corresponding to a first stream. When the first total size is greater than or equal to a minimum write size, the memory system fetches a set of first write commands stored in the first submission queue, transfers first write data associated with the set of first write commands from a memory of the host to the memory system, and writes the first write data into a first write destination block allocated for the first stream.

公开(公告)号：US20240126433A1

公开(公告)日：2024-04-18

申请号：US18396352

申请日：2023-12-26

Applicant: KIOXIA CORPORATION

Inventor： Hiroshi YAO ,  Shinichi KANNO ,  Kazuhiro FUKUTOMI

IPC: G06F3/06 ,  G06F12/02

CPC classification number: G06F3/0604 ,  G06F3/0634 ,  G06F3/0641 ,  G06F3/0659 ,  G06F3/0679 ,  G06F12/0246 ,  G06F2212/1016 ,  G06F2212/1024 ,  G06F2212/1044 ,  G06F2212/214 ,  G06F2212/7201 ,  G06F2212/7205

Abstract: According to one embodiment, a memory system includes a non-volatile semiconductor memory, a block management unit, and a transcription unit. The semiconductor memory includes a plurality of blocks to which data can be written in both the first mode and the second mode. The block management unit manages a block that stores therein no valid data as a free block. When the number of free blocks managed by the block management unit is smaller than or equal to a predetermined threshold value, the transcription unit selects one or more used blocks that stores therein valid data as transcription source blocks and transcribes valid data stored in the transcription source blocks to free blocks in the second mode.

公开(公告)号：US20230401149A1

公开(公告)日：2023-12-14

申请号：US18457672

申请日：2023-08-29

Applicant: KIOXIA CORPORATION

Inventor： Yuki SASAKI ,  Shinichi KANNO ,  Takahiro KURITA

IPC: G06F12/02 ,  G06F12/1009

CPC classification number: G06F12/0246 ,  G06F12/1009 ,  G06F12/0207 ,  G06F2212/7209 ,  G06F2212/7201 ,  G06F2212/651

Abstract: According to one embodiment, a memory system includes a non-volatile memory and a data map configured to manage validity of data written in the non-volatile memory. The data map includes a plurality of first fragment tables corresponding to a first hierarchy and a second fragment table corresponding to a second hierarchy higher than the first hierarchy. Each of the first fragment tables is used to manage the validity of each data having a predetermined size written in a range of physical address in the non-volatile memory allocated to the first fragment table. The second fragment table is used for each of the first fragment tables to manage reference destination information for referencing the first fragment table.

公开(公告)号：US20230359380A1

公开(公告)日：2023-11-09

申请号：US18352813

申请日：2023-07-14

Applicant: KIOXIA CORPORATION

Inventor： Shinichi KANNO

IPC: G06F3/06 ,  G06F9/50 ,  G06F12/02 ,  G06F12/06 ,  G06F13/16

CPC classification number: G06F3/064 ,  G06F3/0679 ,  G06F3/0659 ,  G06F9/5016 ,  G06F12/0246 ,  G06F12/0623 ,  G06F13/1668 ,  G06F3/0614 ,  G06F2212/7202

Abstract: According to one embodiment, when receiving a write command including a first identifier of identifiers for accessing regions from a host, a memory system allocates one block of a common free block group shared by the regions as a write destination block for the region corresponding to the first identifier. When receiving a copy command including a block address of a copy source block of blocks belonging to the region corresponding to the first identifier, and an identifier of a copy destination target region indicative of the first identifier from the host, the memory system allocates one block as a copy destination block for the region corresponding to the first identifier, and copies data from the copy source block to the copy destination block.

公开(公告)号：US20230305704A1

公开(公告)日：2023-09-28

申请号：US18327108

申请日：2023-06-01

Applicant: KIOXIA CORPORATION

Inventor： Naoki ESAKA ,  Shinichi KANNO

IPC: G06F3/06

CPC classification number: G06F3/0608 ,  G06F3/0656 ,  G06F3/0688 ,  G06F3/0659 ,  G06F3/064

Abstract: According to one embodiment, a controller of a memory system performs a first operation a plurality of times for each of a plurality of first blocks. The first operation includes a write operation for writing data in a first write mode for writing m-bit data per memory cell and a data erase operation. While a second block is not a defective block, the controller performs a second operation a plurality of times for the second block. The second operation includes a write operation for writing data in a second write mode for writing n-bit data per memory cell and a data erase operation. When the second block is a defective block, the controller selects a first block from the plurality of first blocks, and writes second write data to the selected first block in the second write mode.

公开(公告)号：US20230297290A1

公开(公告)日：2023-09-21

申请号：US17898390

申请日：2022-08-29

Applicant: KIOXIA CORPORATION

Inventor： Hideki YOSHIDA ,  Shinichi KANNO

IPC: G06F3/06

CPC classification number: G06F3/0665 ,  G06F3/061 ,  G06F3/0659 ,  G06F3/0688

Abstract: A memory system includes a nonvolatile memory including memory dies, and a controller. The controller is configured to create a first virtual storage with a first part of the memory dies and a second virtual storage with a second part of the memory dies, and create a redundant logical domain spanning one or more memory dies corresponding to the first virtual storage and one or more memory dies corresponding to the second virtual storage. The memory controller is configured to, in response to a write command, store write data corresponding to the write command in a first region of the first virtual storage and in a second region of the second virtual storage, and return to the host a response including a first physical address of the first region and a second physical address of the second region.

公开(公告)号：US20230139971A1

公开(公告)日：2023-05-04

申请号：US18148060

申请日：2022-12-29

Applicant: Kioxia Corporation

Inventor： Shinichi KANNO ,  Hironori UCHIKAWA

IPC: H03M13/29 ,  G06F11/10 ,  H03M13/35 ,  G11C29/52 ,  G06F13/16 ,  G06F13/40 ,  H03M13/00

Abstract: A semiconductor memory device includes a plurality of detecting code generators configured to generate a plurality of detecting codes to detect errors in a plurality of data items, respectively, a plurality of first correcting code generators configured to generate a plurality of first correcting codes to correct errors in a plurality of first data blocks, respectively, each of the first data blocks containing one of the data items and a corresponding detecting code, a second correcting code generators configured to generate a second correcting code to correct errors in a second data block, the second data block containing the first data blocks, and a semiconductor memory configured to nonvolatilely store the second data block, the first correcting codes, and the second correcting code.

公开(公告)号：US20230022741A1

公开(公告)日：2023-01-26

申请号：US17959624

申请日：2022-10-04

Applicant: KIOXIA CORPORATION

Inventor： Shinichi KANNO

IPC: G06F3/06 ,  G06F12/02 ,  H04L9/08

Abstract: According to one embodiment, when data is to be written to a first physical storage location that is designated by a first physical address, a memory system encrypts the data with the first physical address and a first encryption key, and writes the encrypted data to the first physical storage location. When the encrypted data is to be copied to a second physical storage location, the memory system decrypts the encrypted data with the first physical address and the first encryption key, and re-encrypts the decrypted data with a second encryption key and a copy destination physical address indicative of the second physical storage location.