公开(公告)号：US20220157651A1

公开(公告)日：2022-05-19

申请号：US17439300

申请日：2020-02-26

Applicant: Soitec

Inventor： Didier Landru ,  Oleg Kononchuk ,  Nadia Ben Mohamed

IPC: H01L21/762 ,  H01L21/265 ,  H01L21/78

Abstract: A method for transferring a useful layer to a carrier substrate, includes the following steps: a) providing a donor substrate including a buried weakened plane; b) providing a carrier substrate; c) joining the donor substrate, by its front face, to the carrier substrate along a bonding interface so as to form a bonded structure; d) annealing the bonded structure in order to apply a weakening thermal budget thereto and to bring the buried weakened plane to a defined level of weakening; and e) initiating a splitting wave in the weakened plane by applying a stress to the bonded structure, the splitting wave self-propagating along the weakened plane to result in the useful layer being transferred to the carrier substrate. The splitting wave is initiated when the bonded structure is subjected to a temperature between 150° C. and 250° C.

公开(公告)号：US11335847B2

公开(公告)日：2022-05-17

申请号：US16072587

申请日：2017-01-17

Applicant: Soitec

Inventor： Oleg Kononchuk ,  Eric Butaud ,  Eric Desbonnets

IPC: H01L41/312 ,  H01L41/08 ,  H03H9/02 ,  H03H9/00 ,  H03H3/02

Abstract: The disclosure relates to a hybrid structure for a surface-acoustic-wave device comprising a useful layer of piezoelectric material joined to a carrier substrate having a thermal expansion coefficient lower than that of the useful layer; the hybrid structure comprising an intermediate layer located between the useful layer and the carrier substrate, the intermediate layer being a structured layer formed from at least two different materials comprising a plurality of periodic motifs in the plane of the intermediate layer.

公开(公告)号：US11282889B2

公开(公告)日：2022-03-22

申请号：US16477499

申请日：2018-01-10

Applicant: Soitec

Inventor： Walter Schwarzenbach ,  Oleg Kononchuk ,  Ludovic Ecarnot ,  Christelle Michau

IPC: H01L27/146 ,  H01L21/762

Abstract: A substrate for a front-side type image sensor includes a supporting semiconductor substrate, an electrically insulating layer, and a silicon-germanium semiconductor layer, known as the active layer. The electrically insulating layer includes a stack of dielectric and metallic layers selected such that the reflectivity of the stack in a wavelength range of between 700 nm and 3 μm is greater than the reflectivity of a silicon oxide layer having a thickness equal to that of the stack. The substrate also comprises a silicon layer between the electrically insulating layer and the silicon-germanium active layer. The disclosure also relates to a method for the production of such a substrate.

公开(公告)号：US11276605B2

公开(公告)日：2022-03-15

申请号：US16473475

申请日：2018-01-10

Applicant: Soitec

Inventor： Oleg Kononchuk ,  Didier Landru ,  Nadia Ben Mohamed

IPC: H01L21/762 ,  H01L21/324

Abstract: A method of fabricating a semiconductor substrate includes the following activities: a) providing a donor substrate with a weakened zone inside the donor substrate, the weakened zone forming a border between a layer to be transferred and the rest of the donor substrate, b) attaching the donor substrate to a receiver substrate, the layer to be transferred being located at the interface between the donor substrate and the receiver substrate; c) detaching the receiver substrate along with the transferred layer from the rest of the donor substrate, at the weakened zone; and d) at least one step of smoothing the surface of the transferred layer, wherein the semiconductor substrate obtained from step c) is kept, at least from the moment of detachment until the end of the smoothing step, in a non-oxidizing inert atmosphere or in a mixture of non-oxidizing inert gases. Semiconductor substrates are fabricated using such a method.

公开(公告)号：US11251265B2

公开(公告)日：2022-02-15

申请号：US16080279

申请日：2017-02-23

Applicant: Centre National de la Recherche Scientifique ,  Universite Claude Bernard Lyon 1 ,  Soitec

Inventor： Christophe Figuet ,  Oleg Kononchuk ,  Kassam Alassaad ,  Gabriel Ferro ,  Véronique Souliere ,  Christelle Veytizou ,  Taguhi Yeghoyan

IPC: H01L29/06 ,  H01L21/02 ,  H01L21/762 ,  H01L29/16

Abstract: A support for a semiconductor structure includes a charge-trapping layer on a base substrate. The charge-trapping layer consists of a polycrystalline main layer and, interposed in the main layer or between the main layer and the base substrate, at least one intermediate polycrystalline layer composed of a silicon and carbon alloy or carbon. The intermediate layer has a resistivity greater than 1000 ohm·cm.

公开(公告)号：US20210366763A1

公开(公告)日：2021-11-25

申请号：US17444230

申请日：2021-08-02

Applicant: Soitec

Inventor： Walter Schwarzenbach ,  Oleg Kononchuk ,  Ludovic Ecarnot

IPC: H01L21/762 ,  H01L27/146 ,  H01L31/028 ,  H01L21/02 ,  H01L21/203

Abstract: A semiconductor on insulator type structure, which may be used for a front side type imager, successively comprises, from its rear side to its front side, a semiconductor support substrate, an electrically insulating layer and an active layer comprising a monocrystalline semiconductor material. The active layer is made of a semiconductor material having a state of mechanical stress with respect to the support substrate, and the support substrate comprises, on its rear side, a silicon oxide layer, the thickness of the oxide layer being chosen to compensate bow induced by the mechanical stress between the active layer and the support substrate during cooling of the structure after the formation by epitaxy of at least a part of the active layer on the support substrate.

公开(公告)号：US20210183691A1

公开(公告)日：2021-06-17

申请号：US17257176

申请日：2018-07-05

Applicant: Soitec

Inventor： Christelle Veytizou ,  Patrick Reynaud ,  Oleg Kononchuk ,  Frédéric Allibert

IPC: H01L21/762 ,  H01L21/02 ,  H01L23/66 ,  H01L29/16 ,  H01Q1/22

Abstract: A substrate for applications in the fields of radiofrequency electronics and microelectronics, comprises: a base substrate; a single carbon layer positioned on and directly in contact with the base substrate, with the carbon layer having a thickness ranging from 1 nm to 5 nm; an insulator layer positioned on the carbon layer; and a device layer positioned on the insulator layer. The disclosure also relates to a process for manufacturing such a substrate

公开(公告)号：US10924081B2

公开(公告)日：2021-02-16

申请号：US16829604

申请日：2020-03-25

Applicant: Soitec

Inventor： Marcel Broekaart ,  Thierry Barge ,  Pascal Guenard ,  Ionut Radu ,  Eric Desbonnets ,  Oleg Kononchuk

IPC: H03H9/02 ,  H03H3/02 ,  H03H3/04 ,  H03H3/10 ,  H03H9/13 ,  H03H9/145 ,  H03H9/17 ,  H03H9/25 ,  H03H9/56 ,  H03H9/64 ,  H01L41/312 ,  H01L41/047 ,  H01L27/20 ,  H01L41/335

Abstract: A substrate for a surface acoustic wave device or bulk acoustic wave device, comprising a support substrate and an piezoelectric layer on the support substrate, wherein the support substrate comprises a semiconductor layer on a stiffening substrate having a coefficient of thermal expansion that is closer to the coefficient of thermal expansion of the material of the piezoelectric layer than that of silicon, the semiconductor layer being arranged between the piezoelectric layer and the stiffening substrate.

公开(公告)号：US20200152689A1

公开(公告)日：2020-05-14

申请号：US16495362

申请日：2018-03-21

Applicant: Soitec

Inventor： Walter Schwarzenbach ,  Oleg Kononchuk ,  Ludovic Ecarnot

IPC: H01L27/146 ,  H01L31/028 ,  H01L21/762

Abstract: A semiconductor on insulator type structure, which may be sued for a front side type imager, successively comprises, from its rear side to its front side, a semiconductor support substrate, an electrically insulating layer and an active layer comprising a monocrystalline semiconductor material. The active layer is made of a semiconductor material having a state of mechanical stress with respect to the support substrate, and the support substrate comprises, on its rear side, a silicon oxide layer, the thickness of the oxide layer being chosen to compensate bow induced by the mechanical stress between the active layer and the support substrate during cooling of the structure after the formation by epitaxy of at least a part of the active layer on the support substrate.

公开(公告)号：US10510531B2

公开(公告)日：2019-12-17

申请号：US15803447

申请日：2017-11-03

Applicant: Soitec

Inventor： Oleg Kononchuk ,  Isabelle Bertrand ,  Luciana Capello ,  Marcel Broekaart

IPC: H01L21/02 ,  H01L21/268 ,  H01L21/322 ,  H01L21/324 ,  C30B29/06 ,  H01L21/762 ,  H01L27/12

Abstract: A method of fabrication of a semiconductor element includes a step of rapid heat treatment in which a substrate comprising a base having a resistivity greater than 1000 Ohm·cm is exposed to a peak temperature sufficient to deteriorate the resistivity of the base. The step of rapid heat treatment is followed by a curing heat treatment in which the substrate is exposed to a curing temperature between 800° C. and 1250° C. and then cooled at a cooldown rate less than 5° C./second when the curing temperature is between 1250° C. and 1150° C., less than 20° C./second when the curing temperature is between 1150° C. and 1100° C., and less than 50° C./second when the curing temperature is between 1100° C. and 800° C.