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    METHOD FOR FABRICATING A STRUCTURE
    2.
    发明申请
    METHOD FOR FABRICATING A STRUCTURE 有权
    制作结构的方法

    公开(公告)号：US20150303247A1

    公开(公告)日：2015-10-22

    申请号：US14646642

    申请日：2013-12-02

    Applicant: Soitec

    Inventor： Alexandre Chibko ,  Isabelle Bertrand ,  Sylvain Peru ,  Sothachett Van ,  Patrick Reynaud

    IPC: H01L29/04 ,  H01L29/16 ,  H01L21/324 ,  H01L21/02

    CPC classification number: H01L29/04 ,  H01L21/02263 ,  H01L21/02524 ,  H01L21/0262 ,  H01L21/02664 ,  H01L21/26506 ,  H01L21/324 ,  H01L21/76254 ,  H01L29/16

    Abstract: This method for fabricating a structure comprising, in succession, a support substrate, a dielectric layer, an active layer, a separator layer of polycrystalline silicon, comprising the steps of: a) providing a donor substrate, b) forming an embrittlement area in the donor substrate, c) providing the support structure, d) forming the separator layer on the support substrate, e) forming the dielectric layer, f) assembling the donor substrate and the support substrate, g) fracturing the donor substrate along the embrittlement area, h) subjecting the structure to a strengthening annealing of at least 10 minutes, the fabrication method being noteworthy in that step d) is executed in such a way that the polycrystalline silicon of the separator layer exhibits an entirely random grain orientation, and in that the strengthening annealing is executed at a temperature strictly greater than 950° C. and less than 1200° C.

    Abstract translation: 用于制造结构的方法包括依次包括支撑衬底，电介质层，有源层，多晶硅隔板层，其包括以下步骤：a）提供施主衬底，b）在所述衬底中形成脆化区域 供体衬底，c）提供支撑结构，d）在支撑衬底上形成隔离层，e）形成电介质层，f）组装供体衬底和支撑衬底，g）沿着脆化区域压裂供体衬底， h）对结构进行至少10分钟的强化退火，在步骤d）中制造方法值得注意的是，隔板层的多晶硅呈现完全随机的晶粒取向， 强化退火在严格高于950℃且小于1200℃的温度下进行。

    METHOD FOR MANUFACTURING A STRUCTURE COMPRISING A THIN LAYER TRANSFERRED ONTO A SUPPORT PROVIDED WITH A CHARGE TRAPPING LAYER
    4.
    发明申请
    METHOD FOR MANUFACTURING A STRUCTURE COMPRISING A THIN LAYER TRANSFERRED ONTO A SUPPORT PROVIDED WITH A CHARGE TRAPPING LAYER 有权

    公开(公告)号：US20220247374A1

    公开(公告)日：2022-08-04

    申请号：US17597581

    申请日：2020-03-26

    Applicant: Soitec

    Inventor： Isabelle Bertrand ,  Alexis Drouin ,  Isabelle Huyet ,  Eric Butaud ,  Morgane Logiou

    IPC: H03H3/08 ,  H03H9/02

    Abstract: A method for manufacturing a structure comprising a thin layer transferred onto a support provided with a charge trapping layer, the method comprising the following steps: —preparing the support comprising forming the trapping layer on a base substrate, the trapping layer having a hydrogen concentration of less than 10{circumflex over ( )}18 at/cm{circumflex over ( )}; —joining the support to a donor substrate by way of a dielectric layer having a hydrogen concentration of less than 10{circumflex over ( )}20 at/cm{circumflex over ( )}3 or comprising a barrier preventing the diffusion of hydrogen toward the trapping layer or having low hydrogen diffusivity; —removing part of the donor substrate to form the thin layer; the manufacturing method exposing the structure to a temperature below a maximum temperature of 1000° C. The present disclosure also relates to a structure obtained at the end of this method.

    METHOD FOR MANUFACTURING A SEMICONDUCTOR-ON-INSULATOR SUBSTRATE FOR RADIOFREQUENCY APPLICATIONS
    6.
    发明公开
    METHOD FOR MANUFACTURING A SEMICONDUCTOR-ON-INSULATOR SUBSTRATE FOR RADIOFREQUENCY APPLICATIONS 审中-公开

    公开(公告)号：US20230207382A1

    公开(公告)日：2023-06-29

    申请号：US17998833

    申请日：2021-05-18

    Applicant: Soitec

    Inventor： Isabelle Bertrand ,  Walter Schwarzenbach ,  Frédéric Allibert

    IPC: H01L21/762

    CPC classification number: H01L21/76254

    Abstract: A method for fabricating a semiconductor-on-insulator substrate for radiofrequency applications, comprises:



    forming a donor substrate through epitaxial growth of an undoped semiconductor layer on a p-doped semiconductor seed substrate;
    forming an electrically insulating layer on the undoped epitaxial semiconductor,
    implanting ion species through the electrically insulating layer, so as to form, in the undoped epitaxial semiconductor layer, a weakened area defining a semiconductor thin layer to be transferred,
    providing a semiconductor carrier substrate having an electrical resistivity greater than or equal to 500 Ω·cm,
    bonding the donor substrate to the carrier substrate via the electrically insulating layer, and
    detaching the donor substrate along the weakened area of embrittlement so as to transfer the semiconductor thin layer from the donor substrate to the carrier substrate.

    METHOD FOR MANUFACTURING A SEMICONDUCTOR-ON-INSULATOR STRUCTURE FOR RADIOFREQUENCY APPLICATIONS
    7.
    发明申请
    METHOD FOR MANUFACTURING A SEMICONDUCTOR-ON-INSULATOR STRUCTURE FOR RADIOFREQUENCY APPLICATIONS 有权

    公开(公告)号：US20230025429A1

    公开(公告)日：2023-01-26

    申请号：US17757822

    申请日：2021-01-07

    Applicant: Soitec

    Inventor： Aymen Ghorbel ,  Frédéric Allibert ,  Damien Massy ,  Isabelle Bertrand ,  Lamia Nouri

    IPC: H01L21/761 ,  H01L21/762

    Abstract: The invention relates to a method for manufacturing a semiconductor-on-insulator structure (10), comprising the following steps: —providing an FD-SOI substrate (1) comprising, successively from its base to its top: a monocrystalline substrate (2) having an electrical resistivity of between 500 Ω·cm and 30 kΩ·cm, an interstitial oxygen content (Oi) of between 20 and 40 old ppma, and having an N- or P-type doping, an electrically insulating layer (3) having a thickness of between 20 nm and 400 nm, a monocrystalline layer (4) having a P-type doping, —heat-treating the FD-SOI substrate (1) at a temperature greater than or equal to 1175° C. for a time greater than or equal to 1 hour in order to form a P-N junction (5) in the substrate. The invention also relates to such a semiconductor-on-insulator structure.

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