公开(公告)号：US11675506B2

公开(公告)日：2023-06-13

申请号：US17181579

申请日：2021-02-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junghyun Hong ,  Youngjin Cho ,  Younggeon Yoo ,  Chanho Yoon ,  Hyeokjun Choe

IPC: G06F3/06 ,  G06F9/48

CPC classification number: G06F3/0631 ,  G06F3/0605 ,  G06F3/067 ,  G06F3/0659 ,  G06F9/4881

Abstract: A storage device includes a plurality of non-volatile memories; a volatile memory; a computing device configured to perform an operation on data provided by the plurality of non-volatile memories; and a storage controller including a resource manager configured to receive information about priority of tenants from a host, and to dynamically set resources of the plurality of non-volatile memories, the volatile memory, and the computing device based on the priority.

公开(公告)号：US11631718B2

公开(公告)日：2023-04-18

申请号：US17345423

申请日：2021-06-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinhong Kim ,  Seyun Kim ,  Youngjin Cho

IPC: G11C11/00 ,  H01L27/24 ,  G11C11/56 ,  G11C13/00 ,  H01L45/00

Abstract: A vertical nonvolatile memory device including memory cell strings using a resistance change material is provided. Each of the memory cell strings of the nonvolatile memory device includes a semiconductor layer extending in a first direction; a plurality of gates and a plurality of insulators alternately arranged in the first direction; a gate insulating layer extending in the first direction between the plurality of gates and the semiconductor layer and between the plurality of insulators and the semiconductor layer; and a resistance change layer extending in the first direction on a surface of the semiconductor layer. The resistance change layer includes a metal-semiconductor oxide including a mixture of a semiconductor material of the semiconductor layer and a transition metal oxide.

公开(公告)号：US11557723B2

公开(公告)日：2023-01-17

申请号：US16658864

申请日：2019-10-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jungho Yoon ,  Soichiro Mizusaki ,  Youngjin Cho

IPC: H01L45/00 ,  H01L27/24 ,  G11C13/00

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate a substrate, a first electrode structure on the substrate, the first electrode structure including first insulating patterns and first electrode patterns, the first insulating patterns alternately stacked with the first electrode patterns, a second electrode pattern on a sidewall of the first electrode structure, and a data storage film on a sidewall of the second electrode pattern. The data storage film has a variable resistance.

公开(公告)号：US11545224B2

公开(公告)日：2023-01-03

申请号：US17306302

申请日：2021-05-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yumin Kim ,  Seyun Kim ,  Jinhong Kim ,  Soichiro Mizusaki ,  Youngjin Cho

IPC: G11C16/26 ,  G11C16/30 ,  G11C5/06 ,  G11C16/14 ,  G11C16/04 ,  G11C16/24

Abstract: A nonvolatile memory device and an operating method thereof are provided. The nonvolatile memory device includes a memory cell array including first to third memory cells sequentially arranged in a vertical stack structure and a control logic configured to apply a first non-selection voltage to the first memory cell, apply a second non-selection voltage different from the first non-selection voltage to the third memory cell, apply a selection voltage to the second memory cell, and select the second memory cell as a selection memory cell.

公开(公告)号：US11226823B2

公开(公告)日：2022-01-18

申请号：US16879120

申请日：2020-05-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Younho Jeon ,  Youngjin Cho ,  Hee Hyun Nam ,  Hyo-Deok Shin

IPC: G06F9/30 ,  G06F1/12 ,  G06K9/62 ,  G06F12/02 ,  G06F9/54 ,  G06F1/08

Abstract: A memory module includes a device controller that communicates with a host device based on a first interface including a first clock signal, a first data signal, and a first data strobe signal and operates in one of a first operation mode or a second operation mode depending on an operation mode control value from the host device, and a memory device that communicates with the device controller based on a second interface including a second data signal and a second data strobe signal. The device controller includes a logic circuit that transmits a predetermined training result value to the host device depending on a training control value from the host device, when a training is performed on a third interface being a virtual interface recognized by the host device in the first operation mode.

公开(公告)号：US11175853B2

公开(公告)日：2021-11-16

申请号：US15669851

申请日：2017-08-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Mu-Tien Chang ,  Dimin Niu ,  Hongzhong Zheng ,  Heehyun Nam ,  Youngjin Cho ,  Sun-Young Lim

IPC: G06F3/00 ,  G06F12/00 ,  G06F3/06 ,  G06F12/0895 ,  G06F12/0868 ,  G06F13/16 ,  G06F12/02

Abstract: A memory module includes a memory controller including: a host layer; a media layer coupled to a non-volatile memory; and a logic core coupled to the host layer, the media layer, and a volatile memory, the logic core storing a first write group table including a plurality of rows, and the logic core being configured to: receive a persistent write command including a cache line address and a write group identifier; receive data associated with the persistent write command; write the data to the volatile memory at the cache line address; store the cache line address in a selected buffer of a plurality of buffers in a second write group table, the selected buffer corresponding to the write group identifier; and update a row of the first write group table to identify locations of the selected buffer containing valid entries, the row corresponding to the write group identifier.

公开(公告)号：US11120944B2

公开(公告)日：2021-09-14

申请号：US16169800

申请日：2018-10-24

Applicant: SAMSUNG ELECTRONICS CO., LTD. ,  NATIONAL INSTITUTE FOR MATERIALS SCIENCE

Inventor： Hyeon Cheol Park ,  Takayoshi Sasaki ,  Minoru Osada ,  Chan Kwak ,  Daejin Yang ,  Doh Won Jung ,  Youngjin Cho

IPC: H01G4/12 ,  H01G4/30 ,  H01G4/005 ,  H01G4/33

Abstract: A ceramic electronic component includes a pair of electrodes facing each other and a dielectric layer disposed between the pair of electrodes and including a plurality of ceramic nanosheets, where the plurality of ceramic nanosheets has a multimodal lateral size distribution expressed by at least two separated peaks, a method of manufacturing the same, and an electronic device including the ceramic electronic component.

公开(公告)号：US10930353B1

公开(公告)日：2021-02-23

申请号：US16775424

申请日：2020-01-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jungho Yoon ,  Seyun Kim ,  Jinhong Kim ,  Soichiro Mizusaki ,  Youngjin Cho

IPC: G11C16/10 ,  H01L27/11582 ,  G11C16/24 ,  G11C16/26 ,  G11C16/04

Abstract: Provided are a non-volatile memory device and an operating method thereof. The non-volatile memory device includes a memory cell array having a vertically stacked structure, a bit line for applying a programming voltage to the memory cell array, and a control logic. The memory cell array includes memory cells that each include a corresponding portion of a semiconductor layer and a corresponding portion of a resistance layer. The memory cells include a non-selected memory cell, a compensation memory cell, and a selected memory cell. The control logic is configured to apply an adjusted program voltage to the selected memory cell, based on applying a first voltage to the compensation memory cell, a second voltage to the selected memory cell, and a third voltage to the non-selected memory cell. The adjusted program voltage may be dropped compared to the programming voltage due to the compensation memory cell.

公开(公告)号：US10681439B2

公开(公告)日：2020-06-09

申请号：US16535569

申请日：2019-08-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinwoo Kim ,  Sujin Jung ,  Youngjin Cho ,  Sungjin Park ,  Hyunmin Oh ,  Iksu Jung

IPC: H04R1/02 ,  H05K7/20 ,  H04R1/04 ,  H04R3/12 ,  H04R1/24 ,  H04R1/40

Abstract: An electronic device is provided. The electronic device includes a housing including a first plate and at least one first opening; and a speaker structure spaced apart from the first plate and disposed in the housing, wherein the speaker structure includes a first structure which faces in a first direction, opposes the first plate, and forms a space connecting to the at least one first opening along with the first plate; a second opening formed by penetrating through a part of the first structure; at least one component disposed in the speaker structure and emitting heat; a thermal conducting member including a first portion disposed in the speaker structure and being in contact with the at least one component, and a second portion disposed in the second opening; and at least one speaker disposed in a direction different from the first direction.

公开(公告)号：US10261697B2

公开(公告)日：2019-04-16

申请号：US15055689

申请日：2016-02-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Han-Ju Lee ,  Youngkwang Yoo ,  Youngjin Cho

IPC: G06F3/06

Abstract: A storage device includes a data buffer, a device controller, and nonvolatile memories. The data buffer is configured to transact data from an external device. The device controller is configured to receive a command and an address from an external device, to control the data buffers, and to transact data with the data buffers. The nonvolatile memories are configured to perform write, read, and erase operations under control of the device controller. When a first link training between an external device and the data buffers is performed by the external device, the device controller performs a second link training between the device controller and a data buffer internally without control of the external device.