公开(公告)号：US20110319809A1

公开(公告)日：2011-12-29

申请号：US13168724

申请日：2011-06-24

申请人： Scott Smith

发明人： Scott Smith

IPC分类号： A61M37/00

CPC分类号： A61B17/22 ,  A61B5/04001 ,  A61B17/00008 ,  A61B18/1492 ,  A61B2017/22061 ,  A61B2017/22097 ,  A61B2018/00023 ,  A61B2018/0022 ,  A61B2018/00291 ,  A61B2018/00404 ,  A61B2018/00839 ,  A61B2018/1861 ,  A61M25/1027 ,  A61M2025/105 ,  A61M2025/1086 ,  A61N1/056

摘要： The present disclosure relates to devices, systems, and methods associated with a catheter device for delivering energy to a vein. One or more catheter devices include a cooling device, an infusion device, and an energy delivery device for delivering energy to a vein to treat incompetent valves.

摘要翻译： 本公开涉及与用于向静脉输送能量的导管装置相关联的装置，系统和方法。 一个或多个导管装置包括冷却装置，输注装置和用于向静脉输送能量以治疗不适当阀的能量输送装置。

公开(公告)号：USD643321S1

公开(公告)日：2011-08-16

申请号：US29356631

申请日：2010-03-01

申请人： Steven Nielsen ,  Curtis Chambers ,  Jeffrey Farr ,  William Johnson ,  Arthur DiMartino ,  Ronald Altman ,  Arthur Mistler ,  David Mathieu ,  James Sener ,  Christopher Hageman ,  Scott Smith ,  Joseph Paul

设计人： Steven Nielsen ,  Curtis Chambers ,  Jeffrey Farr ,  William Johnson ,  Arthur DiMartino ,  Ronald Altman ,  Arthur Mistler ,  David Mathieu ,  James Sener ,  Christopher Hageman ,  Scott Smith ,  Joseph Paul

公开(公告)号：USD634656S1

公开(公告)日：2011-03-22

申请号：US29356634

申请日：2010-03-01

申请人： Steven Nielsen ,  Curtis Chambers ,  Jeffrey Farr ,  William Johnson ,  Arthur DiMartino ,  Ronald Altman ,  Arthur Mistler ,  David Mathieu ,  James Sener ,  Christopher Hageman ,  Scott Smith ,  Joseph Paul

设计人： Steven Nielsen ,  Curtis Chambers ,  Jeffrey Farr ,  William Johnson ,  Arthur DiMartino ,  Ronald Altman ,  Arthur Mistler ,  David Mathieu ,  James Sener ,  Christopher Hageman ,  Scott Smith ,  Joseph Paul

公开(公告)号：US07884871B2

公开(公告)日：2011-02-08

申请号：US11763512

申请日：2007-06-15

申请人： Scott Smith ,  Richard L. Baer ,  Laura Savidge

发明人： Scott Smith ,  Richard L. Baer ,  Laura Savidge

IPC分类号： H04N3/14 ,  H01L31/062 ,  H01L27/00

CPC分类号： H04N5/3532 ,  H04N5/235 ,  H04N5/347 ,  H04N5/3742 ,  H04N5/3745 ,  H04N5/378

摘要： A digital frame transfer imager having an image sensor and frame memory in the same chip. The image sensor has an integrated memory controller for controlling transfers of data between the sensor and the memory array. The imager utilizes a rolling shutter and multiple groups of analog-to-digital processing circuitry to readout data from the sensor and to output digital images substantially free from image smear, kT/C noise and other unwanted image artifacts.

摘要翻译： 数字帧转移成像器，具有在相同芯片中的图像传感器和帧存储器。 图像传感器具有用于控制传感器和存储器阵列之间的数据传输的集成存储器控制器。 成像器利用滚动快门和多组模拟 - 数字处理电路从传感器读出数据并输出基本上没有图像污点，kT / C噪声和其他不需要的图像伪影的数字图像。

公开(公告)号：US07810125B2

公开(公告)日：2010-10-05

申请号：US11697123

申请日：2007-04-05

申请人： David Bartholomew ,  Scott Smith ,  Alan Stettler

发明人： David Bartholomew ,  Scott Smith ,  Alan Stettler

IPC分类号： H04N7/18 ,  H04N7/173 ,  H04N7/16 ,  G05B11/01

CPC分类号： H04B3/54 ,  H04B2203/5441 ,  H04B2203/5483 ,  H04N7/17309

摘要： A telephone link for set top box communication between the set top box and a central office is provided. This invention makes use of an AC power line to provide a communication channel between the set top box and the central office. The set top box is configured to include an interface, including coupling and modulation, between the set top box and the AC power line. A base unit, connected to the central office provides another interface configured to facilitate the coupling and modulation of signals between the central office and the AC power line.

摘要翻译： 提供了机顶盒和中心局之间的机顶盒通信的电话链路。 本发明利用AC电力线来提供机顶盒和中心局之间的通信信道。 机顶盒被配置为在机顶盒和AC电力线之间包括包括耦合和调制的接口。 连接到中心局的基本单元提供另一个配置为便于中心局和交流电源线之间的信号耦合和调制的接口。

公开(公告)号：US07646107B2

公开(公告)日：2010-01-12

申请号：US10953581

申请日：2004-09-30

申请人： Scott Smith

发明人： Scott Smith

IPC分类号： H02J1/00 ,  H02J3/00

CPC分类号： H02J7/0068 ,  H02J7/0055 ,  H02J9/061 ,  Y10T307/25

摘要： Methods and systems for programmable power adaptors that can be programmed to adapt electrical power for one or more electronic devices. A programmable power adaptor optionally includes a user interface and/or other user input mechanism(s), which allows users to preset voltage requirements for one or more electronic devices. The pre-settings are stored in memory for future use. The programmable power adaptor is optionally configurable for multiple electronic devices, and/or multiple users. The programmable power adaptor optionally informs users of faults, proper device usage, and/or provides database access.

摘要翻译： 可编程电源适配器的方法和系统，可编程为适应一个或多个电子设备的电力。 可编程电源适配器可选地包括用户接口和/或其他用户输入机制，其允许用户为一个或多个电子设备预设电压要求。 预设置存储在内存中以备将来使用。 可编程电源适配器可选地可配置用于多个电子设备和/或多个用户。 可编程电源适配器可选择性地通知用户故障，适当的设备使用和/或提供数据库访问。

公开(公告)号：US20090067277A1

公开(公告)日：2009-03-12

申请号：US11899738

申请日：2007-09-06

申请人： Scott Smith ,  Duc Ho ,  J. Thomas Pawlowski

发明人： Scott Smith ,  Duc Ho ,  J. Thomas Pawlowski

IPC分类号： G11C8/18

CPC分类号： G11C11/4076 ,  G06F3/0604 ,  G06F3/0659 ,  G06F3/0673 ,  G11C7/1066 ,  G11C7/1072 ,  G11C8/18 ,  G11C11/406 ,  G11C11/40615 ,  G11C11/4074 ,  G11C11/408 ,  G11C11/4096 ,  G11C2207/2227 ,  G11C2211/4067 ,  G11C2211/4068

摘要： Systems, devices and methods are disclosed. In an embodiment of one such device, an embodiment of a memory device includes a command decoder that is operable to decode received write enable, row address strobe and column address strobe signals to place the memory device in at least one reduced power state despite the absence of either a clock enable signal or a chip select signal. The command decoder performs this function by decoding the write enable, row address strobe and column address strobe signals in combination with at least one address signal received by the memory device. The command decoder can also decode a no operation command, which differs from the at least one reduced power state by only the state of the write enable signal. As a result, when the at least one reduced power state is terminated by a transition of the write enable signal, the memory device automatically transitions to a no operation mode.

摘要翻译： 公开了系统，装置和方法。 在一个这样的设备的实施例中，存储器件的实施例包括命令解码器，其可操作以解码所接收的写入使能，行地址选通和列地址选通信号，以将存储器件置于至少一个降低功率状态，尽管不存在 时钟使能信号或芯片选择信号。 命令解码器通过结合存储器件接收的至少一个地址信号来解码写使能，行地址选通和列地址选通信号来执行该功能。 命令解码器还可以仅通过写使能信号的状态来解码不同于至少一个降低功率状态的无操作命令。 结果，当通过写使能信号的转变来终止至少一个降低功率状态时，存储器件自动转换到无操作模式。

公开(公告)号：US07339810B1

公开(公告)日：2008-03-04

申请号：US11089837

申请日：2005-03-24

申请人： Scott Smith

发明人： Scott Smith

IPC分类号： G11C15/00

CPC分类号： G11C15/00

摘要： A search engine system (100) can include a key multiplexer (104) and logic circuit (108). A key from a previous operation can be received by logic circuit (108) and altered to generate an idle key. In a non-search operation, the idle key can be applied to a CAM section to draw current as in a normal search operation. Logic circuit (108) can ensure that an idle key value is always different than a previously applied key value.

摘要翻译： 搜索引擎系统（100）可以包括密钥多路复用器（104）和逻辑电路（108）。 来自先前操作的键可由逻辑电路（108）接收并改变以产生空闲键。 在非搜索操作中，空闲键可以应用于CAM部分以在正常搜索操作中绘制电流。 逻辑电路（108）可以确保空闲键值总是与先前应用的键值不同。

公开(公告)号：US20080021315A1

公开(公告)日：2008-01-24

申请号：US11828262

申请日：2007-07-25

申请人： Scott Smith

发明人： Scott Smith

IPC分类号： A61M25/12

CPC分类号： G01R33/287 ,  G01R33/34084 ,  G01R33/3628

摘要： An intravascular device includes alternating conductive and dielectric layers and an electrically conductive coil in a configuration that effects an impedance-matching circuit. Another embodiment of an intravascular device has cylindrical inner and outer walls formed of an expandable, electrically conductive material, the inner and outer walls being separated by a compressible dielectric material. Varying the pressure in the lumen defined by the inner wall changes the spacing between the inner and outer walls, thereby changing the capacitance between the inner and outer wall. Another embodiment of an intravascular device includes one or more coaxial chokes for limiting heating caused by currents induced by RF signals. A conductive shield of the choke is formed of a conductive polymer to further reduce heating effects.

公开(公告)号：US20070294694A1

公开(公告)日：2007-12-20

申请号：US11454820

申请日：2006-06-16

申请人： Robert Jeter ,  Trevor Gamer ,  William Lee ,  Scott Smith ,  Gegory Goss

发明人： Robert Jeter ,  Trevor Gamer ,  William Lee ,  Scott Smith ,  Gegory Goss

IPC分类号： G06F9/46

CPC分类号： G06F9/462 ,  G06F9/30123 ,  G06F9/3851

摘要： Techniques for processing each of multiple threads that share a core processor include receiving an intra-thread register address from the core processor. This address contains C bits for accessing each of 2c registers for each thread. A thread ID is received from a thread scheduler external to the core processor. The Thread ID contains T bits for indicating a particular thread for up to 2T threads. A particular register is accessed in a register bank that has 2(C+T) registers using an inter-thread address that includes both the intra-thread register address and the thread ID. The particular register holds contents for the intra-thread register address for a thread having the thread ID. Consequently, register contents of all registers of all threads reside in the register bank. Thread switching is accomplished rapidly by simply accessing different slices in the register bank, without swapping contents between a set of registers and memory.

摘要翻译： 用于处理共享核心处理器的多个线程中的每一个的技术包括从核心处理器接收线程内注册地址。 该地址包含用于访问每个线程的2个C / S寄存器中的每一个的C位。 从核心处理器外部的线程调度程序接收线程ID。 线程ID包含用于指示最多2条线程的特定线程的T位。 使用包括线程间寄存器地址和线程ID的线程间地址的寄存器组中访问具有2个（C + T）寄存器的特定寄存器。 特定的寄存器保存具有线程ID的线程的线程内注册地址的内容。 因此，所有线程的所有寄存器的寄存器内容都驻留在寄存器组中。 线程切换通过简单地访问寄存器组中的不同切片而快速完成，而不会在一组寄存器和存储器之间交换内容。