公开(公告)号：US20240188330A1

公开(公告)日：2024-06-06

申请号：US18517122

申请日：2023-11-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Koji KUSUNOKI ,  Hideaki SHISHIDO ,  Susumu KAWASHIMA ,  Motoharu SAITO ,  Tomoaki ATSUMI

IPC: H10K59/121 ,  G09G3/3233 ,  H10K59/124

CPC classification number: H10K59/1213 ,  G09G3/3233 ,  H10K59/124 ,  G09G2300/0465 ,  G09G2300/0819 ,  G09G2300/0852 ,  G09G2310/08 ,  G09G2330/021

Abstract: A novel semiconductor device is provided. A gate of a second transistor is electrically connected to one of a source and a drain of a first transistor and one of a source and a drain of a third transistor. Aback gate of the second transistor is electrically connected to one of a source and a drain of a fourth transistor and one terminal of a first capacitor. One of a source and a drain of the second transistor is electrically connected to the other of the source and the drain of the third transistor, the other terminal of the first capacitor, and one terminal of a light-emitting element. A semiconductor layer in each of the first, third, and fourth transistors is partly in an opening formed in an insulating layer.

公开(公告)号：US20240105737A1

公开(公告)日：2024-03-28

申请号：US18534908

申请日：2023-12-11

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hisao IKEDA ,  Kouhei TOYOTAKA ,  Hideaki SHISHIDO ,  Hiroyuki MIYAKE ,  Kohei YOKOYAMA ,  Yasuhiro JINBO ,  Yoshitaka DOZEN ,  Takaaki NAGATA ,  Shinichi HIRASA

IPC: H01L27/12 ,  G09G3/20 ,  G09G3/3233 ,  H01L29/786 ,  H10K59/131 ,  H10K59/35

CPC classification number: H01L27/124 ,  G09G3/2003 ,  G09G3/3233 ,  H01L27/1225 ,  H01L27/1266 ,  H01L29/78648 ,  H10K59/131 ,  H10K59/352 ,  H10K59/353 ,  G09G3/3648 ,  G09G2300/0452 ,  G09G2300/0842 ,  G09G2320/0295 ,  G09G2320/043 ,  G09G2320/0693

Abstract: Provided is a display device with extremely high resolution, a display device with higher display quality, a display device with improved viewing angle characteristics, or a flexible display device. Same-color subpixels are arranged in a zigzag pattern in a predetermined direction. In other words, when attention is paid to a subpixel, another two subpixels exhibiting the same color as the subpixel are preferably located upper right and lower right or upper left and lower left. Each pixel includes three subpixels arranged in an L shape. In addition, two pixels are combined so that pixel units including subpixel are arranged in matrix of 3×2.

公开(公告)号：US20240105732A1

公开(公告)日：2024-03-28

申请号：US18378740

申请日：2023-10-11

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kouhei TOYOTAKA ,  Kei TAKAHASHI ,  Hideaki SHISHIDO ,  Koji KUSUNOKI

IPC: H01L27/12 ,  H01L29/04 ,  H01L29/49 ,  H01L29/786

CPC classification number: H01L27/1225 ,  H01L27/124 ,  H01L27/1266 ,  H01L29/045 ,  H01L29/4908 ,  H01L29/78648 ,  H01L29/7869 ,  H10K59/126

Abstract: A novel display device or the like in which a transistor connected to a scan line has small gate capacitance is provided. A novel display device or the like in which a scan line has low resistance is provided. A novel display device or the like in which pixels can be arranged with high density is provided. A novel display device or the like that can be manufactured without an increase in cost is provided. In a transistor including a first gate electrode and a second gate electrode, the first gate electrode is formed using a metal material with low resistance and the second gate electrode is formed using a metal oxide material that can reduce oxygen vacancies in an oxide semiconductor layer. The first gate electrode is connected to the scan line, and the second gate electrode is connected to a wiring to which a constant potential is supplied.

公开(公告)号：US20230396899A1

公开(公告)日：2023-12-07

申请号：US18024084

申请日：2021-09-13

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yusuke NEGORO ,  Hideaki SHISHIDO

IPC: H04N25/79 ,  H04N25/77 ,  H04N25/78

CPC classification number: H04N25/79 ,  H04N25/78 ,  H04N25/77

Abstract: The present invention relates to a highly functional imaging device that can be manufactured through a small number of steps. The imaging device is formed in such a manner that a first stacked body in which a plurality of devices are stacked and a second stacked body in which a plurality of devices are stacked are bonded to each other. For example, a pixel circuit, a driver circuit of a pixel, and the like can be provided in the first stacked body, and a reading circuit of the pixel circuit, a memory circuit, a driver circuit of the memory circuit, and the like can be provided in the second stacked body. With these structures, the imaging device which is small can be formed. Furthermore, wiring delay or the like can be prevented by stacking circuits, so that high-speed operation can be performed.

公开(公告)号：US20230155199A1

公开(公告)日：2023-05-18

申请号：US18093833

申请日：2023-01-06

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Kazutaka KURIKI ,  Ryota TAJIMA ,  Kouhei TOYOTAKA ,  Hideaki SHISHIDO ,  Toshiyuki ISA

IPC: H01M10/48 ,  G06N3/04 ,  H01M10/44 ,  H02J7/00 ,  G06N3/065

CPC classification number: H01M10/482 ,  G06N3/04 ,  H01M10/441 ,  H01M10/486 ,  H02J7/0013 ,  H02J7/0047 ,  H02J7/007 ,  G06N3/065

Abstract: A power storage system with excellent characteristics is provided. A power storage system with a high degree of safety is provided. A power storage system with less deterioration is provided. A storage battery with excellent characteristics is provided. The power storage system includes a neural network and a storage battery. The neural network includes an input layer, an output layer, and one or more hidden layers between the input layer and the output layer. The predetermined hidden layer is connected to the previous hidden layer or the previous input layer by a predetermined weight coefficient, and connected to the next hidden layer or the next output layer by a predetermined weight coefficient. In the storage battery, voltage and time at which the voltage is obtained are measured as one of sets of data. The sets of data measured at different times are input to the input layer and the operational condition of the storage battery is changed in accordance with a signal output from the output layer.

公开(公告)号：US20220382089A1

公开(公告)日：2022-12-01

申请号：US17876719

申请日：2022-07-29

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hideaki SHISHIDO ,  Daisuke KUBOTA ,  Yusuke KUBOTA

IPC: G02F1/1333 ,  G06F3/041

Abstract: To provide a thin touch panel, a touch panel having a simple structure, a touch panel which can be easily incorporated into an electronic device, or a touch panel with a small number of components. The touch panel includes pixel electrodes arranged in a matrix, a plurality of signal lines, a plurality of scan lines, a plurality of first wirings extending in a direction parallel to the signal lines, and a plurality of second wirings extending in a direction parallel to the scan line. Part of the first wiring and part of the second wiring function as a pair of electrodes included in a touch sensor. The first wiring and the second wiring each have a stripe shape or form a mesh shape and are each provided between two adjacent pixel electrodes in a plan view.

公开(公告)号：US20220336570A1

公开(公告)日：2022-10-20

申请号：US17762490

申请日：2020-09-30

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takashi NAKAGAWA ,  Hidetomo KOBAYASHI ,  Hideaki SHISHIDO

IPC: H01L27/32

Abstract: A display device with high luminance is provided. A pixel includes a light-emitting device, a first transistor, a second transistor, a third transistor, a fourth transistor, a first capacitor, and a second capacitor. One electrode of the light-emitting device is electrically connected to one of a source and a drain of the first transistor. A gate of the first transistor is electrically connected to one electrode of the first capacitor and one of a source and a drain of the second transistor. The other of the source and the drain of the first transistor is electrically connected to one electrode of the second capacitor. One electrode of the second capacitor is electrically connected to a first wiring having a function of supplying a first potential. The other electrode of the second capacitor is electrically connected to the other electrode of the first capacitor, one of a source and a drain of the third transistor, and one of a source and a drain of the fourth transistor.

公开(公告)号：US20220284976A1

公开(公告)日：2022-09-08

申请号：US17749309

申请日：2022-05-20

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Seiko AMANO ,  Kouhei TOYOTAKA ,  Hiroyuki MIYAKE ,  Aya MIYAZAKI ,  Hideaki SHISHIDO ,  Koji KUSUNOKI

IPC: G11C19/28 ,  H03K19/00 ,  G11C19/18 ,  H01L25/03 ,  H05K7/02 ,  G09G3/36 ,  H01L27/12

Abstract: An object is to provide a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit. A pulse signal output circuit according to one embodiment of the disclosed invention includes first to tenth transistors. The ratio W/L of the channel width W to the channel length L of the first transistor and W/L of the third transistor are each larger than W/L of the sixth transistor. W/L of the fifth transistor is larger than W/L, of the sixth transistor. W/L of the fifth transistor is equal to W/L of the seventh transistor. W/L of the third transistor is larger than W/L of the fourth transistor. With such a structure, a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit can be provided.

公开(公告)号：US20220208939A1

公开(公告)日：2022-06-30

申请号：US17555671

申请日：2021-12-20

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hidetomo KOBAYASHI ,  Hideaki SHISHIDO ,  Shuichi KATSUI

IPC: H01L27/32 ,  H01L29/786

Abstract: A display device with high resolution is provided. A display device with low power consumption is provided. A display device with high luminance is provided. A display device with a high aperture ratio is provided. The display device includes a first wiring, a second wiring, a third wiring, and a pixel electrode. The first wiring extends in a first direction and is supplied with a source signal. The second wiring extends in a second direction intersecting the first direction and is supplied with a gate signal. The third wiring is supplied with a constant potential. The first wiring and the pixel electrode overlap with each other with the third wiring therebetween.

公开(公告)号：US20220181428A1

公开(公告)日：2022-06-09

申请号：US17603067

申请日：2020-04-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hidetomo KOBAYASHI ,  Hideaki SHISHIDO ,  Takayuki IKEDA ,  Shuichi KATSUI

IPC: H01L27/32

Abstract: A display apparatus with low power consumption and high image quality is provided. The display apparatus includes a light-emitting element, a first transistor, a second transistor, a third transistor, a first capacitor, and a second capacitor. Preferably, one electrode of the light-emitting element is electrically connected to one of a source and a drain of the first transistor; the one electrode of the light-emitting element is electrically connected to one electrode of the first capacitor; a gate of the first transistor is electrically connected to one of a source and a drain of the second transistor; the gate of the first transistor is electrically connected to one electrode of the second capacitor; the other electrode of the second capacitor is electrically connected to the other electrode of the first capacitor; and the other electrode of the second capacitor is electrically connected to one of a source and a drain of the third transistor.