公开(公告)号：US09219526B2

公开(公告)日：2015-12-22

申请号：US14630990

申请日：2015-02-25

Applicant: Texas Instruments Incorporated

Inventor： Shu Du ,  Anand G. Dabak ,  Xiaolin Lu ,  Il Han Kim

IPC: H04B3/54 ,  H04L12/10 ,  H04L12/26 ,  H04L7/00

CPC classification number: H04B3/54 ,  H04B3/544 ,  H04B2203/5408 ,  H04B2203/5466 ,  H04B2203/5495 ,  H04L7/00 ,  H04L12/10 ,  H04L43/0823

Abstract: Systems for channel selection in power line communications (PLC) are described. In some embodiments, a PLC device may include a processor and a memory. The memory stores instructions executable by the processor to cause the PLC device perform operations. One or more time slots in each of a plurality of frequency bands are sequentially scanned. A packet transmitted by a second PLC device to the PLC device over one of the plurality of frequency bands is detected. Additional packets received from the second PLC device are synchronized across the plurality of frequency bands based, at least in part, upon the detected packet. The additional packets are organized in a plurality of frames. Each of the plurality of frames having been transmitted by the second PLC device to the PLC device over a respective one of the plurality of frequency bands. Each frame has a plurality of time slots, and each time slot has a pair of beacon and bandscan packets.

Abstract translation: 描述了电力线通信（PLC）中通道选择的系统。 在一些实施例中，PLC设备可以包括处理器和存储器。 存储器存储可由处理器执行以使PLC设备执行操作的指令。 顺序地扫描多个频带中的每一个中的一个或多个时隙。 检测由第二PLC设备通过多个频带中的一个发送到PLC设备的分组。 至少部分地基于检测到的分组，从第二PLC设备接收的附加分组跨多个频带同步。 附加分组被组织成多个帧。 多个帧中的每一个已经由第二PLC设备通过多个频带中的相应一个发送到PLC设备。 每个帧具有多个时隙，并且每个时隙具有一对信标和带扫描分组。

公开(公告)号：US20150256217A1

公开(公告)日：2015-09-10

申请号：US14719405

申请日：2015-05-22

Applicant: Texas Instruments Incorporated

Inventor： Timothy Mark Schmidl ,  Anand G. Dabak

IPC: H04B1/707 ,  H04L27/22

CPC classification number: H04B1/707 ,  H04B1/7085 ,  H04L5/0048 ,  H04L27/22

Abstract: A method of operating a transmitter (FIGS. 3A and 5A) is disclosed. The method includes receiving a sequence of data bits (DATA), wherein each data bit has a respective sequence number. A first data bit of the sequence is spread (508) with a first spreading code (504) determined by the sequence number (502) of the first data bit. A second data bit of the sequence is spread (508) with an inverse of the first spreading code (506) determined by the sequence number (502) of the second data bit. The first and second data bits are modulated (510) and transmitted (516) to a remote receiver.

Abstract translation: 公开了一种操作发射机的方法（图3A和5A）。 该方法包括接收数据位序列（DATA），其中每个数据位具有相应的序列号。 序列的第一数据位由第一数据位的序列号（502）确定的第一扩展码（504）进行扩展（508）。 该序列的第二数据位以由第二数据位的序列号（502）确定的第一扩展码（506）的倒数进行扩展（508）。 第一和第二数据位被调制（510）并传输（516）到远程接收器。

公开(公告)号：US20150244541A1

公开(公告)日：2015-08-27

申请号：US14706118

申请日：2015-05-07

Applicant: Texas Instruments Incorporated

Inventor： Kumaran Vijayasankar ,  Ramanuja Vedantham ,  Anand G. Dabak

IPC: H04L12/413 ,  H04L29/06 ,  H04B3/54

CPC classification number: H04L12/413 ,  H04B3/54 ,  H04B3/542 ,  H04B2203/5408 ,  H04B2203/5433 ,  H04L69/02

Abstract: Systems and methods for enhanced carrier sense multiple access (CSMA) protocols are described. In various implementations, these systems and methods may be applicable to Power Line Communications (PLC). For example, a method may include attempting to access a communications channel to transmit a frame after a backoff time proportional to a randomly generated number within a contention window (CW), the CW having an initial value carried over from a previous transmission of a different frame. Additionally or alternatively, some of techniques described herein may facilitate the spreading of the time over which devices attempt to transmit packets, thereby reducing the probability of collisions using, for example, Additive Decrease Multiplicative Increase (ADMI) mechanisms.

Abstract translation: 描述了用于增强载波侦听多路访问（CSMA）协议的系统和方法。 在各种实现中，这些系统和方法可以适用于电力线通信（PLC）。 例如，一种方法可以包括在与争用窗口（CW）中的随机生成的数字成比例的退避时间之后尝试访问通信信道以发送帧，所述CW具有从先前的不同的传输中携带的初始值 帧。 附加地或替代地，本文描述的技术中的一些技术可以有助于扩展这些设备尝试发送分组的时间，由此例如使用添加减少乘数增加（ADMI）机制来减少冲突的概率。

公开(公告)号：US20150063285A1

公开(公告)日：2015-03-05

申请号：US14538425

申请日：2014-11-11

Applicant: Texas Instruments Incorporated

Inventor： Ramanuja Vedantham ,  Kumaran Vijayasankar ,  Anand G. Dabak ,  Badri N. Varadarajan

IPC: H04W72/04 ,  H04W72/12

CPC classification number: H04W72/0453 ,  H04B3/544 ,  H04L41/0833 ,  H04W72/1231 ,  Y04S40/162

Abstract: Systems and methods for designing, using, and/or implementing non-beacon network communications using frequency subbands are described. In various implementations, these systems and methods may be applicable to Power Line Communications (PLC). For example, a method may include transmitting a beacon request message over a given one of a plurality of frequency subbands, receiving a plurality of beacons in response to having transmitted the beacon request message, each of the plurality of beacons received over a respective one of the plurality of frequency subbands, and calculating a downlink quality report based, at least in part, upon the received beacons. The method may also include transmitting the downlink quality report over each of the plurality of frequency subbands and receiving a subband allocation command in response to having transmitted the downlink quality report, the subband allocation command indicating a downlink subband assignment and an uplink subband assignment.

Abstract translation: 描述了使用频率子带设计，使用和/或实现非信标网络通信的系统和方法。 在各种实现中，这些系统和方法可以适用于电力线通信（PLC）。 例如，一种方法可以包括在多个频率子带中的给定的一个频带上传送信标请求消息，响应于已经发送了信标请求消息来接收多个信标，多个信标中的每一个在 所述多个频率子带，并且至少部分地基于所接收的信标来计算下行链路质量报告。 该方法还可以包括：响应于已经发送下行链路质量报告，指示下行链路子带分配的子带分配命令和上行链路子带分配，在多个频率子带中的每一个上发送下行链路质量报告，并接收子带分配命令。

公开(公告)号：US20130290765A1

公开(公告)日：2013-10-31

申请号：US13862620

申请日：2013-04-15

Applicant: Texas Instruments Incorporated

Inventor： Deric W. Waters ,  Srinath Hosur ,  Anand G. Dabak

IPC: G06F1/26

CPC classification number: G06F1/266 ,  G06F1/263 ,  G06F1/32

Abstract: A method and apparatus are provided. The VBUS conductor is checked to determine whether the voltage on the VBUS conductor is greater than a vSafe0V voltage within a dead battery detect time interval, and the device policy manager is instructed to apply a vSafeDB voltage to the VBUS conductor if the voltage on the VBUS conductor is greater than the vSafe0V voltage. The policy engine waits for a bit stream to be detected within a bit stream detect timer interval. If the bit stream is not detected within the bit stream detect timer interval, then the device policy manager is instructed to apply the vSafe0V voltage to the VBUS conductor. The device policy manager is instructed to apply a vSafe5V voltage to the VBUS conductor if the bit stream is detected, and the policy engine waits for the bit stream to stop within a device ready timer interval. If the bit stream has stopped within the device ready timer interval, then the policy engine sends capabilities as a source port.

Abstract translation: 提供了一种方法和装置。 检查VBUS导体以确定VBUS导体中的电压是否大于电池电池检测时间间隔内的vSafe0V电压，并且指示设备策略管理器向VBUS导体施加vSafeDB电压，如果VBUS上的电压 导体大于vSafe0V电压。 策略引擎等待在位流检测定时器间隔内检测到位流。 如果在比特流检测定时器间隔内没有检测到位流，则指示设备策略管理器将vSafe0V电压施加到VBUS导体。 如果检测到比特流，则指示设备策略管理器将vSafe5V电压应用于VBUS导体，并且策略引擎在设备就绪定时器间隔内等待比特流停止。 如果位流在设备就绪定时器间隔内停止，则策略引擎将功能作为源端口发送。

公开(公告)号：US11546450B2

公开(公告)日：2023-01-03

申请号：US17355231

申请日：2021-06-23

Applicant: Texas Instruments Incorporated

Inventor： Anand G. Dabak ,  Badri N Varadarajan ,  Il Han Kim ,  Tarkesh Pande

IPC: H04L69/22 ,  H04B3/30 ,  H04B10/11 ,  H04B3/54 ,  H04B1/69

Abstract: Methods for building, transmitting, and receiving frame structures in power line communications (PLC) are described. Various techniques described herein provide a preamble design using one or more symbols. One or more preamble symbols may be interspersed within a header portion of a PLC frame to facilitate estimation of a frame boundary and/or sampling frequency offset, for example, in the presence of impulsive noise.

公开(公告)号：US10830619B2

公开(公告)日：2020-11-10

申请号：US14866779

申请日：2015-09-25

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Amardeep Sathyanarayana ,  Anand G. Dabak ,  David Patrick Magee

IPC: G01F1/66

Abstract: In an embodiment, a system for measuring material flow in a pipe is disclosed. A first transducer is operable to transmit a first signal having a first frequency at a first time and receive a second signal at a second time, and a second transducer spaced apart from the first transducer and is operable to receive the first signal and transmit the second signal having the first frequency. A signal processing circuit communicatively coupled to the first transducer and the second transducer, the signal processing circuit is operable to determine a first envelope of the first signal and a second envelope of the second signal and calculate a flow rate based on the first envelope of the first signal and the second envelope of the second signal.

公开(公告)号：US10812140B2

公开(公告)日：2020-10-20

申请号：US16355180

申请日：2019-03-15

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Tarkesh Pande ,  Anand G. Dabak ,  Il-Han Kim

IPC: H04B3/54

Abstract: Embodiments of the invention provide multiple cyclic prefix lengths for either both the data-payload and frame control header or only the data payload. Frame control header (FCH) and data symbols have an associated cyclic prefix. A table is transmitted in the FCH symbols, which includes a cyclic prefix field to identify the cyclic prefix length used in the data payload. A receiver may know the cyclic prefix length used in the FCH symbols in one embodiment. In other embodiments, the receiver does not know the FCH cyclic prefix length and, therefore, attempts to decode the FCH symbols using different possible cyclic prefix lengths until the FCH symbols are successfully decoded.

公开(公告)号：US10809235B2

公开(公告)日：2020-10-20

申请号：US15236666

申请日：2016-08-15

Applicant: Texas Instruments Incorporated

Inventor： Amardeep Sathyanarayana ,  David P. Magee ,  Anand G. Dabak ,  Srinath M. Ramaswamy

IPC: G01N29/34 ,  G01F1/66 ,  G01N29/30 ,  G01F25/00 ,  G01N29/50 ,  G01N29/44 ,  G01N29/12 ,  G01N29/11 ,  G01N29/36 ,  G01P5/24 ,  G01N29/024 ,  G01N29/32

Abstract: A transducer system. The system comprises a transducer and circuitry for applying an excitation waveform to excite the transducer during an excitation period. The circuitry for applying has: (i) circuitry for applying a first waveform at a first frequency; and (ii) circuitry for applying a second waveform at a second frequency differing from the first frequency.

公开(公告)号：US10116575B2

公开(公告)日：2018-10-30

申请号：US14540111

申请日：2014-11-13

Applicant: Texas Instruments Incorporated

Inventor： Kumaran Vijayasankar ,  Ramanuja Vedantham ,  Anand G. Dabak ,  Tarkesh Pande ,  Il Han Kim

IPC: H04L12/825 ,  H04L12/801 ,  H04B3/54 ,  H04L12/835 ,  H04L12/823

Abstract: A method of powerline communications in a powerline communications (PLC) network including a first PLC device and at least a second PLC device. The first PLC device transmits a data frame to the second node over a PLC channel. The second PLC device has a data buffer for storing received information. The second PLC device runs a flow control algorithm which determines a current congestion condition or a projected congestion condition of the data buffer based on at least one congestion parameter. The current congestion condition and projected congestion condition include nearly congested and fully congested. When the current or projected congestion condition is either nearly congested or fully congested, the second PLC device transmits a BUSY including frame over the PLC channel to at least the first PLC device. The first PLC device defers transmitting of any frames to the second PLC device for a congestion clearing wait time.