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公开(公告)号:US10968097B2
公开(公告)日:2021-04-06
申请号:US16542489
申请日:2019-08-16
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chun-Wen Cheng , Chia-Hua Chu , Wen Cheng Kuo
Abstract: Various embodiments of the present disclosure are directed towards a microphone including a support structure layer disposed between a particle filter and a microelectromechanical systems (MEMS) structure. A carrier substrate is disposed below the particle filter and has opposing sidewalls that define a carrier substrate opening. The MEMS structure overlies the carrier substrate and includes a diaphragm having opposing sidewalls that define a diaphragm opening overlying the carrier substrate opening. The particle filter is disposed between the carrier substrate and the MEMS structure. A plurality of filter openings extend through the particle filter. The support structure layer includes a support structure having one or more segments spaced laterally between the opposing sidewalls of the carrier substrate. The one or more segments of the support structure are spaced laterally between the plurality of filter openings.
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公开(公告)号:US20210047175A1
公开(公告)日:2021-02-18
申请号:US16542479
申请日:2019-08-16
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chia-Hua Chu , Chun-Wen Cheng , Wen Cheng Kuo
Abstract: Various embodiments of the present disclosure are directed towards a microphone including a particle filter disposed between a microelectromechanical systems (MEMS) substrate and a carrier substrate. A MEMS device structure overlies the MEMS substrate. The MEMS device structure includes a diaphragm having opposing sidewalls that define a diaphragm opening. The carrier substrate underlies the MEMS substrate. The carrier substrate has opposing sidewalls that define a carrier substrate opening underlying the diaphragm opening. A filter stack is sandwiched between the carrier substrate and the MEMS substrate. The filter stack includes an upper dielectric layer, a lower dielectric layer, and a particle filter layer disposed between the upper and lower dielectric layers. The particle filter layer includes the particle filter spaced laterally between the opposing sidewalls of the carrier substrate.
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63.
公开(公告)号:US20210024348A1
公开(公告)日:2021-01-28
申请号:US16521907
申请日:2019-07-25
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Kuei-Sung Chang , Chun-Wen Cheng , Fei-Lung Lai , Shing-Chyang Pan , Yuan-Chih Hsieh , Yi-Ren Wang
Abstract: Various embodiments of the present disclosure are directed towards a microelectromechanical system (MEMS) device. The MEMS device includes a dielectric structure disposed over a first semiconductor substrate, where the dielectric structure at least partially defines a cavity. A second semiconductor substrate is disposed over the dielectric structure. The second semiconductor substrate includes a movable mass, where opposite sidewalls of the movable mass are disposed between opposite sidewall of the cavity. An anti-stiction structure is disposed between the movable mass and the dielectric structure, where the anti-stiction structure is a first silicon-based semiconductor.
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公开(公告)号:US20200339412A1
公开(公告)日:2020-10-29
申请号:US16923869
申请日:2020-07-08
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chun-Wen Cheng , Jung-Huei Peng , Shang-Ying Tsai , Hung-Chia Tsai , Yi-Chuan Teng
Abstract: An embodiment is a MEMS device including a first MEMS die having a first cavity at a first pressure, a second MEMS die having a second cavity at a second pressure, the second pressure being different from the first pressure, and a molding material surrounding the first MEMS die and the second MEMS die, the molding material having a first surface over the first and the second MEMS dies. The device further includes a first set of electrical connectors in the molding material, each of the first set of electrical connectors coupling at least one of the first and the second MEMS dies to the first surface of the molding material, and a second set of electrical connectors over the first surface of the molding material, each of the second set of electrical connectors being coupled to at least one of the first set of electrical connectors.
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公开(公告)号:US10752497B2
公开(公告)日:2020-08-25
申请号:US16211681
申请日:2018-12-06
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yu-Chia Liu , Chia-Hua Chu , Chun-Wen Cheng , Jung-Huei Peng
Abstract: The present disclosure, in some embodiments, relates to an integrated chip structure. The integrated chip structure has a plurality of interconnect layers disposed within a dielectric structure over a substrate. A passivation layer is over the dielectric structure. A sensing electrode and a bonding electrode have bottom surfaces directly contacting the passivation layer. A microelectromechanical systems (MEMS) substrate is vertically separated from the sensing electrode. The bonding electrode is electrically connected to the MEMs substrate and to one or more of the plurality of interconnect layers. An electrode extension via is configured to electrically connect the sensing electrode to one or more of the plurality of interconnect layers.
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公开(公告)号:US20200024135A1
公开(公告)日:2020-01-23
申请号:US16587274
申请日:2019-09-30
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chun-Wen Cheng , Chia-Hua Chu
IPC: B81C1/00 , H01L23/532 , H01L21/82
Abstract: An integrated circuit (IC) with an integrated microelectromechanical systems (MEMS) structure is provided. In some embodiments, the IC comprises a semiconductor substrate, a back-end-of-line (BEOL) interconnect structure, the integrated MEMS structure, and a cavity. The BEOL interconnect structure is over the semiconductor substrate, and comprises wiring layers stacked in a dielectric region. Further, an upper surface of the BEOL interconnect structure is planar or substantially planar. The integrated MEMS structure overlies and directly contacts the upper surface of the BEOL interconnect structure, and comprises an electrode layer. The cavity is under the upper surface of the BEOL interconnect structure, between the MEMS structure and the BEOL interconnect structure.
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公开(公告)号:US10472233B2
公开(公告)日:2019-11-12
申请号:US16167912
申请日:2018-10-23
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chun-Wen Cheng , Chia-Hua Chu
IPC: H01L23/532 , B81C1/00 , H01L21/82
Abstract: An integrated circuit (IC) with an integrated microelectromechanical systems (MEMS) structure is provided. In some embodiments, the IC comprises a semiconductor substrate, a back-end-of-line (BEOL) interconnect structure, the integrated MEMS structure, and a cavity. The BEOL interconnect structure is over the semiconductor substrate, and comprises wiring layers stacked in a dielectric region. Further, an upper surface of the BEOL interconnect structure is planar or substantially planar. The integrated MEMS structure overlies and directly contacts the upper surface of the BEOL interconnect structure, and comprises an electrode layer. The cavity is under the upper surface of the BEOL interconnect structure, between the MEMS structure and the BEOL interconnect structure.
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公开(公告)号:US10160640B2
公开(公告)日:2018-12-25
申请号:US15299161
申请日:2016-10-20
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chun-Wen Cheng , Chia-Hua Chu
Abstract: A method for forming a micro-electro mechanical system (MEMS) device is provided. The method includes bonding a semiconductor substrate with a carrier substrate through a dielectric layer and patterning the semiconductor substrate into multiple elements. The method also includes partially removing the dielectric layer to release some of the elements such that the released elements become one (or more) first movable element and one (or more) second movable element. The method further includes bonding a cap substrate with the semiconductor substrate to form a first closed chamber containing the first movable element and a second closed chamber containing the second movable element. In addition, the method includes opening the second closed chamber and sealing the second closed chamber after vacuumizing the second closed chamber such that the second closed chamber has a reduced pressure smaller than that of the first closed chamber.
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公开(公告)号:US10101292B2
公开(公告)日:2018-10-16
申请号:US15053906
申请日:2016-02-25
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Tung-Tsun Chen , Chia-Hua Chu , Jui-Cheng Huang , Chun-Wen Cheng , Cheng-Hsiang Hsieh
Abstract: A micro-electro mechanical system (MEMS) humidity sensor includes a first substrate, a second substrate and a sensing structure. The second substrate is substantially parallel to the first substrate. The sensing structure is between the first substrate and the second substrate, and bonded to a portion of the first substrate and a portion of the second substrate, in which the second substrate includes a conductive layer facing the sensing structure, and a first space between the first substrate and the sensing structure is communicated with or isolated from outside, and a second space between the conductive layer and the sensing structure is communicated with an atmosphere, and the sensing structure, the second space and the conductive layer constitute a capacitor configured to measure permittivity of the atmosphere, and humidity of the atmosphere is derived from the permittivity of the atmosphere, pressure of the atmosphere and temperature.
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公开(公告)号:US09933388B2
公开(公告)日:2018-04-03
申请号:US15277108
申请日:2016-09-27
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chun-Wen Cheng , Fei-Lung Lai , Chia-Hua Chu , Yi-Hsien Chang , Hsin-Chieh Huang
IPC: G01N27/414 , H01L21/48 , H01L23/522 , H01L23/528
CPC classification number: G01N27/4148 , G01N27/4145 , H01L21/486 , H01L23/5226 , H01L23/5283 , H01L2924/0002 , H01L2924/00
Abstract: The present disclosure relates to an integrated chip having an integrated bio-sensor with horizontal and vertical sensing surfaces. In some embodiments, the integrated chip has a sensing device disposed within a substrate, and a lower metal wire over the substrate and electrically coupled to the sensing device. First and second metal vias are arranged on the lower metal wire at locations set back from sidewalls of the lower metal wire, and first and second upper metal wires respectively cover top surfaces of the first and second metal vias. A dielectric structure surrounds the lower metal wire, the first and second metal vias, and the first and second upper metal wires. A sensing well has sensing surfaces that extend along an upper surface of the lower metal wire and along sidewalls of the first and second metal vias and the first and second upper metal wires.
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