LOW RIPPLE PULSE-SKIP MODE CONTROL IN SWITCHING MODE POWER SUPPLIES

    公开(公告)号:US20230038245A1

    公开(公告)日:2023-02-09

    申请号:US17393103

    申请日:2021-08-03

    发明人: Hua Chen

    摘要: A switching converter circuit comprises a converting circuit stage, an error amplifier, and a control circuit. The converting circuit stage includes a magnetic circuit element and a switching circuit configured to convert an input voltage to a regulated output voltage by charging and discharging the magnetic circuit element using activation pulses generated using a system clock signal. The error amplifier generates a control voltage using the output voltage. The control circuit varies time between successive activation pulses according to the control voltage, and the successive activation pulses are synchronized to the system clock signal.

    Current-controlled, single-inductor, multiple-output, DC-DC converter with continuous conduction and discontinuous conduction modes

    公开(公告)号:US11575320B2

    公开(公告)日:2023-02-07

    申请号:US17348639

    申请日:2021-06-15

    摘要: A controller for a SIMO DC-DC converter operable in CCM and DCM receives a signal representative of an inductor current, and signals representative of a first and a second DC-DC converter output. The controller has a first and second output adapted to control electronic switches coupled to a first and second output filter, and a third and fourth output adapted to control current in an inductor. The controller controls the outputs based upon the inputs by determining a desired PWL inductor current and current waveform, and determines pulsewidths of the outputs, to match the inductor current to the desired PWL. A timer controls pulsewidths of the outputs and the controller dynamically selects DCM or CCM to maintain the first and second DC-DC converter outputs at predetermined levels. In embodiments, the desired PWL inductor current is one or both of a desired valley current and a desired peak current.

    Powered system with passive filter for an energy storage device

    公开(公告)号:US11575310B2

    公开(公告)日:2023-02-07

    申请号:US17351882

    申请日:2021-06-18

    IPC分类号: H02M1/14 H02M1/12 H02M7/523

    摘要: A system may be provided that includes an energy storage device, and an inverter electrically coupled to the energy storage device. The system also includes a passive filter electrically coupled between the energy storage device and the inverter. The passive filter includes a first coupled-inductor and at least one first bypass capacitor. The first coupled-inductor includes at least two magnetically coupled windings. The passive filter is configured to reduce or eliminate alternating current at the energy storage device.

    WIRELESS POWER RECEIVER HAVING TRANSFER OPTIMIZATION AND METHOD THEREOF

    公开(公告)号:US20230037075A1

    公开(公告)日:2023-02-02

    申请号:US17959716

    申请日:2022-10-04

    摘要: According to one aspect of the present disclosed subject matter, a receiver inductively powered by a transmitter for powering a load, the receiver comprising: a resonance circuit capable of tuning its resonance frequency for coupling with the transmitter and generate AC voltage; a power supply section configured to rectify the AC voltage and adjust a DC current and a DC voltage to the load; and a control and communication section designed to set parameters for the receiver and communicate operation points (OP) to the transmitter, wherein the parameters and the OP derived from determining a minimal power loss of the receiver.

    Seamless DCM-PFM transition for single pulse operation in DC-DC converters

    公开(公告)号:US11563378B2

    公开(公告)日:2023-01-24

    申请号:US17000854

    申请日:2020-08-24

    摘要: A converter operable to convert an input voltage at an input node to an output voltage at an output node coupled to a load by switching on and off a transistor at a switching frequency, the converter comprising: an error amplifier circuit having a first input coupled to a reference voltage, a second input coupled to the output node through a resistive divider, a first output operable to output a control current and a second output operable to output a current equivalent to the control current; a peak current comparator circuit having a first input coupled to the second output of the error amplifier circuit, a second input and an output, the second input is coupled to the input node through an inductor; an off-time timer circuit having an input coupled to the first output of the error amplifier circuit and an output, the off-time timer circuit operable to set the switching frequency based on the control current; and a control circuit having a first input coupled to the output of the peak current comparator circuit, a second input coupled to the output of the off-time timer circuit and an output coupled to a control terminal of the transistor.

    POWER CONVERSION SYSTEM
    66.
    发明申请

    公开(公告)号:US20230014369A1

    公开(公告)日:2023-01-19

    申请号:US17951522

    申请日:2022-09-23

    申请人: DENSO CORPORATION

    摘要: In a power conversion system, a power converter includes a power conversion circuit connected to a direct current (DC) source via a DC distribution line and converts and supplies received DC power to a load, and a power conversion control unit. A power stabilizing device is disposed between the DC distribution line and the power converter and stabilizes a DC voltage applied from the DC power source. A control power source of the power stabilizing device performs current control of the current transformer to suppress DC magnetization caused by a DC current component of the primary current while compensating for a varying component of the DC voltage. The control power source acquires current information or voltage information calculated from control information used by the power conversion control unit for control operations related to energization of the load and uses it as control information for the power stabilizing device.

    High-efficiency low-ripple burst mode for a charge pump

    公开(公告)号:US11557964B2

    公开(公告)日:2023-01-17

    申请号:US17334642

    申请日:2021-05-28

    摘要: An apparatus is disclosed for operating a charge pump in a high-efficiency low-ripple burst mode. In an example aspect, the apparatus includes a charge pump with a flying capacitor, a switching circuit, and a burst-mode controller. The switching circuit is coupled to the flying capacitor and configured to selectively: be in a burst configuration to charge and discharge the flying capacitor based on a clock signal; or be in a pulse-skipping configuration. The burst-mode controller is coupled to the switching circuit and configured to trigger the switching circuit to transition from the pulse-skipping configuration to the burst configuration at a time that occurs between rising edges of the clock signal. The burst-mode controller is also configured to cause charging of the flying capacitor to occur for approximately half a period of the clock signal responsive to triggering the switching circuit to transition from the pulse-skipping configuration to the burst configuration.

    RAMP GENERATOR FOR A CONSTANT ON-TIME DC-DC CONVERTER

    公开(公告)号:US20230012123A1

    公开(公告)日:2023-01-12

    申请号:US17305541

    申请日:2021-07-09

    IPC分类号: H02M1/14 H02M1/08 H02M3/158

    摘要: A ramp generator for a constant on-time DC-DC converter, wherein the ramp generator is configured to reduce DC offset and smooth transitions between conduction modes. The ramp voltage generator includes a common voltage generator suitable for generating a common voltage; a first ramp voltage generation block suitable for generating a first ramp voltage responsive to a first switching signal and a control signal, wherein the first switching signal resets one or more valley points of the first ramp voltage to one or more valley points of the common voltage; and a second ramp voltage generation block suitable for generating a second ramp voltage responsive to a second switching signal, the first ramp voltage, and the control signal.

    IMPROVING PSRR ACROSS LOAD AND SUPPLY VARIANCES

    公开(公告)号:US20230006536A1

    公开(公告)日:2023-01-05

    申请号:US17732755

    申请日:2022-04-29

    IPC分类号: H02M1/00 H02M3/156 H02M1/14

    摘要: Described embodiments include a circuit for reducing output voltage noise in a voltage regulator includes an amplifier having first and second amplifier inputs, a compensation terminal and an amplifier output. The first amplifier input is coupled to a reference voltage terminal, and the compensation terminal coupled to an output terminal. A buffer amplifier has a buffer input and a buffer output, and the buffer input is coupled to the amplifier output. A first transistor is coupled between a supply voltage terminal and the output terminal, and has a first control terminal that is coupled to the buffer output. A boost current injection circuit has a boost input and a boost output, and the boost input is coupled to the supply voltage terminal. A second transistor is coupled between the boost output and the compensation terminal, and has a second control terminal.