Low power CMOS crystal oscillator circuit
    61.
    发明授权
    Low power CMOS crystal oscillator circuit 失效
    低功耗CMOS晶振电路

    公开(公告)号:US5909152A

    公开(公告)日:1999-06-01

    申请号:US31636

    申请日:1998-02-27

    申请人: Jia Li Ching-Yuh Tsay

    发明人: Jia Li Ching-Yuh Tsay

    摘要: A crystal-stabilized integrated-circuit oscillator which uses a filtered analog coupling to automatically disable the bias current to an auxiliary gain after startup. Positive feedback is used to ensure that the switchover is completed once it starts. Thus the device sizes and biases of the primary gain stage can be selected for very low-power operation, while assuring that the oscillator will always start-up whenever poser is valid.

    摘要翻译: 一种晶体稳定的集成电路振荡器,其使用滤波后的模拟耦合来自动将偏置电流禁止到启动后的辅助增益。 正反馈用于确保切换开始后完成。 因此,可以选择主增益级的器件尺寸和偏置进行极低功耗操作,同时确保振荡器在任何位置有效时始终启动。

    Oscillation circuit with power limiting controller
    62.
    发明授权
    Oscillation circuit with power limiting controller 失效
    带功率限制控制器的振荡电路

    公开(公告)号:US5557243A

    公开(公告)日:1996-09-17

    申请号:US425068

    申请日:1995-04-19

    申请人: Joon-Cherl Ho

    发明人: Joon-Cherl Ho

    摘要: An oscillation circuit employs a piezo-electric crystal connected in parallel with an amplifier having a gain equal to or less than that needed to maintain a steady-state operation of the amplifier when operated at the maximum output. One or more controllable amplifiers are connected in parallel with the amplifier and controlled according to the level of the oscillation signal, to rapidly amplify an initial oscillation to steady-state operation level and to keep it there without exceeding the output level of the crystal while minimizing the energy supplied to the entire oscillation circuit.

    摘要翻译: 振荡电路使用与放大器并联连接的压电晶体,放大器的功率等于或小于在最大输出时工作时保持放大器的稳态运行所需的增益。 一个或多个可控放大器与放大器并联连接并根据振荡信号的电平进行控制,以将初始振荡快速放大至稳态工作电平,并将其保持在不超过晶体的输出电平的同时最小化 提供给整个振荡电路的能量。

    Semiconductor integrated circuit with plural use of a terminal
    63.
    发明授权
    Semiconductor integrated circuit with plural use of a terminal 失效
    具有多个使用终端的半导体集成电路

    公开(公告)号:US5467028A

    公开(公告)日:1995-11-14

    申请号:US337423

    申请日:1994-11-08

    CPC分类号: H03K3/014 H03K3/03 H03K3/0307

    摘要: A semiconductor integrated circuit includes an oscillator circuit, which amplifies a signal sent from an oscillator by an amplifier circuit operating with a low power supply voltage for outputting the same. In the oscillator circuit, a threshold voltage of a transfer gate forming a switching element is set to a value lower than a threshold voltage of other transistors so as to reduce an on-resistance of the transfer gate and hence to ensure output of a signal supplied from said oscillator.

    摘要翻译: 半导体集成电路包括振荡器电路,该振荡器电路通过以低电源电压工作的放大器电路来放大从振荡器发送的信号,用于输出。 在振荡电路中,形成开关元件的传输栅极的阈值电压被设定为低于其他晶体管的阈值电压的值,以便减小传输栅极的导通电阻,从而确保所提供的信号的输出 来自所述振荡器。

    Low power oscillator circuit
    65.
    发明授权
    Low power oscillator circuit 失效
    低功耗振荡电路

    公开(公告)号:US4560954A

    公开(公告)日:1985-12-24

    申请号:US334487

    申请日:1981-12-24

    申请人: Jerald G. Leach

    发明人: Jerald G. Leach

    摘要: A low power oscillator circuit including a latch connected to two loops. Each loop includes dynamic inverters and static inverters connected in cascade. The loops are connected to the latch such that the output of the final stage is an input to the latch. An initialization circuit is included on one loop to initiate oscillation. Storage capacitors are included in the loops to provide an oscillator output voltage that is greater than the oscillator power supply voltage.

    摘要翻译: 低功率振荡器电路,包括连接到两个回路的锁存器。 每个回路包括串联连接的动态逆变器和静态逆变器。 环路连接到锁存器,使得最后级的输出是锁存器的输入。 初始化电路包含在一个环路上以启动振荡。 存储电容器包含在回路中,以提供大于振荡器电源电压的振荡器输出电压。

    Self-oscillating power supply
    66.
    发明授权
    Self-oscillating power supply 失效
    自振电源

    公开(公告)号:US4471327A

    公开(公告)日:1984-09-11

    申请号:US379850

    申请日:1982-05-20

    申请人: Timothy B. Moss

    发明人: Timothy B. Moss

    IPC分类号: H03K3/014 H03K3/28 H03K4/62

    CPC分类号: H03K4/62 H03K3/014 H03K3/28

    摘要: A self-oscillating circuit particularly adapted for driving the deflection yoke of a cathode ray tube (CRT) or a high voltage pulse transformer is disclosed. The circuit includes an NPN transistor, to the collector of which is coupled a direct voltage source and a first inductance and to the base of which is coupled a second, grounded inductance. Following transistor turn-on, the collector current ramps up in storing energy in the first inductance. With the transistor base drive removed, a voltage spike appears on the transistor's collector to which is coupled a grounded capacitor. The LC network comprised of the first inductance and the grounded capacitance attempts to resonate, with the collector voltage clamped by the transistor collector-base junction. The energy stored in the first inductance flows via the grounded voltage source and the collector-base junction of the forward biased transistor into the second inductance until the energy stored in the first inductance has been reduced to the point where the transistor's collector-base junction is no longer forward biased. Continued current flow through the second inductance to the transistor's base turns the transistor on, causing current to be reversed in the first inductance in repeating the cycle as energy is again stored therein. Transistor base drive stops when the energy in the second inductance is depleted. The values of a resistance in series with the second inductance and the aforementioned capacitance determine the circuit's oscillatory period.

    摘要翻译: 公开了一种特别适用于驱动阴极射线管(CRT)或高压脉冲变压器的偏转线圈的自振荡电路。 电路包括NPN晶体管,其集电极耦合有直流电压源和第一电感,并且其基极与第二接地电感耦合。 在晶体管导通之后,集电极电流在存储第一电感中的能量时上升。 在去除了晶体管基极驱动器的情况下,晶体管集电极上出现电压尖峰,并将接地的电容器耦合到其上。 由第一电感和接地电容构成的LC网络试图谐振,由集电极电压钳位在晶体管集电极 - 基极结上。 存储在第一电感中的能量经由接地电压源和正向偏置晶体管的集电极 - 基极结到第二电感中,直到存储在第一电感中的能量已经减小到晶体管的集电极 - 基极结 不再向前偏见。 导通晶体管基极的持续电流通过第二电感使晶体管导通,当再次存储能量时,重复该周期,使第一电感中的电流反转。 当第二电感中的能量耗尽时,晶体管基极驱动停止。 与第二电感串联的电阻值和上述电容确定电路的振荡周期。

    Systems and techniques for timing mismatch reduction

    公开(公告)号:US12021531B2

    公开(公告)日:2024-06-25

    申请号:US17895826

    申请日:2022-08-25

    摘要: Systems and techniques to offset conditions affecting propagation delay of a clock signal in a memory device. These include a device that includes a clock adjustment circuit, comprising a differential amplifier, an inverter coupled to a first output of the differential amplifier, and a swing oscillator driver coupled to a second output of the inverter and an input of the differential amplifier. The swing oscillator driver includes a series of transistors, a signal path coupled to at least a first transistor of the series of transistors, wherein the signal path when in operation transmits a signal having a first voltage, and a strength control circuit coupled to the signal path, wherein the strength control circuit when in operation adjusts the first voltage of the signal to a second voltage.

    Low power electronic oscillators
    68.
    发明授权

    公开(公告)号:US11923805B2

    公开(公告)日:2024-03-05

    申请号:US17784563

    申请日:2020-12-11

    摘要: An oscillator arrangement is provided, comprising a relaxation oscillator having an active state and an inactive state; a bias current circuit portion arranged to provide a bias current to the relaxation oscillator during said active state; and an electronic switch arranged to isolate said relaxation oscillator from the bias current circuit portion when in said inactive state. The oscillator arrangement is arranged to store an internal voltage value associated with said bias current and the bias current circuit portion is arranged to use the stored internal voltage value to generate the bias current when the oscillator is started up from the inactive state to the active state.

    SYSTEMS AND TECHNIQUES FOR TIMING MISMATCH REDUCTION

    公开(公告)号:US20240072774A1

    公开(公告)日:2024-02-29

    申请号:US17895826

    申请日:2022-08-25

    摘要: Systems and techniques to offset conditions affecting propagation delay of a clock signal in a memory device. These include a device that includes a clock adjustment circuit, comprising a differential amplifier, an inverter coupled to a first output of the differential amplifier, and a swing oscillator driver coupled to a second output of the inverter and an input of the differential amplifier. The swing oscillator driver includes a series of transistors, a signal path coupled to at least a first transistor of the series of transistors, wherein the signal path when in operation transmits a signal having a first voltage, and a strength control circuit coupled to the signal path, wherein the strength control circuit when in operation adjusts the first voltage of the signal to a second voltage.

    RELAXATION OSCILLATING CIRCUIT
    70.
    发明公开

    公开(公告)号:US20230283264A1

    公开(公告)日:2023-09-07

    申请号:US17909440

    申请日:2022-03-03

    摘要: Provided is a relaxation oscillating circuit, which comprises a charging circuit, a discharging circuit, a switch circuit, a charging-discharging capacitor and an output circuit. The charging circuit comprises a first current source and a first isolating transistor. The discharging circuit comprises a second current source and a second isolating transistor. The switch circuit comprises a main charging transistor and an auxiliary charging transistor arranged as mirror and a main discharging transistor and an auxiliary discharging transistor arranged as mirror. The main charging transistor and the main discharging transistor are alternately conducted. According to a voltage of the charging-discharging capacitor, the output circuit outputs a clock signal and a control signal. The clock signal is connected to control ends of the auxiliary charging transistor and the auxiliary discharging transistor, and the control signal is connected to control ends of the main charging transistor and the main discharging transistor.