Computer system including a write protection circuit for preventing
illegal write operations and a write poster with improved memory
    71.
    发明授权
    Computer system including a write protection circuit for preventing illegal write operations and a write poster with improved memory 失效
    计算机系统包括用于防止非法写入操作的写入保护电路和具有改进的存储器的写入海报

    公开(公告)号:US5325499A

    公开(公告)日:1994-06-28

    申请号:US590671

    申请日:1990-09-28

    Abstract: A computer system including a write protection circuit and a write poster is disclosed. The write protection circuit provides page description information to the computer system for controlling various operations. Illegal write operations as defined by the page description information are prevented from reaching a system bus and external cache. Internal cache invalidate operations may also be performed transparently to system operation. The write poster accepts write operations in zero wait states and assembles them into fewer more efficient writes to memory. A unique method and apparatus for programming a descriptor random access memory (RAM) is also provided.

    Abstract translation: 公开了一种包括写保护电路和写海报的计算机系统。 写保护电路向计算机系统提供页面描述信息以控制各种操作。 防止由页面描述信息定义的非法写入操作到达系统总线和外部高速缓存。 内部缓存无效操作也可能对系统操作透明地执行。 写海报接受零等待状态的写操作,并将它们组合成更少的更有效的写入到内存。 还提供了用于编程描述符随机存取存储器(RAM)的独特方法和装置。

    Memory access system for a computer system adapted to accept a memory
expansion module
    72.
    发明授权
    Memory access system for a computer system adapted to accept a memory expansion module 失效
    适用于接受存储器扩展模块的计算机系统的存储器访问系统

    公开(公告)号:US4609996A

    公开(公告)日:1986-09-02

    申请号:US522893

    申请日:1983-08-12

    Inventor: David A. Kummer

    CPC classification number: G06F12/0623

    Abstract: A microcomputer includes a main memory system which is accessed, substantially independantly, by the CPU and a subsystem, for example a video display subsystem. The memory system comprises a base memory and an optical add on expansion memory. When only the base memory is installed, consecutive locations have consecutively numbered addresses, and both the CPU and subsystem access individual locations. When both memories are installed, one has even numbered addresses and the other odd numbered addresses. With both memories installed, the CPU still accesses individual locations, but the subsystem addresses even addresses to obtain, for each access, data from the even address and the next higher odd address, thereby accessing a location in both memories. Thus the memory bandwidth for the subsystem is effectively doubled when the expansion memory is installed.

    Abstract translation: 微型计算机包括主存储系统,其主要由CPU和子系统(例如视频显示子系统)访问。 存储器系统包括基本存储器和光学附加扩展存储器。 当仅安装基本存储器时,连续的位置具有连续编号的地址,并且CPU和子系统访问各个位置。 当两个存储器都安装时,一个地址和其他奇数地址都是偶数地址。 在安装了两个存储器的情况下,CPU仍然访问各个位置,但是子系统寻址偶数地址,以便从每个访问获得来自偶数地址和下一个较高奇数地址的数据,从而访问两个存储器中的位置。 因此,当安装扩展内存时,子系统的内存带宽有效地加倍。

    Refresh circuit for dynamic memory of a data processor employing a
direct memory access controller
    73.
    发明授权
    Refresh circuit for dynamic memory of a data processor employing a direct memory access controller 失效
    采用直接存储器存取控制器的数据处理器的动态存储器刷新电路

    公开(公告)号:US4556952A

    公开(公告)日:1985-12-03

    申请号:US292075

    申请日:1981-08-12

    CPC classification number: G11C11/406

    Abstract: In a data processing system including a dynamic RAM (14) and a programmable, prioritized direct memory access (DMA) controller (16) having a plurality of channels, the highest priority channel (0) is dedicated to a memory refresh operation. The system clock (P CLK) from the CPU (12) is applied to a divider counter (22) which produces a refresh clock (R CLK) having a period sufficient to generate the minimum number of refresh cycles within the minimum period required to refresh the RAM (14). The refresh clock (R CLK) is used to set a "D-type" latch (24) whose output, in turn, sets the highest priority DMA channel (0) request line (DREQ0), thereby initiating a memory refresh cycle. The latch (24) is cleared by the DMA acknowledge signal (DACK0) indicating the cycle is completed.

    Abstract translation: 在包括具有多个信道的动态RAM(14)和可编程优先级直接存储器访问(DMA)控制器(16)的数据处理系统中,最高优先级信道(0)专用于存储器刷新操作。 来自CPU(12)的系统时钟(P CLK)被施加到分频器计数器(22),该分频器计数器产生具有足以在刷新所需的最小周期内产生最小数量的刷新周期的周期的刷新时钟(R CLK) RAM(14)。 刷新时钟(R CLK)用于设置“D型”锁存器(24),其输出依次设置最高优先级的DMA通道(0)请求线(DREQ0),从而启动存储器刷新周期。 锁存器(24)由DMA确认信号(DACK0)清零,表示循环完成。

    Color video display system having programmable border color
    74.
    发明授权
    Color video display system having programmable border color 失效
    具有可编程边框颜色的彩色视频显示系统

    公开(公告)号:US4437092A

    公开(公告)日:1984-03-13

    申请号:US292069

    申请日:1981-08-12

    CPC classification number: G09G5/024

    Abstract: A central processing unit (10) loads a border register (36) with four color bits representing digital color signals to be used in determining the color of only the border area (40) surrounding the video area (42) of a cathode ray tube display screen (44). A BORDER CONTROL TIME signal is generated at the appropriate times in the horizontal and vertical scanning periods of the cathode ray tube to apply the digital color border signals (R, G, G, I) to a composite video signal generator (38) which generates the composite video signal for a TV set (14) or a TV monitor.

    Abstract translation: 中央处理单元(10)装载具有表示数字彩色信号的四个彩色位的边界寄存器(36),以用于仅确定围绕阴极射线管显示器的视频区域(42)的边界区域(40)的颜色 屏幕(44)。 在阴极射线管的水平和垂直扫描周期中的适当时刻产生边界控制时间信号,以将数字彩色边界信号(R,G,G,I)施加到复合视频信号发生器(38) 用于电视机(14)或电视监视器的复合视频信号。

    Video stream index generation at a video content transmitter
    76.
    发明授权
    Video stream index generation at a video content transmitter 有权
    在视频内容发送器上生成视频流索引

    公开(公告)号:US08855468B2

    公开(公告)日:2014-10-07

    申请号:US13487101

    申请日:2012-06-01

    Abstract: A method of generating and using indexing information for video content is presented. In the method, an index stream for a video stream is generated at a video content transmitter. The video stream includes video frames, and the index stream includes an index for each of at least some of the video frames within the video stream. The video stream and the index stream are transmitted from the video content transmitter to a video content receiver, which receives and stores the video and index streams. Further, at the video content receiver, the index stream is processed to locate the video frames within the video stream that are associated with at least some of the indexes of the index stream, and at least some of the located video frames of the video stream are presented to an output device under control of a user of the video content receiver.

    Abstract translation: 提出了一种生成和使用视频内容的索引信息的方法。 在该方法中,在视频内容发送器处生成用于视频流的索引流。 视频流包括视频帧,并且索引流包括视频流内的至少一些视频帧中的每一个的索引。 视频流和索引流从视频内容发送器发送到视频内容接收器,视频内容接收器接收和存储视频和索引流。 此外,在视频内容接收器处理索引流以定位与视频流中的至少一些索引相关联的视频流内的视频帧,并且视频流的至少一些定位的视频帧 在视频内容接收器的用户的控制下呈现给输出设备。

    System and method for secure broadcast communication
    77.
    发明授权
    System and method for secure broadcast communication 有权
    用于安全广播通信的系统和方法

    公开(公告)号:US08761394B2

    公开(公告)日:2014-06-24

    申请号:US11693076

    申请日:2007-03-29

    CPC classification number: H04L9/08 H04L9/32 H04L2209/601

    Abstract: A method for providing a communication device access to a secure broadcast communication is presented. In the method, an encrypted message originating outside the communication device is received into an electronic component of the communication device. The encrypted message is then decrypted within the electronic component, resulting in a decrypted message. The decrypted message is then verified. In response to verifying the decrypted message, a disabled circuit of the electronic component is enabled to allow the communication device to access the secure broadcast communication.

    Abstract translation: 提出了一种用于提供通信设备访问安全广播通信的方法。 在该方法中,从通信设备外部发送的加密消息被接收到通信设备的电子部件中。 然后,加密的消息在电子组件内被解密,产生解密的消息。 然后验证解密的消息。 响应于验证解密的消息,电子组件的禁用电路能够允许通信设备访问安全广播通信。

    System and method for memory jumping within stored instances of content
    78.
    发明授权
    System and method for memory jumping within stored instances of content 有权
    存储器内存跳转的系统和方法

    公开(公告)号:US08606088B2

    公开(公告)日:2013-12-10

    申请号:US13291014

    申请日:2011-11-07

    Abstract: Content receivers may simultaneously record multiple instances of content for multiple programming channels based on content provider instructions. Systems and methods utilize the content receivers to perform memory jumping operations within files having the simultaneously recorded multiple instance of content stored therein. The memory jumping operation may jump locations within the file corresponding to a predetermined memory jumping operation timeframe, and in order to account for the variability in the recording bit rate and therefore the playing of the instance of content, the jump locations in the memory jumping operation may be dynamically adjusted based on recording bit rates.

    Abstract translation: 内容接收器可以基于内容提供商指令同时记录用于多个节目频道的多个内容实例。 系统和方法利用内容接收器在具有存储在其中的内容的同时记录的多个内容的文件内执行存储器跳转操作。 存储器跳转操作可以跳转与预定的存储器跳跃操作时间帧相对应的文件内的位置,并且为了考虑记录比特率的变化并因此考虑内容实例的播放,存储器跳转操作中的跳转位置 可以基于记录比特率动态地调整。

    SYSTEM AND METHOD FOR DYNAMICALLY ADJUSTING RECORDING PARAMETERS
    79.
    发明申请
    SYSTEM AND METHOD FOR DYNAMICALLY ADJUSTING RECORDING PARAMETERS 有权
    用于动态调整记录参数的系统和方法

    公开(公告)号:US20130216208A1

    公开(公告)日:2013-08-22

    申请号:US13592976

    申请日:2012-08-23

    Abstract: Content receivers may be configured to simultaneously record multiple instances of content for multiple programming channels based on content provider instructions. Systems and methods utilize the content receivers to dynamically adjust recording parameters to account for instances of content with a start time and/or end time that falls outside of predefined recording parameters. The dynamically adjusted recording parameters may adjust the number of channels recorded and/or instances of content recorded. The content receiver may compare programming information received at a processing unit with predefined recording parameters and may dynamically adjust the recording parameters based on the comparison. The content receiver may generate on screen display content to include information on the dynamically adjusted recording parameters and may transmit the on screen display content to a content display device for notifying the user of the dynamically adjusted recoding parameters.

    Abstract translation: 内容接收器可以被配置为基于内容提供商指令同时记录用于多个节目频道的多个内容实例。 系统和方法利用内容接收器来动态地调整记录参数以考虑具有超出预定记录参数的开始时间和/或结束时间的内容的实例。 动态调整的记录参数可以调节记录的频道的数量和/或记录的内容的实例。 内容接收器可以将在处理单元处接收到的节目信息与预定义的记录参数进行比较,并且可以基于比较来动态地调整记录参数。 内容接收器可以生成屏幕显示内容以包括关于动态调整的记录参数的信息,并且可以将内容显示设备发送到内容显示设备,以通知用户动态调整的重新编码参数。

    Enabling interactive activities for content utilizing matrix codes
    80.
    发明授权
    Enabling interactive activities for content utilizing matrix codes 有权
    启用使用矩阵代码的内容的交互式活动

    公开(公告)号:US08430302B2

    公开(公告)日:2013-04-30

    申请号:US13020678

    申请日:2011-02-03

    Abstract: An electronic device may generate a matrix code that includes information for performing an interactive activity related to content, combine the matrix code with the content, and transmit the combination of the matrix code and the content to a display device. Subsequently, the displayed matrix code may be captured by a matrix code reader in order to initiate performance of the interactive activity. In some implementations, the content may be a sporting event and capture of the matrix code may initiate performance of an activity corresponding to a fantasy sporting event league associated with the sporting event. In various implementations, the matrix code reader's initiation of performance of the interactive activity related to the content may utilize one or more other electronic devices located in a user location.

    Abstract translation: 电子设备可以生成包括用于执行与内容相关的交互活动的信息的矩阵代码,将矩阵代码与内容相结合,并将矩阵代码和内容的组合发送到显示设备。 随后,显示的矩阵代码可以由矩阵代码读取器捕获,以便发起交互活动的执行。 在一些实现中,内容可以是运动事件,并且矩阵代码的捕获可以发起与体育赛事相关联的幻想运动事件联赛对应的活动的表现。 在各种实现中,矩阵码阅读器启动与内容相关的交互活动的性能可以利用位于用户位置的一个或多个其他电子设备。

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