Semiconductor device
    72.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号:US07692194B2

    公开(公告)日:2010-04-06

    申请号:US12015362

    申请日:2008-01-16

    摘要: A semiconductor device having a novel structure by which the operating characteristics and reliability are improved and a manufacturing method thereof. An island-shaped semiconductor layer provided over a substrate, including a channel formation region provided between a pair of impurity regions; a first insulating layer provided so as to be in contact with the side surface of the semiconductor layer; a gate electrode provided over the channel formation region so as to get across the semiconductor layer; and a second insulating layer provided between the channel formation region and the gate electrode are included. The semiconductor layer is locally thinned, the channel formation region is provided in the thinned region, and the second insulating layer covers the first insulating layer provided on the side surface of the semiconductor layer at least in the region which overlaps with the gate electrode.

    摘要翻译: 具有改善其操作特性和可靠性的新颖结构的半导体器件及其制造方法。 一种岛状半导体层,设置在衬底上,包括设置在一对杂质区之间的沟道形成区; 设置成与半导体层的侧表面接触的第一绝缘层; 栅电极,设置在所述沟道形成区上方以穿过所述半导体层; 并且包括设置在沟道形成区域和栅电极之间的第二绝缘层。 半导体层被局部变薄,沟道形成区域设置在减薄区域中,并且第二绝缘层至少在与栅电极重叠的区域中覆盖设置在半导体层的侧表面上的第一绝缘层。

    Semiconductor device and method for manufacturing the same
    73.
    发明申请
    Semiconductor device and method for manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号:US20090014799A1

    公开(公告)日:2009-01-15

    申请号:US12216567

    申请日:2008-07-08

    申请人: Atsuo Isobe

    发明人: Atsuo Isobe

    IPC分类号: H01L27/08 H01L21/30

    摘要: A semiconductor device and a method for manufacturing a semiconductor device are provided. A semiconductor device comprises a first single-crystal semiconductor layer including a first channel formation region and a first impurity region over a substrate having an insulating surface, a first gate insulating layer over the first single-crystal semiconductor layer, a gate electrode over the first gate insulating layer, a first interlayer insulating layer over the first gate insulating layer, a second gate insulating layer over the gate electrode and the first interlayer insulating layer, and a second single-crystal semiconductor layer including a second channel formation region and a second impurity region over the second gate insulating layer. The first channel formation region, the gate electrode, and the second channel formation region are overlapped with each other.

    摘要翻译: 提供半导体器件和半导体器件的制造方法。 半导体器件包括:第一单晶半导体层,包括在具有绝缘表面的衬底上的第一沟道形成区和第一杂质区;在第一单晶半导体层上方的第一栅绝缘层,第一单晶半导体层上的栅电极 栅极绝缘层,第一栅极绝缘层上的第一层间绝缘层,栅极电极和第一层间绝缘层之上的第二栅极绝缘层,以及包括第二沟道形成区域和第二杂质的第二单晶半导体层 区域。 第一沟道形成区域,栅极电极和第二沟道形成区域彼此重叠。

    Method of manufacturing a semiconductor device
    74.
    发明授权
    Method of manufacturing a semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号:US07449376B2

    公开(公告)日:2008-11-11

    申请号:US11120992

    申请日:2005-05-04

    IPC分类号: H01L21/84

    摘要: An object of the present invention is to form a channel formation region, or a TFT formation region, using one crystal aggregate (domain) by controlling crystal location and size, thus suppressing TFT variations. According to the present invention, laser irradiation is performed selectively on an amorphous silicon film in the periphery of a channel formation region, or the periphery of a TFT formation region containing a channel formation region, source and drain region, and the like. Each TFT formation region is isolated, a metallic element for promoting crystallization (typically Ni) is added, and heat treatment is performed, thus making it possible to arbitrarily determine the locations of crystal aggregates (domains). It becomes possible to suppress variations in the TFTs by arbitrarily controlling the crystal aggregate (domain) locations.

    摘要翻译: 本发明的目的是通过控制晶体位置和尺寸来形成使用一个晶体聚集体(畴)的沟道形成区域或TFT形成区域,从而抑制TFT变化。 根据本发明,在沟道形成区域的外围的非晶硅膜或包含沟道形成区域,源极和漏极区域的TFT形成区域的周边上的选择性地进行激光照射。 每个TFT形成区被隔离,加入用于促进结晶的金属元素(通常为Ni),并且进行热处理,从而可以任意地确定晶体聚集体(畴)的位置。 可以通过任意地控制晶体聚集体(畴)位置来抑制TFT的变化。

    Semiconductor Device and Method of Manufacturing the Same
    75.
    发明申请
    Semiconductor Device and Method of Manufacturing the Same 有权
    半导体器件及其制造方法

    公开(公告)号:US20080272376A1

    公开(公告)日:2008-11-06

    申请号:US12170588

    申请日:2008-07-10

    IPC分类号: H01L33/00

    摘要: In a semiconductor device having a substrate which has a metal surface, an insulating film which is formed on the substrate having the metal surface, and a pixel unit which is formed on the insulating film; the pixel unit includes a TFT, and wiring lines connected with the TFT, and a storage capacitor is constituted by the substrate (11) having the metal surface, the insulating film (12), and the wiring line (21). As the insulating film is thinner, and as the area of a region where the insulating film and the wiring line lie in contact is larger, the storage capacitor is endowed with a larger capacity.

    摘要翻译: 在具有金属表面的基板的半导体器件中,形成在具有金属表面的基板上的绝缘膜和形成在绝缘膜上的像素单元; 像素单元包括TFT和与TFT连接的布线,并且存储电容器由具有金属表面的基板(11),绝缘膜(12)和布线(21)构成。 由于绝缘膜更薄,并且随着绝缘膜和布线接触的区域的面积较大,所以存储电容器具有较大的容量。

    THIN FILM INTEGRATED CIRCUIT AND METHOD FOR MANUFACTURING THE SAME, CPU, MEMORY, ELECTRONIC CARD AND ELECTRONIC DEVICE
    76.
    发明申请
    THIN FILM INTEGRATED CIRCUIT AND METHOD FOR MANUFACTURING THE SAME, CPU, MEMORY, ELECTRONIC CARD AND ELECTRONIC DEVICE 有权
    薄膜集成电路及其制造方法,CPU,存储器,电子卡和电子设备

    公开(公告)号:US20080179599A1

    公开(公告)日:2008-07-31

    申请号:US11876429

    申请日:2007-10-22

    IPC分类号: H01L27/14

    CPC分类号: H01L27/1259 H01L27/1214

    摘要: A salicide process is conducted to a thin film integrated circuit without worrying about damages to a glass substrate, and thus, high-speed operation of a circuit can be achieved. A base metal film, an oxide and a base insulating film are formed over a glass substrate. A TFT having a sidewall is formed over the base insulating film, and a metal film is formed to cover the TFT. Annealing is conducted by RTA or the like at such a temperature that does not cause shrinkage of the substrate, and a high-resistant metal silicide layer is formed in source and drain regions. After removing an unreacted metal film, laser irradiation is conducted for the second annealing; therefore a silicide reaction proceeds and the high-resistant metal silicide layer becomes a low-resistant metal silicide layer. In the second annealing, a base metal film absorbs and accumulates heat of the laser irradiation, and a semiconductor layer is supplied with beat of the base metal film in addition to heat of the laser irradiation, thereby enhancing efficiency of the silicide reaction in the source and drain regions.

    摘要翻译: 对薄膜集成电路进行自对准处理,而不用担心对玻璃基板的损坏,因此可以实现电路的高速操作。 在玻璃基板上形成贱金属膜,氧化物和基底绝缘膜。 在基底绝缘膜上形成具有侧壁的TFT,并且形成覆盖TFT的金属膜。 在不会引起基板收缩的温度下由RTA等进行退火,在源极和漏极区域形成高阻金属硅化物层。 在除去未反应的金属膜之后,对第二次退火进行激光照射; 因此进行硅化物反应,高阻金属硅化物层变成低电阻金属硅化物层。 在第二退火中,贱金属膜吸收并累积激光照射的热量,并且除了激光照射的热量之外,还向半导体层供给贱金属膜的节拍,从而提高源的硅化物反应的效率 和漏区。

    Display device and electronic device using the same
    77.
    发明授权
    Display device and electronic device using the same 有权
    显示装置和使用其的电子装置

    公开(公告)号:US07312473B2

    公开(公告)日:2007-12-25

    申请号:US10329993

    申请日:2002-12-27

    IPC分类号: H01L29/00 H01L29/94 H01L33/00

    摘要: In display devices using thin film transistors, a graphoepitaxy is used for a semiconductor layer crystallizing process. Thus, a display device in which crystallinity is improved, a variation in characteristics of thin film transistors is reduced, display nonuniformity is less, and a display quality is superior is provided. Steps are formed on a substrate in advance and an amorphous silicon film is formed thereon, and then laser crystallization is conducted in a direction perpendicular to the steps.

    摘要翻译: 在使用薄膜晶体管的显示装置中,使用石墨刻蚀技术进行半导体层结晶工艺。 因此,结晶度提高的显示装置,薄膜​​晶体管的特性变化减小,显示不均匀性低,显示质量优异。 预先在基板上形成台阶,在其上形成非晶硅膜,然后在与台阶垂直的方向上进行激光结晶。

    Thin film integrated circuit and method for manufacturing the same, CPU, memory, electronic card and electronic device
    78.
    发明授权
    Thin film integrated circuit and method for manufacturing the same, CPU, memory, electronic card and electronic device 有权
    薄膜集成电路及其制造方法,CPU,存储器,电子卡和电子设备

    公开(公告)号:US07288480B2

    公开(公告)日:2007-10-30

    申请号:US11110918

    申请日:2005-04-21

    IPC分类号: H01L21/44

    CPC分类号: H01L27/1259 H01L27/1214

    摘要: A salicide process is conducted to a thin film integrated circuit without worrying about damages to a glass substrate, and thus, high-speed operation of a circuit can be achieved. A base metal film, an oxide and a base insulating film are formed over a glass substrate. A TFT having a sidewall is formed over the base insulating film, and a metal film is formed to cover the TFT. Annealing is conducted by RTA or the like at such a temperature that does not cause shrinkage of the substrate, and a high-resistant metal silicide layer is formed in source and drain regions. After removing an unreacted metal film, laser irradiation is conducted for the second annealing; therefore a silicide reaction proceeds and the high-resistant metal silicide layer becomes a low-resistant metal silicide layer. In the second annealing, a base metal film absorbs and accumulates heat of the laser irradiation, and a semiconductor layer is supplied with heat of the base metal film in addition to heat of the laser irradiation, thereby enhancing efficiency of the silicide reaction in the source and drain regions.

    摘要翻译: 对薄膜集成电路进行自对准处理,而不用担心对玻璃基板的损坏,因此可以实现电路的高速操作。 在玻璃基板上形成贱金属膜,氧化物和基底绝缘膜。 在基底绝缘膜上形成具有侧壁的TFT,并且形成覆盖TFT的金属膜。 在不会引起基板收缩的温度下由RTA等进行退火,在源极和漏极区域形成高阻金属硅化物层。 在除去未反应的金属膜之后,对第二次退火进行激光照射; 因此进行硅化物反应,高阻金属硅化物层变成低电阻金属硅化物层。 在第二退火中,贱金属膜吸收并累积激光照射的热量,并且除了激光照射的热量之外,还向半导体层供应贱金属膜的热量,从而提高源的硅化物反应的效率 和漏区。