公开(公告)号：US07559010B2

公开(公告)日：2009-07-07

申请号：US11190657

申请日：2005-07-27

申请人： Ba-Zhong Shen ,  Kelly Brian Cameron ,  Hau Thien Tran ,  Scott Richard Powell

发明人： Ba-Zhong Shen ,  Kelly Brian Cameron ,  Hau Thien Tran ,  Scott Richard Powell

IPC分类号： H03M13/00

CPC分类号： H04L27/04 ,  H03M13/118 ,  H03M13/255 ,  H04L25/4917 ,  H04L27/3416

摘要： A short length LDPC (Low Density Parity Check) code and modulation adapted for high speed Ethernet applications. In some instances, the short length LDPC code and modulation may be employed within the recommended practices currently being developed by the IEEE 802.3an (10GBASE-T) Task Force. The IEEE 802.3an (10GBASE-T) Task Force has been commissioned to develop and standardize communications protocol adapted particularly for Ethernet operation over 4 wire twisted pair cables. A new LDPC code, some possible embodiments of constellations and the corresponding mappings, as well as possible embodiments of various parity check matrices, H, of the LDPC code are presented herein to provide for better overall performance than other proposed LDPC codes existent in the art of high speed Ethernet applications. Moreover, this proposed LDPC code may be decoded using a communication device having much less complexity than required to decode other proposed LDPC codes existent in this technology space.

摘要翻译： 适用于高速以太网应用的短长度LDPC（低密度奇偶校验）码和调制。 在一些情况下，可以在IEEE 802.3an（10GBASE-T）任务组正在开发的推荐实践中采用短长度LDPC码和调制。 IEEE 802.3an（10GBASE-T）工作组已委托开发和标准化通信协议，特别适用于通过4线双绞线电缆进行以太网操作。 本文中呈现了新的LDPC码，星座的一些可能的实施例和对应的映射以及LDPC码的各种奇偶校验矩阵H的可能实施例，以提供比本领域中存在的其它提出的LDPC码更好的总体性能 的高速以太网应用。 此外，该提出的LDPC码可以使用比在该技术空间中存在的其它提出的LDPC码要求更低的复杂度的通信设备进行解码。

公开(公告)号：US07549105B2

公开(公告)日：2009-06-16

申请号：US11264997

申请日：2005-11-02

申请人： Ba-Zhong Shen ,  Kelly Brian Cameron ,  Tak K. Lee ,  Hau Thien Tran

发明人： Ba-Zhong Shen ,  Kelly Brian Cameron ,  Tak K. Lee ,  Hau Thien Tran

IPC分类号： H03M13/00

CPC分类号： H03M13/116 ,  H03M13/1148 ,  H03M13/255 ,  H03M13/6362

摘要： Construction of Irregular LDPC (Low Density Parity Check) codes using RS (Reed-Solomon) codes or GRS (Generalized Reed-Solomon) codes. As described herein, a wide variety of irregular LDPC codes may be generated using GRS or RS codes. The corresponding LDPC matrix of such an irregular LDPC code may be constructed by performing partial-matrix processing (including decomposition and partial-matrix replacement thereof) of a parity check matrix that corresponds to a GRS-based regular LDPC code. Such an irregular LDPC code may be appropriately designed using these principles thereby generating a code that is suitable for use in wireless communication systems including those that comply with the recommendation practices and standards being developed by the IEEE (Institute of Electrical & Electronics Engineers) 802.11n Task Group (i.e., the Task Group that is working to develop a standard for 802.11 TGn (High Throughput)).

摘要翻译： 使用RS（里德 - 所罗门）代码或GRS（广义里德 - 所罗门）代码构建不规则LDPC（低密度奇偶校验）码。 如本文所述，可以使用GRS或RS代码来生成各种不规则的LDPC码。 可以通过对与基于GRS的常规LDPC码相对应的奇偶校验矩阵进行部分矩阵处理（包括其分解和部分矩阵替换）来构造这种不规则LDPC码的对应LDPC矩阵。 可以使用这些原理来适当地设计这样的不规则LDPC码，从而生成适合于无线通信系统中使用的代码，包括符合IEEE（Institute of Electrical＆Electronics Engineers）802.11n的建议实践和标准的代码 任务组（即正在努力制定802.11 TGn（高吞吐量）标准的任务组）。

公开(公告)号：US20090135965A1

公开(公告)日：2009-05-28

申请号：US12273506

申请日：2008-11-18

申请人： Ba-Zhong Shen ,  Sirikiat Lek Ariyavisitakul ,  Mark Kent ,  Tak K. Lee ,  Kelly Brian Cameron

发明人： Ba-Zhong Shen ,  Sirikiat Lek Ariyavisitakul ,  Mark Kent ,  Tak K. Lee ,  Kelly Brian Cameron

IPC分类号： H04L27/06

CPC分类号： H04L1/1835 ,  H03M13/09 ,  H03M13/2957 ,  H03M13/6306 ,  H04L1/0066 ,  H04L1/1819

摘要： Flexible rate matching. No constraints or restrictions are placed on a sending communication device when effectuating rate matching. The receiving communication device is able to accommodate received transmissions of essentially any size (e.g., up to an entire turbo codeword that includes all systematic bits and all parity bits). The receiving communication device employs a relatively small-sized memory to ensure a lower cost, smaller sized communication device (e.g., handset or user equipment such as a personal wireless communication device). Moreover, incremental redundancy is achieved in which successive transmissions need not include repeated information therein (e.g., a second transmission need not include any repeated information from a first transmission). Only when reaching an end of a block of bits or codeword to be transmitted, and when wrap around at the end of such block of bits or codeword occurs, would any repeat of bits be incurred within a later transmission.

摘要翻译： 灵活的费率匹配。 在实现速率匹配时，对发送通信设备没有限制或限制。 接收通信设备能够适应基本上任何大小的接收的传输（例如，直到包括所有系统位和全部奇偶校验位的整个turbo码字）。 接收通信设备采用相对较小尺寸的存储器来确保较低成本，较小尺寸的通信设备（例如，手机或诸如个人无线通信设备的用户设备）。 此外，实现增量冗余，其中连续传输不需要包括其中的重复信息（例如，第二传输不需要包括来自第一传输的任何重复信息）。 只有到达要发送的比特或码字块的结束时，并且当在这种比特位块或码字的结尾发生环绕时，才会在稍后的传输中产生比特重复。

公开(公告)号：US07515642B2

公开(公告)日：2009-04-07

申请号：US11211210

申请日：2005-08-25

申请人： Gottfried Ungerboeck ,  Ba-Zhong Shen ,  Scott Richard Powell ,  Kelly Brian Cameron ,  Hau Thien Tran

发明人： Gottfried Ungerboeck ,  Ba-Zhong Shen ,  Scott Richard Powell ,  Kelly Brian Cameron ,  Hau Thien Tran

IPC分类号： H04L5/12

CPC分类号： H03M13/255 ,  H03M13/11 ,  H04L25/4975 ,  H04L27/3405 ,  H04L27/3427

摘要： LDPC (Low Density Parity Check) coded 128 DSQ (Double Square QAM) constellation modulation and its associated labeling. A novel means is introduced by which a constellation may be arranged and mapping in its symbols may be determined to provide for improved performance. One application area in which this may be employed is transmission over twisted pair (typically copper) cabling existent within data centers of various networks. The operation of the IEEE 802.3 Ethernet local area networks currently being used (as well as those currently under development) would benefit greatly by employing the various principles presented herein. When this novel approach of an LDPC coded 128 DSQ constellation modulation combined with TH (Tomlinson-Harashima) preceding is employed within a communication device at a transmitter end of a communication channel (i.e., in a transmitter and/or a transceiver), the overall operation of a communication system may improve significantly when compared to prior techniques.

摘要翻译： LDPC（低密度奇偶校验）编码128 DSQ（双方QAM）星座调制及其相关标签。 引入了一种新颖的装置，通过该装置可以布置星座，并且可以确定其符号中的映射以提供改进的性能。 可以采用这种方式的一个应用领域是在各种网络的数据中心内存在的双绞线（通常为铜缆）布线。 目前正在使用的IEEE 802.3以太网局域网（以及目前正在开发中的那些）的运行将通过采用本文呈现的各种原理而受益匪浅。 当在通信信道（即，在发射机和/或收发机）的发射机端的通信设备内采用与TH（Tomlinson-Harashima）组合的LDPC编码的128个DSQ星座调制的新颖方法时， 与现有技术相比，通信系统的操作可以显着改善。

公开(公告)号：US07499503B2

公开(公告)日：2009-03-03

申请号：US11728519

申请日：2007-03-26

申请人： Kelly Brian Cameron ,  Ba-Zhong Shen ,  Hau Thien Tran ,  Christopher R. Jones ,  Thomas A. Hughes, Jr.

发明人： Kelly Brian Cameron ,  Ba-Zhong Shen ,  Hau Thien Tran ,  Christopher R. Jones ,  Thomas A. Hughes, Jr.

IPC分类号： H04L27/36

CPC分类号： H03M13/3972 ,  H03M13/151 ,  H03M13/1515 ,  H03M13/25 ,  H03M13/258 ,  H03M13/27 ,  H03M13/2757 ,  H03M13/29 ,  H03M13/2966 ,  H03M13/2978 ,  H03M13/3905 ,  H03M13/3922 ,  H03M13/3927 ,  H03M13/3988 ,  H03M13/4107 ,  H03M13/6505 ,  H03M13/6561 ,  H04L1/0041 ,  H04L1/005 ,  H04L1/006 ,  H04L1/0065 ,  H04L1/0066 ,  H04L1/0068 ,  H04L1/0071

摘要： A method for parallel concatenated (Turbo) encoding and decoding. Turbo encoders receive a sequence of input data tuples and encode them. The input sequence may correspond to a sequence of an original data source, or to an already coded data sequence such as provided by a Reed-Solomon encoder. A turbo encoder generally comprises two or more encoders separated by one or more interleavers. The input data tuples may be interleaved using a modulo scheme in which the interleaving is according to some method (such as block or random interleaving) with the added stipulation that the input tuples may be interleaved only to interleaved positions having the same modulo-N (where N is an integer) as they have in the input data sequence. If all the input tuples are encoded by all encoders then output tuples can be chosen sequentially from the encoders and no tuples will be missed. If the input tuples comprise multiple bits, the bits may be interleaved independently to interleaved positions having the same modulo-N and the same bit position. This may improve the robustness of the code. A first encoder may have no interleaver or all encoders may have interleavers, whether the input tuple bits are interleaved independently or not. Modulo type interleaving also allows decoding in parallel.

公开(公告)号：US20080276153A1

公开(公告)日：2008-11-06

申请号：US12020016

申请日：2008-01-25

申请人： Ba-Zhong Shen ,  Tak K. Lee

发明人： Ba-Zhong Shen ,  Tak K. Lee

IPC分类号： H03M13/03

CPC分类号： H03M13/6381 ,  H03M13/258 ,  H03M13/2957 ,  H03M13/47 ,  H03M13/635 ,  H04L1/0041 ,  H04L1/0066 ,  H04L1/0068

摘要： Optimal period rate matching for turbo coding. A means is provided herein by which a nearly optimal (e.g., optimal for one block size and sub-optimal for others) periodic puncturing pattern that depends on a mother code. Any desired rate matching can be achieved using the means and approaches presented herein to ensure an appropriate rate of an encoded block output from a turbo encoder so that the subsequently modulated signal generated there from has the appropriate rate. In addition, some embodiments can also employ shifting for another design level available in accordance with puncturing employed to provide for periodic rate matching. Selectivity can also be employed, such that, a first periodic puncturing pattern can be applied at a first time to ensure a first rate, and a second periodic puncturing pattern can be applied at a second time to ensure a second rate.

摘要翻译： turbo编码的最优周期速率匹配。 本文提供了一种取决于母码的近似最佳（例如，对于一个块大小而优于其他块最优的）周期性穿孔模式。 任何期望的速率匹配可以使用本文提供的装置和方法来实现，以确保来自turbo编码器的编码块输出的适当速率，使得在那里生成的后续调制信号具有适当的速率。 此外，一些实施例还可以采用根据用于提供周期性速率匹配的穿孔的可用的另一设计级别的移位。 还可以采用选择性，使得可以在第一时间施加第一周期性删截图案以确保第一速率，并且可以在第二时间施加第二周期性删截图案以确保第二速率。

公开(公告)号：US20080256424A1

公开(公告)日：2008-10-16

申请号：US12101505

申请日：2008-04-11

申请人： Ba-Zhong Shen ,  Tak K. Lee

发明人： Ba-Zhong Shen ,  Tak K. Lee

IPC分类号： H03M13/03 ,  G06F11/10

CPC分类号： H03M13/2739 ,  H03M13/2957 ,  H03M13/6362 ,  H03M13/6525 ,  H04L1/0066 ,  H04L1/0069

摘要： Information bit puncturing for turbo coding with parameter selectable rate matching tailored to lower Eb/No without degrading BLER (Block Error Rate) performance. A means is presented herein by which puncturing is performed to each of three bit sequences from a turbo encoder (i.e., the systematic bits or information bits within an block to be turbo encoded, the parity bits output from a first constituent encoder, and the parity bits output from a second constituent encoder). The number of bit punctured from each of the parity bits output from the first constituent encoder and the parity bits output from the second constituent encoder need not be the same number of bits. The manner in which puncturing may be performed can be adaptive and/or changeable, in that, first puncturing parameters may be employed at a first time and second puncturing parameters may be employed at a second time, etc.

摘要翻译： 用于Turbo编码的信息比特打孔，具有可降低Eb / No的参数可选速率匹配，而不降低BLER（块错误率）性能。 本文给出了一种对来自Turbo编码器的三比特序列中的每一个进行删截的装置（即，要被turbo编码的块内的系统比特或信息比特，从第一构成编码器输出的奇偶校验位和奇偶校验位 从第二组成编码器输出的位）。 从第一组成编码器输出的每个奇偶校验位中删除的​​位的数量和从第二组成编码器输出的奇偶校验位不必是相同的位数。 可以进行删截的方式可以是自适应和/或可变的，因为可以在第一时间采用第一删截参数，并且可以在第二时间采用第二删截参数等。

公开(公告)号：US07415079B2

公开(公告)日：2008-08-19

申请号：US10865456

申请日：2004-06-10

申请人： Kelly Brian Cameron ,  Ba-Zhong Shen ,  Hau Thien Tran

发明人： Kelly Brian Cameron ,  Ba-Zhong Shen ,  Hau Thien Tran

IPC分类号： H03D1/00 ,  H03M13/03

CPC分类号： H03M13/3922 ,  H03M13/1102 ,  H03M13/258 ,  H03M13/275 ,  H03M13/2906 ,  H03M13/2939 ,  H03M13/2957 ,  H03M13/3927 ,  H03M13/4107 ,  H04L1/005 ,  H04L1/006 ,  H04L1/0065 ,  H04L1/0066 ,  H04L1/0071

摘要： Decoder design adaptable to decode coded signals using min* or max* processing. A very efficient means of min* processing or max* processing may be performed within a communication device to assist in the very complex and cumbersome calculations that are employed when decoding coded signals. The types of coded signals that may be decoded using min* processing or max* processing are varied, and they include LDPC (Low Density Parity Check) coded signals, turbo coded signals, and TTCM (Turbo Trellis Coded Modulation) coded signals, among other coded signal types. Many of the calculations and/or determinations performed within min* processing or max* processing are performed simultaneously and in parallel of one another thereby ensuring very fast operation. In a finite precision digital implementation, when certain calculated bits of min* or max* processing are available, they govern selection of resultants from among multiple calculations and determinations made simultaneously and in parallel.

摘要翻译： 解码器设计适用于使用最小*或最大*处理解码编码信号。 可以在通信设备内执行min *处理或max *处理的非常有效的方法，以帮助解码编码信号时所采用的非常复杂且繁琐的计算。 可以使用min *处理或max *处理来解码的编码信号的类型是不同的，并且它们包括LDPC（低密度奇偶校验）编码信号，turbo编码信号和TTCM（Turbo网格编码调制）编码信号，以及其他 编码信号类型。 在min *处理或max *处理之内执行的许多计算和/或确定在彼此并行并行地执行，从而确保非常快速的操作。 在有限精度数字实现中，当某些计算的min *或max *处理的位可用时，它们可以对多个计算中的结果进行选择，同时并行地进行确定。

公开(公告)号：US07395487B2

公开(公告)日：2008-07-01

申请号：US11171568

申请日：2005-06-30

申请人： Hau Thien Tran ,  Kelly Brian Cameron ,  Ba-Zhong Shen

发明人： Hau Thien Tran ,  Kelly Brian Cameron ,  Ba-Zhong Shen

IPC分类号： H03M13/00 ,  H03M13/03 ,  G06F11/00 ,  H03D1/00

CPC分类号： H04L27/34 ,  H03M13/1117 ,  H03M13/112 ,  H03M13/1137 ,  H03M13/1165 ,  H03M13/658 ,  H04L27/18

摘要： Common circuitry supporting both bit node and check node processing in LDPC (Low Density Parity Check) decoder. A novel approach is presented by which a decoder may use the same circuitry to perform updating of edge messages with respect to bit nodes as well as updating of edge messages with respect to check nodes in the context of decoding LDPC coded signals. In addition, several very efficient architectures are presented to performing check node processing that involves the updating of edge messages with respect to check nodes. One embodiment performs check node processing using min** (min-double-star) processing in conjunction with min**− (min-double-star-minus) processing. Another embodiment performs check node processing using min†† (min-double-dagger) processing in conjunction with min†− (min-dagger-minus) processing. In addition, a single FIFO may be implemented to service a number of macro blocks in a parallel decoding implementation.

摘要翻译： 支持LDPC（低密度奇偶校验）解码器中的位节点和校验节点处理的公共电路。 提出了一种新颖的方法，其中解码器可以使用相同的电路来执行相对于位节点的边缘消息的更新，以及在解码LDPC编码信号的上下文中关于校验节点的边缘消息的更新。 此外，提出了几个非常有效的架构来执行涉及到关于校验节点的边缘消息的更新的校验节点处理。 一个实施例使用min **（min-double-star）处理结合min ** - （min-double-star-minus）处理来执行校验节点处理。 另一个实施例使用min††（最小双匕首）处理结合最小† - （最小匕首 - 减号）处理来执行校验节点处理。 此外，可以实现单个FIFO以在并行解码实现中服务多个宏块。

公开(公告)号：US20080133997A1

公开(公告)日：2008-06-05

申请号：US11657819

申请日：2007-01-25

申请人： Tak K. Lee ,  Ba-Zhong Shen

发明人： Tak K. Lee ,  Ba-Zhong Shen

IPC分类号： H03M13/00

CPC分类号： H03M13/2957 ,  H03M13/2753 ,  H03M13/6508 ,  H03M13/6525

摘要： Turbo decoder employing ARP (almost regular permutation) interleave and inverse thereof as de-interleave. A novel means is presented herein by which a common module can perform both ARP interleaving and ARP de-interleaving during turbo decoding processing. A novel approach is presented that allows a common structure to perform both the interleaving and de-interleaving operations. In some embodiments, certain ARP interleaving parameters are processed to generate ARP de-interleaving parameters. In even other embodiments, certain ARP interleaving parameters are processed to generate an algebraic, closed form ARP de-interleaver function that can be employed during turbo decoding processing. This novel approach obviates the need for extremely large pre-computed look-up-tables. Moreover, this novel approach can accommodate many different interleaves and information block sizes with very little overhead.

摘要翻译： 采用ARP（几乎规则排列）交织的Turbo解码器及其反相作为解交织。 这里提出了一种新颖的手段，通用模块可以在turbo解码处理期间执行ARP交织和ARP去交织。 提出了一种新颖的方法，其允许公共结构执行交织和解交织操作。 在一些实施例中，处理某些ARP交织参数以产生ARP去交织参数。 在甚至其它实施例中，处理某些ARP交织参数以产生可在turbo解码处理期间采用的代数封闭形式的ARP去交织器功能。 这种新颖的方法避免了对非常大的预先计算的查找表的需要。 此外，这种新颖的方法可以容纳许多不同的交织和信息块大小，具有很少的开销。