Image compressing method compressing an image into a compressed image
and error coefficients
    71.
    发明授权
    Image compressing method compressing an image into a compressed image and error coefficients 失效
    图像压缩方法将图像压缩成压缩图像和误差系数

    公开(公告)号:US5363205A

    公开(公告)日:1994-11-08

    申请号:US105058

    申请日:1993-08-12

    CPC分类号: H04N19/63

    摘要: An image compression method which successively diminishes in size the image to form a compressed image. The compression is done by dividing an image into partial areas with equal size, calculating a mean pixel value in each area, and substituting the mean pixel value into the diminished image. The image is then re-enlarged in the same way, and the enlarged image is compared against the original image to determine error values. The error values and the diminished images are used to represent a compressed version of the original image.

    摘要翻译: 图像压缩方法,其连续地缩小图像以形成压缩图像。 通过将图像划分为相同尺寸的部分区域来进行压缩,计算每个区域中的平均像素值,并将平均像素值代入缩小的图像。 然后以相同的方式重新放大图像,并将放大的图像与原始图像进行比较以确定误差值。 错误值和减少的图像用于表示原始图像的压缩版本。

    Multiplication circuit
    72.
    发明授权
    Multiplication circuit 失效
    乘法电路

    公开(公告)号:US5789962A

    公开(公告)日:1998-08-04

    申请号:US638330

    申请日:1996-04-26

    IPC分类号: G06J1/00 G06F7/44

    CPC分类号: G06J1/00

    摘要: A multiplication circuit has two capacitive couplings connected first and second inverting amplifiers, respectively. Two steps of multiplication are performed by this circuit. Input is multiplied by a multiplier of a product of multipliers of the successive multiplication circuits, so the total multiplier can be rather large with similar capacitances to that of the conventional circuit.

    摘要翻译: 乘法电路分别具有连接第一和第二反相放大器的两个电容耦合。 该电路执行两步乘法运算。 输入乘以连续乘法电路的乘法乘积乘法器,因此与常规电路的乘法电容相似,总乘法器可能相当大。

    Low electrical power consumption filter circuit
    73.
    发明授权
    Low electrical power consumption filter circuit 失效
    低功耗滤波电路

    公开(公告)号:US5751184A

    公开(公告)日:1998-05-12

    申请号:US732895

    申请日:1996-10-17

    IPC分类号: H03H11/12 H03K5/00

    CPC分类号: H03H11/1217

    摘要: A low electric power consumption filter circuit includes an amplifying portion including an odd number of serial MOS inverters. A grounded capacitance is connected between an output of the amplifying portion and ground. A pair of balancing resistances connect an output of the MOS inverter to a supply voltage and ground at a previous stage of the last MOS inverter. A feedback impedance connects an output of the amplifying portion to its input. An input impedance is connected to the input of the amplifying portion.

    摘要翻译: 低功耗滤波电路包括具有奇数个串联MOS反相器的放大部分。 接地电容连接在放大部分的输出和地之间。 一对平衡电阻将MOS逆变器的输出连接到最后一个MOS反相器的前一级的电源电压和接地。 反馈阻抗将放大部分的输出连接到其输入。 输入阻抗连接到放大部分的输入端。

    A/D converting circuit
    74.
    发明授权
    A/D converting circuit 失效
    A / D转换电路

    公开(公告)号:US5748131A

    公开(公告)日:1998-05-05

    申请号:US710307

    申请日:1996-09-17

    CPC分类号: H03M1/168 H03M1/804

    摘要: The present invention has an object to provide an A/D converting circuit with improved accuracy in an output. In this invention, the initial electric charge is given to a capacitive coupling for outputting in a quantizing circuit so as to cancel the dispersion of thresholds of MOS inverter in the quantizing circuit, the supply voltage of the first and the second inverters is higher than the supply voltage of an inverter for quantizing, as well as the initial electric charge is given to a capacitance for input in order to limit the function of the quantizing circuit within the linear area of the first and the second inverters.

    摘要翻译: 本发明的目的是提供一种具有改进的输出精度的A / D转换电路。 在本发明中,初始电荷被赋予用于在量化电路中输出的电容耦合,以抵消量化电路中MOS反相器的阈值的偏差,第一和第二反相器的电源电压高于 用于量化的逆变器的电源电压以及初始电荷被赋予用于输入的电容,以便限制第一和第二反相器的线性区域内的量化电路的功能。

    Multistage switching circuit
    75.
    发明授权
    Multistage switching circuit 失效
    多级开关电路

    公开(公告)号:US5602499A

    公开(公告)日:1997-02-11

    申请号:US619416

    申请日:1996-03-21

    摘要: An analog type multistage switching circuit with a small circuit size and a small consumed electric power to having a plurality of thresholding circuits arranged in parallel to which an input voltage and a reference voltage are impressed through capacitive couplings which add the input voltage and reference voltage with weighting.

    摘要翻译: 一种具有小电路尺寸和小消耗电功率的模拟型多级开关电路,具有并联布置的多个阈值电路,通过电容耦合向输入电压和参考电压施加输入电压和参考电压,所述电容耦合将输入电压和参考电压与 加权

    Filter device including SRAM and EEPROM devices
    77.
    发明授权
    Filter device including SRAM and EEPROM devices 失效
    滤波器器件包括SRAM和EEPROM器件

    公开(公告)号:US5502664A

    公开(公告)日:1996-03-26

    申请号:US216826

    申请日:1994-03-23

    IPC分类号: H03H15/00 H03H17/02 G06F15/31

    CPC分类号: H03H17/0291 H03H15/00

    摘要: A filter circuit switches a switching mechanism based on multiplier held in a data register DATA RGST as a digital data, based on the output data of data register DATA RGST, a multiplication circuit M is arranged to have weights corresponding to a capacity of capacitance connected with a common analog input voltage X.

    摘要翻译: 滤波器电路基于数据寄存器DATA RGST的输出数据,将保持在数据寄存器DATA RGST中的乘法器作为数字数据切换开关机构,乘法电路M被配置为具有对应于与 通用模拟输入电压X.

    Filter device with memory test circuit
    78.
    发明授权
    Filter device with memory test circuit 失效
    带内存测试电路的滤波器

    公开(公告)号:US5500810A

    公开(公告)日:1996-03-19

    申请号:US231766

    申请日:1994-04-25

    IPC分类号: H03H15/00 H03H17/02 G06F15/31

    CPC分类号: H03H17/0291 H03H15/00

    摘要: A filter device with memory test circuit easily executes a memory test inspite of single-bit data processing to 1 bit data. The filter device with a memory test circuit includes a memory test circuit between a memory means and a shift register, sequentially reads digital data and tests digital data at the external Central Processing Unit (CPU) after converting the data from parallel to serial at the shift register.

    摘要翻译: 具有存储器测试电路的滤波器器件容易地执行单位数据处理到1位数据的存储器测试。 具有存储器测试电路的滤波器装置包括存储器装置和移位寄存器之间的存储器测试电路,在将数据从并行转换为串行数据之后顺序读取数字数据并在外部中央处理器(CPU)测试数字数据 寄存器。

    Memory device for recording a time factor
    79.
    发明授权
    Memory device for recording a time factor 失效
    用于记录时间因素的记忆装置

    公开(公告)号:US5452336A

    公开(公告)日:1995-09-19

    申请号:US151030

    申请日:1993-11-12

    CPC分类号: H03M1/58 H03M1/56

    摘要: A memory device for recording a time factor of data includes a threshold element, coupling capacitance, an RC-circuit, and a digital counter. A reference voltage is input to the RC-circuit. The output of the RC-circuit and an input voltage are each input to the coupling capacitance. The output of the coupling capacitance is input to the threshold element. When the voltage received by the threshold element reaches a threshold voltage level, the threshold element generates an output voltage. The digital counter receives the threshold element output voltage and the reference voltage. The digital counter is triggered by the reference voltage to begin counting clock pulses generated by a reference clock. The digital counter is then triggered by the threshold element output voltage to stop counting the clock pulses.

    摘要翻译: 用于记录数据的时间因子的存储器件包括阈值元件,耦合电容,RC电路和数字计数器。 参考电压被输入到RC电路。 RC电路的输出和输入电压各自输入到耦合电容。 耦合电容的输出被输入到阈值元件。 当由阈值元件接收的电压达到阈值电压电平时,阈值元件产生输出电压。 数字计数器接收阈值元件输出电压和参考电压。 数字计数器由参考电压触发,开始计数由参考时钟产生的时钟脉冲。 数字计数器然后由阈值元件输出电压触发,以停止对时钟脉冲的计数。

    Multiplication circuit for multiplying analog values
    80.
    发明授权
    Multiplication circuit for multiplying analog values 失效
    用于乘法运算的乘法电路

    公开(公告)号:US5424965A

    公开(公告)日:1995-06-13

    申请号:US172393

    申请日:1993-12-23

    IPC分类号: G06G7/16 G06J1/00

    CPC分类号: G06J1/00

    摘要: A multiplication circuit for multiplying analog values. The multiplication circuit receives a plurality of input voltages and selects one of the input voltages. The multiplication circuit also includes at least one resistor/capacitor (RC) circuit. The RC circuits includes a resistor for receiving a stepwise start signal and a capacitor, which is connected between a ground potential and the resistor. An output terminal is connected between the resistor and the capacitor. The output terminal outputs an output voltage. The multiplication circuit produces a stop signal when a difference between the selected one of the input voltages and the output voltage is greater than a predetermined value. The multiplication circuit selectively increases or decreases a count value by a number of clock pulses that occur between the stepwise start signal and the stop signal, The multiplication circuit produces a count signal, which is indicative of the count value. The multiplication circuit includes a switch for electrically disconnecting, in accordance with the count signal, the resistor and the capacitor of the RC circuit.

    摘要翻译: 用于乘以模拟值的乘法电路。 乘法电路接收多个输入电压并选择输入电压之一。 乘法电路还包括至少一个电阻器/电容器(RC)电路。 RC电路包括用于接收逐步启动信号的电阻器和连接在接地电位和电阻器之间的电容器。 输出端连接在电阻和电容之间。 输出端输出输出电压。 当选择的输入电压和输出电压之间的差异大于预定值时,乘法电路产生停止信号。 乘法电路选择性地将计数值增加或减少在逐步启动信号和停止信号之间发生的时钟脉冲数。乘法电路产生计数信号,其表示计数值。 乘法电路包括根据计数信号电路断开RC电路的电阻器和电容器的开关。