摘要:
An image compression method which successively diminishes in size the image to form a compressed image. The compression is done by dividing an image into partial areas with equal size, calculating a mean pixel value in each area, and substituting the mean pixel value into the diminished image. The image is then re-enlarged in the same way, and the enlarged image is compared against the original image to determine error values. The error values and the diminished images are used to represent a compressed version of the original image.
摘要:
A multiplication circuit has two capacitive couplings connected first and second inverting amplifiers, respectively. Two steps of multiplication are performed by this circuit. Input is multiplied by a multiplier of a product of multipliers of the successive multiplication circuits, so the total multiplier can be rather large with similar capacitances to that of the conventional circuit.
摘要:
A low electric power consumption filter circuit includes an amplifying portion including an odd number of serial MOS inverters. A grounded capacitance is connected between an output of the amplifying portion and ground. A pair of balancing resistances connect an output of the MOS inverter to a supply voltage and ground at a previous stage of the last MOS inverter. A feedback impedance connects an output of the amplifying portion to its input. An input impedance is connected to the input of the amplifying portion.
摘要:
The present invention has an object to provide an A/D converting circuit with improved accuracy in an output. In this invention, the initial electric charge is given to a capacitive coupling for outputting in a quantizing circuit so as to cancel the dispersion of thresholds of MOS inverter in the quantizing circuit, the supply voltage of the first and the second inverters is higher than the supply voltage of an inverter for quantizing, as well as the initial electric charge is given to a capacitance for input in order to limit the function of the quantizing circuit within the linear area of the first and the second inverters.
摘要:
An analog type multistage switching circuit with a small circuit size and a small consumed electric power to having a plurality of thresholding circuits arranged in parallel to which an input voltage and a reference voltage are impressed through capacitive couplings which add the input voltage and reference voltage with weighting.
摘要:
A computational circuit that includes a selector for providing an input to one of a plurality of sample/hold circuits. The outputs of the sample/hold circuits are provided to a multiplexer. The output of the multiplexer is provided to a computational portion, such as a multiplier.
摘要:
A filter circuit switches a switching mechanism based on multiplier held in a data register DATA RGST as a digital data, based on the output data of data register DATA RGST, a multiplication circuit M is arranged to have weights corresponding to a capacity of capacitance connected with a common analog input voltage X.
摘要:
A filter device with memory test circuit easily executes a memory test inspite of single-bit data processing to 1 bit data. The filter device with a memory test circuit includes a memory test circuit between a memory means and a shift register, sequentially reads digital data and tests digital data at the external Central Processing Unit (CPU) after converting the data from parallel to serial at the shift register.
摘要:
A memory device for recording a time factor of data includes a threshold element, coupling capacitance, an RC-circuit, and a digital counter. A reference voltage is input to the RC-circuit. The output of the RC-circuit and an input voltage are each input to the coupling capacitance. The output of the coupling capacitance is input to the threshold element. When the voltage received by the threshold element reaches a threshold voltage level, the threshold element generates an output voltage. The digital counter receives the threshold element output voltage and the reference voltage. The digital counter is triggered by the reference voltage to begin counting clock pulses generated by a reference clock. The digital counter is then triggered by the threshold element output voltage to stop counting the clock pulses.
摘要:
A multiplication circuit for multiplying analog values. The multiplication circuit receives a plurality of input voltages and selects one of the input voltages. The multiplication circuit also includes at least one resistor/capacitor (RC) circuit. The RC circuits includes a resistor for receiving a stepwise start signal and a capacitor, which is connected between a ground potential and the resistor. An output terminal is connected between the resistor and the capacitor. The output terminal outputs an output voltage. The multiplication circuit produces a stop signal when a difference between the selected one of the input voltages and the output voltage is greater than a predetermined value. The multiplication circuit selectively increases or decreases a count value by a number of clock pulses that occur between the stepwise start signal and the stop signal, The multiplication circuit produces a count signal, which is indicative of the count value. The multiplication circuit includes a switch for electrically disconnecting, in accordance with the count signal, the resistor and the capacitor of the RC circuit.