公开(公告)号：US20070020877A1

公开(公告)日：2007-01-25

申请号：US11186360

申请日：2005-07-21

Applicant: Uway Tseng ,  Ching-Yu Chang

Inventor： Uway Tseng ,  Ching-Yu Chang

IPC: H01L21/76

CPC classification number: H01L21/76224

Abstract: A shallow trench isolation structure has a trench formed in a substrate, a silicon oxynitride layer conformally formed on the sidewalls and bottom of the trench, and a high density plasma (HDP) oxide layer substantially filling the trench.

Abstract translation: 浅沟槽隔离结构具有在衬底中形成的沟槽，保形地形成在沟槽的侧壁和底部上的氧氮化硅层和基本上填充沟槽的高密度等离子体（HDP）氧化物层。

公开(公告)号：US20070002296A1

公开(公告)日：2007-01-04

申请号：US11384624

申请日：2006-03-20

Applicant: Ching-Yu Chang ,  Vincent Yu ,  Chin-Hsiang Lin

Inventor： Ching-Yu Chang ,  Vincent Yu ,  Chin-Hsiang Lin

IPC: G03B27/42

CPC classification number: G03F7/70341

Abstract: A method of performing immersion lithography on a semiconductor substrate includes providing a layer of resist onto a surface of the semiconductor substrate and exposing the resist layer using an immersion lithography exposure system. The immersion lithography exposure system utilizes a fluid during exposure and may be capable of removing some, but not all, of the fluid after exposure. After exposure, a treatment process is used to remove the remaining portion of fluid from the resist layer. After treatment, a post-exposure bake and a development step are used.

Abstract translation: 在半导体衬底上进行浸渍光刻的方法包括在半导体衬底的表面上提供抗蚀剂层并使用浸没光刻曝光系统曝光抗蚀剂层。 浸没式光刻曝光系统在曝光期间利用流体，并且可以在曝光后能够去除一些但不是全部的流体。 曝光后，使用处理工艺从抗蚀剂层中除去剩余部分的流体。 处理后，使用曝光后烘烤和显影步骤。

公开(公告)号：US20060172520A1

公开(公告)日：2006-08-03

申请号：US11050312

申请日：2005-02-03

Applicant: Ching-Yu Chang ,  Chin-Hsiang Lin ,  Burn Lin

Inventor： Ching-Yu Chang ,  Chin-Hsiang Lin ,  Burn Lin

IPC: H01L21/4763 ,  H01L21/3205

CPC classification number: H01L21/76802 ,  H01L21/31144

Abstract: A method for forming a semiconductor device includes forming a photoresist layer over a substrate and patterning the photoresist layer to form photoresist portions. A second layer is formed over the substrate in areas not covered by the photoresist portions and the photoresist portions are removed. After removing the photoresist portions, the second layer is used to modify the substrate to create at least a portion of the semiconductor device.

Abstract translation: 一种用于形成半导体器件的方法包括在衬底上形成光致抗蚀剂层并图案化光致抗蚀剂层以形成光致抗蚀剂部分。 在不被光致抗蚀剂部分覆盖的区域中的衬底上形成第二层，并去除光致抗蚀剂部分。 在去除光致抗蚀剂部分之后，第二层用于修改基板以产生半导体器件的至少一部分。

公开(公告)号：US20050136338A1

公开(公告)日：2005-06-23

申请号：US10894924

申请日：2004-07-20

Applicant: Ching-Yu Chang

Inventor： Ching-Yu Chang

IPC: G03C5/00 ,  G03F1/14 ,  G03F7/20 ,  G03F9/00 ,  H01L21/027

CPC classification number: G03F7/70441 ,  G03F1/36

Abstract: In a photolithography process, a photoresist layer is formed on a substrate. A photomask is aligned over the substrate to transfer pattern images defined in the photomask on the substrate. The photomask includes first and second patterns of different light transmission rates, and a dummy pattern surrounding the second pattern having a light transmission rate lower than that of the first pattern. The substrate is exposed to a light radiation through the photomask. The photoresist layer then is developed to form the pattern images. The dummy pattern is dimensionally configured to allow light transmission, but in a substantially amount so that the dummy pattern is not imaged during exposure.

Abstract translation: 在光刻工艺中，在基板上形成光致抗蚀剂层。 光掩模在衬底上对准以传输在衬底上的光掩模中限定的图案图像。 光掩模包括不同透光率的第一和第二图案，以及围绕第二图案的虚拟图案，其透光率低于第一图案的透光率。 将基板暴露于通过光掩模的光辐射。 然后将光致抗蚀剂层显影以形成图案图像。 虚拟图案被尺寸地构造成允许光透射，但是基本上是这样的，使得在曝光期间伪图案不被成像。

公开(公告)号：US20050074945A1

公开(公告)日：2005-04-07

申请号：US10710637

申请日：2004-07-27

Applicant: Ching-Yu Chang

Inventor： Ching-Yu Chang

IPC: H01L23/544 ,  H01L21/8242 ,  H01L21/76

CPC classification number: H01L23/544 ,  H01L2223/54453 ,  H01L2924/0002 ,  Y10S438/975 ,  H01L2924/00

Abstract: A method of forming an overlay mark is provided. A first material layer is formed on a substrate, and then a first trench serving as a trench type outer mark is formed in the first material layer. The first trench is partially filled with the first deposition layer. A second material is formed over the first trench and the first deposition layer. A second trench is formed exposing the first deposition layer within the first trench. The second trench is partially filled with a second deposition layer forming a third trench. A third material layer is formed on the substrate to cover the second deposition layer and the second material layer. A step height is formed on the third deposition layer between the edge of the first trench and the center of the first trench. A raised feature serving as an inner mark is formed on the third deposition layer.

Abstract translation: 提供了一种形成覆盖标记的方法。 在基板上形成第一材料层，然后在第一材料层中形成用作沟槽型外标的第一沟槽。 第一沟槽部分地填充有第一沉积层。 在第一沟槽和第一沉积层上形成第二材料。 形成第二沟槽，使第一沉积层暴露在第一沟槽内。 第二沟槽部分地填充有形成第三沟槽的第二沉积层。 在基板上形成第三材料层以覆盖第二沉积层和第二材料层。 在第一沉积层的边缘和第一沟槽的中心之间的第三沉积层上形成台阶高度。 在第三沉积层上形成用作内标的凸起特征。

公开(公告)号：US06875659B2

公开(公告)日：2005-04-05

申请号：US10614698

申请日：2003-07-03

Applicant: Ta-Hung Yang ,  Ching-Yu Chang

Inventor： Ta-Hung Yang ,  Ching-Yu Chang

IPC: H01L21/8246 ,  H01L27/112

CPC classification number: H01L27/1126

Abstract: A method of code programming a mask read only memory (ROM) is disclosed. According to the method, a first photoresist layer is formed over word lines and a gate oxide layer of a substrate already having implanted bit lines. The first photoresist layer is patterned to develop pre-code openings over all of the memory cells, which correspond to intersecting word and bit lines. The first photoresist layer is then hardened using either a treatment implant or a treatment plasma. Subsequently, a second photoresist layer is formed over the first photoresist layer and patterned to develop real-code openings over memory cells which are actually to be coded with a logic “0” value. Each memory cell to be coded is then implanted with implants passing through the pre-code openings and the real code openings and into the memory cell.

Abstract translation: 公开了一种代码编程掩模只读存储器（ROM）的方法。 根据该方法，在字线和具有注入位线的衬底的栅极氧化物层上形成第一光致抗蚀剂层。 图案化第一光致抗蚀剂层以在对应于相交字和位线的所有存储单元上形成预编码开口。 然后使用处理植入物或处理等离子体硬化第一光致抗蚀剂层。 随后，在第一光致抗蚀剂层上形成第二光致抗蚀剂层，并将其图案化以在实际上以逻辑“0”值编码的存储器单元上形成实际代码开口。 然后，将通过预代码开口和实际代码开口的植入物植入待编码的每个存储单元并进入存储单元。

公开(公告)号：US06794280B2

公开(公告)日：2004-09-21

申请号：US10604587

申请日：2003-07-31

Applicant: Ching-Yu Chang

Inventor： Ching-Yu Chang

IPC: H01L213205

CPC classification number: H01L27/1126 ,  H01L27/112

Abstract: A method of fabricating a non-volatile memory is provided. A longitudinal strip of stacked layer is formed over a substrate. The longitudinal strip is a stacked layer comprising a gate dielectric layer, a conductive layer and a cap layer. A buried bit line is formed in the substrate on each side of the longitudinal strip. The longitudinal strip is patterned to form a plurality of stacked blocks. Thereafter, a dielectric layer is formed over the substrate. The dielectric layer exposes the cap layer of the stacked blocks. Some cap layers of the stacked blocks are removed to expose the conductive layer underneath. A word line is formed over the dielectric layer to connect stacked blocks in the same row serially together.

Abstract translation: 提供了一种制造非易失性存储器的方法。 堆叠层的纵向条形成在衬底上。 纵向条是包括栅介电层，导电层和盖层的层叠层。 在纵向条的每一侧上的基板中形成掩埋位线。 图案化纵向条以形成多个堆叠的块。 此后，在衬底上形成电介质层。 电介质层暴露堆叠块的盖层。 去除堆叠块的一些盖层以露出下面的导电层。 在电介质层上形成一个字线，以将串联在同一行中的堆叠块连接起来。

公开(公告)号：US06787013B2

公开(公告)日：2004-09-07

申请号：US09949693

申请日：2001-09-10

Applicant: Ching-Yu Chang ,  Cherng-Jyh Lee ,  Tzer-Ming Chen

Inventor： Ching-Yu Chang ,  Cherng-Jyh Lee ,  Tzer-Ming Chen

IPC: G01N2726

CPC classification number: G01N33/5438 ,  A61B5/14532 ,  A61B2562/0295 ,  C12Q1/001 ,  Y10T29/49105 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49156

Abstract: A spacer forming method for a biosensor that has a biosensor possessing a capillary sampling channel and electrical connecting tracks for the use of a specific portable meter. A pair of electrodes is printed on an insulating base plate to be the transducer of the electrochemical biosensor by means of the screen-printing technology. The advanced thick-film printing technology is employed to construct the spacer component of the sampling channel that precisely controls the volume of a sample solution. Therefore, the spacer forming method reduces the usage of adhesive that otherwise causes a serious problem during a continuous punching procedure. Furthermore, the embedded switch pad on the biosensor is introduced to be instead of a micro switch in a connector of the portable meter.

Abstract translation: 一种用于生物传感器的间隔物形成方法，其具有具有毛细管取样通道的生物传感器和用于使用特定便携式仪表的电连接轨道。 通过丝网印刷技术将一对电极印刷在绝缘基板上作为电化学生物传感器的换能器。 采用先进的厚膜印刷技术构建了精确控制样品溶液体积的取样通道的间隔元件。 因此，间隔物形成方法减少了在连续冲压过程中导致严重问题的粘合剂的使用。 此外，引入生物传感器上的嵌入式开关板代替便携式仪表的连接器中的微型开关。

公开(公告)号：US06673682B2

公开(公告)日：2004-01-06

申请号：US10144874

申请日：2002-05-13

Applicant: Ching-Yu Chang

Inventor： Ching-Yu Chang

IPC: H01L218236

CPC classification number: H01L27/11253 ,  H01L27/112 ,  H01L27/1126

Abstract: Methods for making integrated circuit devices, such as high density memory devices and memory devices exhibiting dual bits per cell, include forming multiple oxide fences on a semiconductor substrate between multiple polybars. The oxide fences create a hole pre-code pattern that facilitates ion implantation into trenches disposed between the polybars. The holes, or voids, formed by the oxide fences provide greater control of the critical dimension of ion implantation, for example, the critical dimension of the trench sidewalls. Semiconductor devices used in the manufacture of memory devices include the oxide fences during the manufacturing process.

Abstract translation: 用于制造诸如高密度存储器件和表现出每个单元双位的存储器件的集成电路器件的方法包括在多个多边形之间的半导体衬底上形成多个氧化物围栅。 氧化物栅栏产生一个孔预编码图案，便于将离子注入到设置在多边形之间的沟槽中。 由氧化物栅栏形成的孔或空隙提供了对离子注入的关键尺寸（例如沟槽侧壁的临界尺寸）的更大控制。 用于制造存储器件的半导体器件包括在制造过程中的氧化物栅栏。

公开(公告)号：US06607674B2

公开(公告)日：2003-08-19

申请号：US09726459

申请日：2000-11-30

Applicant: Ching-Yu Chang

Inventor： Ching-Yu Chang

IPC: B81B702

CPC classification number: C03C17/3649 ,  C03C17/3435 ,  C03C17/36 ,  C03C17/3665 ,  C03C2218/33 ,  G03F1/32 ,  G03F1/72

Abstract: A phase shifting mask repair process is described. The process uses an etching gas or a hydrofluoric acid solution to etch the quartz substrate and the characteristics of the phase shifter layer being only slightly etched when clean with a NH3/H2O2/H2O2 solution to calculate and adjust the respective processing time accordingly. As a result, the phase difference between the quartz substrate and the MoSiON phase shifter layer stays relatively the same before and after the repair process.