公开(公告)号：US20110068340A1

公开(公告)日：2011-03-24

申请号：US12652379

申请日：2010-01-05

申请人： Dong-Hoon Lee ,  Do-Hyun Kim ,  Chang-Oh Jeong ,  O-Sung Seo ,  Xin-Xing Li

发明人： Dong-Hoon Lee ,  Do-Hyun Kim ,  Chang-Oh Jeong ,  O-Sung Seo ,  Xin-Xing Li

IPC分类号： H01L33/00 ,  H01L21/336

CPC分类号： H01L27/124 ,  H01L29/78618

摘要： A thin film transistor array panel includes an insulating substrate. A gate line is formed on the insulating substrate and has a gate electrode. A gate insulating layer is formed on the gate line. A semiconductor layer is formed on the gate insulating layer and overlaps the gate electrode. Diffusion barriers are formed on the semiconductor layer and contain nitrogen. A data line crosses the gate line and has a source electrode partially contacting the diffusion barriers and a drain electrode partially contacting the diffusion barriers and facing the source electrode. The drain electrode is on the gate electrode. A pixel electrode is electrically connected to the drain electrode.

摘要翻译： 薄膜晶体管阵列面板包括绝缘基板。 在绝缘基板上形成栅极线，并具有栅电极。 在栅极线上形成栅极绝缘层。 半导体层形成在栅极绝缘层上并与栅电极重叠。 在半导体层上形成扩散阻挡层并含有氮。 数据线与栅极线交叉，并且具有部分地接触扩散阻挡层的源电极和部分地接触扩散阻挡层并面向源电极的漏电极。 漏电极在栅电极上。 像素电极电连接到漏电极。

公开(公告)号：US08470623B2

公开(公告)日：2013-06-25

申请号：US12818047

申请日：2010-06-17

申请人： Do-Hyun Kim ,  Kyoung-Jae Chung ,  Seung-Ha Choi ,  Dong-Hoon Lee ,  Chang-Oh Jeong ,  Suk-Won Jung

发明人： Do-Hyun Kim ,  Kyoung-Jae Chung ,  Seung-Ha Choi ,  Dong-Hoon Lee ,  Chang-Oh Jeong ,  Suk-Won Jung

IPC分类号： H01L21/00

CPC分类号： H01L27/1225 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02664 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/1288 ,  H01L27/3262

摘要： A thin film transistor array panel includes: a substrate; a gate line disposed on the substrate and including a gate electrode; a gate insulating layer disposed on the gate line; an semiconductive oxide layer disposed on the gate insulating layer; a data line disposed on the semiconductive oxide layer and including a source electrode; a drain electrode facing the source electrode on the semiconductive oxide layer; and a passivation layer disposed on the data line. The semiconductive oxide layer is patterned with chlorine (Cl) containing gas which alters relative atomic concentrations of primary semiconductive characteristic-providing elements of the semiconductive oxide layer at least at a portion where a transistor channel region is defined.

摘要翻译： 薄膜晶体管阵列面板包括：基板; 栅极线，设置在所述基板上并且包括栅电极; 设置在栅极线上的栅极绝缘层; 设置在所述栅极绝缘层上的半导体氧化物层; 数据线，设置在所述半导体氧化物层上并包括源电极; 在半导体氧化物层上面对源电极的漏电极; 以及设置在数据线上的钝化层。 至少在限定了晶体管沟道区域的部分，半导体氧化物层用含氯（Cl）的气体构图，该气体改变半导体氧化物层的初级半导体特性提供元件的相对原子浓度。

公开(公告)号：US08035110B2

公开(公告)日：2011-10-11

申请号：US12498816

申请日：2009-07-07

申请人： Do-Hyun Kim ,  Pil-Sang Yun ,  Ki-Won Kim ,  Dong-Hoon Lee ,  Chang-Oh Jeong

发明人： Do-Hyun Kim ,  Pil-Sang Yun ,  Ki-Won Kim ,  Dong-Hoon Lee ,  Chang-Oh Jeong

IPC分类号： H01L29/04

CPC分类号： H01L29/7869 ,  H01L27/12 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/78618

摘要： A thin-film transistor (TFT) substrate has improved electrical properties and reduced appearance defects and a method of fabricating the TFT substrate, are provided. The TFT substrate includes: gate wiring which is formed on a surface of an insulating substrate; oxide active layer patterns which are formed on the gate wiring and include an oxide of a first material; buffer layer patterns which are disposed on the oxide active layer patterns to directly contact the oxide active layer patterns and include a second material; and data wiring which is formed on the buffer layer patterns to insulatedly cross the gate wiring, wherein a Gibbs free energy of the oxide of the first material is lower than a Gibbs free energy of an oxide of the second material.

摘要翻译： 薄膜晶体管（TFT）基板具有改善的电性能和减少的外观缺陷以及制造TFT基板的方法。 TFT基板包括：形成在绝缘基板的表面上的栅极布线; 氧化物活性层图案，其形成在栅极布线上并且包括第一材料的氧化物; 缓冲层图案，其设置在所述氧化物活性层图案上以直接接触所述氧化物活性层图案并且包括第二材料; 以及形成在所述缓冲层图案上以绝缘地穿过所述栅极布线的数据布线，其中所述第一材料的氧化物的吉布斯自由能低于所述第二材料的氧化物的吉布斯自由能。

公开(公告)号：US08198657B2

公开(公告)日：2012-06-12

申请号：US12652379

申请日：2010-01-05

申请人： Dong-Hoon Lee ,  Do-Hyun Kim ,  Chang-Oh Jeong ,  O-Sung Seo ,  Xin-Xing Li

发明人： Dong-Hoon Lee ,  Do-Hyun Kim ,  Chang-Oh Jeong ,  O-Sung Seo ,  Xin-Xing Li

IPC分类号： H01L23/52 ,  H01L21/82

CPC分类号： H01L27/124 ,  H01L29/78618

摘要： A thin film transistor array panel includes an insulating substrate. A gate line is formed on the insulating substrate and has a gate electrode. A gate insulating layer is formed on the gate line. A semiconductor layer is formed on the gate insulating layer and overlaps the gate electrode. Diffusion barriers are formed on the semiconductor layer and contain nitrogen. A data line crosses the gate line and has a source electrode partially contacting the diffusion barriers and a drain electrode partially contacting the diffusion barriers and facing the source electrode. The drain electrode is on the gate electrode. A pixel electrode is electrically connected to the drain electrode.

摘要翻译： 薄膜晶体管阵列面板包括绝缘基板。 在绝缘基板上形成栅极线，并具有栅电极。 在栅极线上形成栅绝缘层。 半导体层形成在栅极绝缘层上并与栅电极重叠。 在半导体层上形成扩散阻挡层并含有氮。 数据线与栅极线交叉，并且具有部分地接触扩散阻挡层的源电极和部分地接触扩散阻挡层并面向源电极的漏电极。 漏电极在栅电极上。 像素电极电连接到漏电极。

公开(公告)号：US20110031117A1

公开(公告)日：2011-02-10

申请号：US12779459

申请日：2010-05-13

申请人： Do-Hyun KIM ,  Dong-Hoon Lee ,  Chang-Oh Jeong

发明人： Do-Hyun KIM ,  Dong-Hoon Lee ,  Chang-Oh Jeong

IPC分类号： C23C14/34

CPC分类号： C23C14/3407 ,  C23C14/3464 ,  H01J37/342 ,  H01J37/3435

摘要： A sputtering target apparatus is provided. The sputtering target apparatus includes a first target assembly including a first target array having a first target, a second target disposed adjacent to the first target, and a first target dividing region disposed between the first and second targets, the first target assembly extending along a first direction, wherein the first target dividing region has a longitudinal cross-section that is oblique with respect to the first direction.

摘要翻译： 提供溅射靶设备。 溅射靶设备包括：第一目标组件，其包括具有第一靶的第一靶阵列，与第一靶相邻设置的第二靶;以及设置在第一靶和第二靶之间的第一靶分离区， 第一方向，其中第一目标分割区域具有相对于第一方向倾斜的纵向横截面。

公开(公告)号：US08455871B2

公开(公告)日：2013-06-04

申请号：US12859792

申请日：2010-08-20

申请人： Chang-Oh Jeong ,  Woo-Sung Sohn ,  Dong-Gyu Kim ,  Shi-Yul Kim ,  Ki-Yeup Lee ,  Jean-Ho Song

发明人： Chang-Oh Jeong ,  Woo-Sung Sohn ,  Dong-Gyu Kim ,  Shi-Yul Kim ,  Ki-Yeup Lee ,  Jean-Ho Song

IPC分类号： H01L29/04

CPC分类号： H01L33/16 ,  H01L27/124 ,  H01L27/1288

摘要： A thin film transistor array panel is provided and includes a gate line, a gate insulating layer covering the gate line, a semiconductor layer disposed on the gate insulating layer, and a data line and a drain electrode disposed on the semiconductor layer. The data line and the drain electrode have a dual-layered structure including a lower layer and an upper layer with the lower layer having a first portion protruded outside the upper layer and the semiconductor layer having a second portion protruded outside the edge of the lower layer.

公开(公告)号：US07608494B2

公开(公告)日：2009-10-27

申请号：US12112104

申请日：2008-04-30

申请人： Jae-Gab Lee ,  Bong-Joo Kang ,  Beom-Seok Cho ,  Chang-Oh Jeong

发明人： Jae-Gab Lee ,  Bong-Joo Kang ,  Beom-Seok Cho ,  Chang-Oh Jeong

IPC分类号： H01L21/84

CPC分类号： H01L27/12 ,  H01L27/124 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/66765

摘要： A thin film transistor array panel includes an insulating substrate, a gate wire formed on the insulating substrate. A gate insulating layer covers the gate wire. A semiconductor pattern is formed on the gate insulating layer. A data wire having source electrodes, drain electrodes and data lines is formed on the gate insulating layer and the semiconductor pattern. A protective layer is formed on the data wire. Pixel electrodes connected to the drain electrode via contact holes are formed on the protective layer. The gate wire and the data wire are made of Ag alloy containing Ag and an additive including at least one selected from Zn, In, Sn and Cr.

摘要翻译： 薄膜晶体管阵列面板包括绝缘基板，形成在绝缘基板上的栅极线。 栅极绝缘层覆盖栅极线。 在栅极绝缘层上形成半导体图形。 在栅极绝缘层和半导体图案上形成具有源电极，漏电极和数据线的数据线。 在数据线上形成保护层。 在保护层上形成通过接触孔与漏电极连接的像素电极。 栅极线和数据线由含有Ag的Ag合金和包含选自Zn，In，Sn和Cr中的至少一种的添加剂制成。

公开(公告)号：US20090121228A1

公开(公告)日：2009-05-14

申请号：US12269748

申请日：2008-11-12

申请人： Jang-Soo Kim ,  Hong-Long Ning ,  Bong-Kyun Kim ,  Hong-Sick Park ,  Shi-Yul Kim ,  Chang-Oh Jeong ,  Sang-Gab Kim ,  Jae-Hyoung Youn ,  Woo-Geun Lee ,  Yang-Ho Bae ,  Pil-Sang Yun ,  Jong-Hyun Choung ,  Sun-Young Hong ,  Ki-Won Kim ,  Byeong-Jin Lee ,  Yopung-Wook Lee ,  Jong-In Kim ,  Byeong-Beom Kim ,  Nam-Seok Suh

发明人： Jang-Soo Kim ,  Hong-Long Ning ,  Bong-Kyun Kim ,  Hong-Sick Park ,  Shi-Yul Kim ,  Chang-Oh Jeong ,  Sang-Gab Kim ,  Jae-Hyoung Youn ,  Woo-Geun Lee ,  Yang-Ho Bae ,  Pil-Sang Yun ,  Jong-Hyun Choung ,  Sun-Young Hong ,  Ki-Won Kim ,  Byeong-Jin Lee ,  Yopung-Wook Lee ,  Jong-In Kim ,  Byeong-Beom Kim ,  Nam-Seok Suh

IPC分类号： H01L29/04 ,  H01L21/336

CPC分类号： G02F1/13458 ,  G02F1/136286 ,  G02F2001/136295 ,  H01L27/1218 ,  H01L27/124 ,  H01L27/1288

摘要： A gate line includes a first seed layer formed on a base substrate and a first metal layer formed on the first seed layer. A first insulation layer is formed on the base substrate. A second insulation layer is formed on the base substrate. Here, a line trench is formed through the second insulation layer in a direction crossing the gate line. A data line includes a second seed layer formed below the line trench and a second metal layer formed in the line trench. A pixel electrode is formed in a pixel area of the base substrate. Therefore, a trench of a predetermined depth is formed using an insulation layer and a metal layer is formed through a plating method, so that a metal line having a sufficient thickness may be formed.

摘要翻译： 栅极线包括形成在基底基板上的第一籽晶层和形成在第一籽晶层上的第一金属层。 在基底基板上形成第一绝缘层。 在基底基板上形成第二绝缘层。 这里，在与栅极线交叉的方向上通过第二绝缘层形成线沟槽。 数据线包括形成在线沟槽下方的第二晶种层和形成在线沟槽中的第二金属层。 像素电极形成在基底基板的像素区域中。 因此，使用绝缘层形成预定深度的沟槽，并且通过电镀方法形成金属层，从而可以形成具有足够厚度的金属线。

公开(公告)号：US07485927B2

公开(公告)日：2009-02-03

申请号：US10548562

申请日：2004-02-28

申请人： Chang-Oh Jeong ,  Beom-Seok Cho ,  Hee-Hwan Choe

发明人： Chang-Oh Jeong ,  Beom-Seok Cho ,  Hee-Hwan Choe

IPC分类号： H01L21/84

CPC分类号： H01L29/78669 ,  G02F1/136286 ,  G02F2001/136295 ,  H01L27/12 ,  H01L27/124 ,  H01L29/456 ,  H01L29/4908

摘要： Disclosed are a thin film transistor substrate of an LCD device and a method of manufacturing the same. The thin film transistor substrate includes a nickel-silicide layer formed on an insulating layer pattern including silicon and a metal layer formed on the nickel-silicide layer. Nickel is coated on the insulating layer pattern including silicon and a metal material is coated on the nickel-coated layer. After that, a heat treatment is performed at about 200 to about 350° C. to obtain the nickel-silicide layer. Since the thin film transistor substrate of the LCD device is manufactured by applying the nickel-silicide wiring, a device having low resistivity and good ohmic contact property can be obtained.

摘要翻译： 公开了一种LCD装置的薄膜晶体管基板及其制造方法。 薄膜晶体管基板包括形成在包括硅和在硅化镍层上形成的金属层的绝缘层图案上的硅化镍层。 将镍涂覆在包括硅的绝缘层图案上，并将金属材料涂覆在镀镍层上。 之后，在约200〜约350℃进行热处理，得到硅化镍层。 由于通过施加硅化镍布线来制造LCD器件的薄膜晶体管衬底，因此可以获得具有低电阻率和良好的欧姆接触特性的器件。

公开(公告)号：US20080116792A1

公开(公告)日：2008-05-22

申请号：US12022809

申请日：2008-01-30

申请人： Jae-Hoon Chung ,  Nam-Deog Kim ,  Jung-Soo Rhee ,  Beohm-Rock Choi ,  Jong-Sun Lim ,  Chang-Oh Jeong

发明人： Jae-Hoon Chung ,  Nam-Deog Kim ,  Jung-Soo Rhee ,  Beohm-Rock Choi ,  Jong-Sun Lim ,  Chang-Oh Jeong

IPC分类号： H01L27/28

CPC分类号： H01L27/12 ,  H01L27/3246 ,  H01L51/5218 ,  H01L51/5221 ,  H01L2227/323

摘要： An organic light emitting diode display includes an insulating layer, a stress buffer disposed on the insulating layer, a first electrode disposed on the stress buffer, an organic light emitting member disposed on the first electrode, and a second electrode disposed on the organic light emitting member.

摘要翻译： 有机发光二极管显示器包括绝缘层，设置在绝缘层上的应力缓冲器，设置在应力缓冲器上的第一电极，设置在第一电极上的有机发光部件和设置在有机发光器件上的第二电极 会员。