公开(公告)号：US11600701B2

公开(公告)日：2023-03-07

申请号：US17223645

申请日：2021-04-06

Applicant: Infineon Technologies AG

Inventor： Andreas Peter Meiser ,  Caspar Leendertz ,  Anton Mauder

IPC: H01L29/16 ,  H01L29/66 ,  H01L29/06 ,  H01L29/78 ,  H01L29/808 ,  H01L29/739 ,  H01L29/40 ,  H01L29/423 ,  H01L21/308 ,  H01L21/31 ,  H01L21/04 ,  H01L21/311 ,  H01L21/426 ,  H01L21/02 ,  H01L21/033

Abstract: A silicon carbide substrate has a trench extending from a main surface of the silicon carbide substrate into the silicon carbide substrate. The trench has a trench width at a trench bottom. A shielding region is formed in the silicon carbide substrate. The shielding region extends along the trench bottom. In at least one doping plane extending approximately parallel to the trench bottom, a dopant concentration in the shielding region over a lateral first width deviates by not more than 10% from a maximum value of the dopant concentration. The first width is less than the trench width and is at least 30% of the trench width.

公开(公告)号：US20220406928A1

公开(公告)日：2022-12-22

申请号：US17838490

申请日：2022-06-13

Applicant: Infineon Technologies AG

Inventor： Joachim Weyers ,  Anton Mauder ,  Ralf Siemieniec ,  Guang Zeng

IPC: H01L29/78 ,  H01L29/16 ,  H01L29/06

Abstract: A semiconductor device includes a transistor cell with a source region of a first conductivity type and a gate electrode. The source region is formed in a wide bandgap semiconductor portion. A diode chain includes a plurality of diode structures. The diode structures are formed in the wide bandgap semiconductor portion and electrically connected in series. Each diode structure includes a cathode region of the first conductivity type and an anode region of a complementary second conductivity type. A gate metallization is electrically connected with the gate electrode and with a first one of the anode regions in the diode chain. A source electrode structure is electrically connected with the source region and with a last one of the cathode regions in the diode chain.

公开(公告)号：US20220028980A1

公开(公告)日：2022-01-27

申请号：US17496050

申请日：2021-10-07

Applicant: Infineon Technologies AG

Inventor： Andreas Meiser ,  Caspar Leendertz ,  Anton Mauder ,  Roland Rupp

IPC: H01L29/16 ,  H01L29/66 ,  H01L21/02 ,  H01L29/78 ,  H01L29/06 ,  H01L29/417 ,  H01L29/40 ,  H01L29/423

Abstract: A semiconductor device includes a trench structure extending from a first surface into a silicon carbide semiconductor body, the trench structure having a gate electrode that is dielectrically insulated from the semiconductor body, a shielding region adjoining a bottom of the trench structure and forming a first pn junction with a drift structure of the semiconductor body, a body region forming a second pn junction with the drift structure, a source zone arranged between the first surface and the body region and forming a third pn junction with the source zone, wherein a contact portion of the body region extends to the first surface, wherein the source zone surrounds the contact portion of the body region at the first surface, and wherein the trench structure forms an enclosed loop at the first surface that surrounds the source zone and the contact portion of the body region at the first surface.

公开(公告)号：US11171202B2

公开(公告)日：2021-11-09

申请号：US16410293

申请日：2019-05-13

Applicant: Infineon Technologies AG

Inventor： Anton Mauder ,  Franz-Josef Niedernostheide ,  Christian Philipp Sandow

IPC: H01L29/06 ,  H01L29/78 ,  H01L29/739

Abstract: A power semiconductor device includes a semiconductor body coupled to first and second load terminal structures, an active cell field in the body, and a plurality of first and second cells in the active cell field. Each cell is electrically connected to the first load terminal structure and to a drift region. Each first cell includes a mesa having a port region electrically connected to the first load terminal structure, and a channel region coupled to the drift region. Each second cell includes a mesa having a port region of the opposite conductivity type electrically connected to the first load terminal structure, and a channel region coupled to the drift region. Each mesa is spatially confined in a direction perpendicular to a direction of the load current within the respective mesa, by an insulation structure and has a total extension of less than 100 nm in the direction.

公开(公告)号：US20210257489A1

公开(公告)日：2021-08-19

申请号：US17307632

申请日：2021-05-04

Applicant: Infineon Technologies AG

Inventor： Anton Mauder ,  Hans-Joachim Schulze ,  Matteo Dainese ,  Elmar Falck ,  Franz-Josef Niedernostheide ,  Manfred Pfaffenlehner

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/10 ,  H01L29/40

Abstract: A semiconductor component includes a semiconductor body having opposing first surface and second surfaces, and a side surface surrounding the semiconductor body. The semiconductor component also includes an active region including a first semiconductor region of a first conductivity type, which is electrically contacted via the first surface, and a second semiconductor region of a second conductivity type, which is electrically contacted via the second surface. The semiconductor component further includes an edge termination region arranged in a lateral direction between the first semiconductor region of the active region and the side surface, and includes a first edge termination structure and a second edge termination structure. The second edge termination structure is arranged in the lateral direction between the first edge termination structure and the side surface and extends from the first surface in a vertical direction more deeply into the semiconductor body than the first edge termination structure.

公开(公告)号：US20210013310A1

公开(公告)日：2021-01-14

申请号：US16926695

申请日：2020-07-11

Applicant: Infineon Technologies AG

Inventor： Caspar Leendertz ,  Romain Esteve ,  Moriz Jelinek ,  Anton Mauder ,  Hans-Joachim Schulze ,  Werner Schustereder

IPC: H01L29/16 ,  H01L29/06

Abstract: First dopants are implanted through a larger opening of a first process mask into a silicon carbide body, wherein the larger opening exposes a first surface section of the silicon carbide body. A trench is formed in the silicon carbide body in a second surface section exposed by a smaller opening in a second process mask. The second surface section is a sub-section of the first surface section. The larger opening and the smaller opening are formed self-aligned to each other. At least part of the implanted first dopants form at least one compensation layer portion extending parallel to a trench sidewall.

公开(公告)号：US20200259007A1

公开(公告)日：2020-08-13

申请号：US16864608

申请日：2020-05-01

Applicant: Infineon Technologies AG

Inventor： Anton Mauder ,  Franz-Josef Niedernostheide ,  Christian Philipp Sandow

IPC: H01L29/739 ,  H01L29/78 ,  H01L29/66 ,  H01L29/423 ,  H01L29/10 ,  H01L29/08 ,  H01L29/06

Abstract: A power semiconductor transistor includes: a semiconductor body coupled to a load terminal; a drift region in the semiconductor body and having dopants of a first conductivity type; a first trench extending into the semiconductor body along a vertical direction and including a control electrode electrically insulated from the semiconductor body by an insulator; a second trench extending into the semiconductor body along the vertical direction; a mesa region arranged between the trenches and including a source region electrically connected to the load terminal and a channel region separating the source and drift regions; and a portion of a contiguous plateau region of a second conductivity type arranged in the semiconductor drift region and extending below the trenches and below the channel and source regions, the contiguous plateau region having a plurality of openings aligned below the channel region in a widthwise direction of the channel region.

公开(公告)号：US20200161437A1

公开(公告)日：2020-05-21

申请号：US16193161

申请日：2018-11-16

Applicant: Infineon Technologies AG

Inventor： Andreas Meiser ,  Caspar Leendertz ,  Anton Mauder

IPC: H01L29/40 ,  H01L29/16 ,  H01L29/872 ,  H01L29/78 ,  H01L29/423

Abstract: Embodiments of SiC devices and corresponding methods of manufacture are provided. In some embodiments, the SiC device has shielding regions at the bottom of some gate trenches and non-linear junctions formed with the SiC material at the bottom of other gate trenches. In other embodiments, the SiC device has the shielding regions at the bottom of the gate trenches and arranged in rows which run in a direction transverse to a lengthwise extension of the trenches. In still other embodiments, the SiC device has the shielding regions and the non-linear junctions, and wherein the shielding regions are arranged in rows which run in a direction transverse to a lengthwise extension of the trenches.

公开(公告)号：US10658457B2

公开(公告)日：2020-05-19

申请号：US16290477

申请日：2019-03-01

Applicant: Infineon Technologies AG

Inventor： Alexander Philippou ,  Anton Mauder

IPC: H01L29/66 ,  H01L29/06 ,  H01L27/12 ,  H01L21/762 ,  H01L21/84 ,  H01L21/764 ,  H01L21/02 ,  H01L21/311 ,  H01L27/06 ,  H01L29/10 ,  H01L29/417 ,  H01L29/423 ,  H01L29/739 ,  H01L29/78

Abstract: A power semiconductor device includes a semiconductor-on-insulator island having a semiconductor region and an insulation structure, the insulation structure being formed by an oxide and separating the semiconductor region from a portion of a semiconductor body of the power semiconductor device. The insulation structure includes a sidewall that laterally confines the semiconductor region; a bottom that vertically confines the semiconductor region; and a local deepening that forms at least a part of a transition between the sidewall and the bottom, wherein the local deepening extends further along the extension direction as compared to the bottom.

公开(公告)号：US20190296135A1

公开(公告)日：2019-09-26

申请号：US16424968

申请日：2019-05-29

Applicant: Infineon Technologies AG

Inventor： Anton Mauder ,  Franz-Josef Niedernostheide ,  Christian Philipp Sandow

IPC: H01L29/739 ,  H01L29/10 ,  H01L29/78 ,  H01L29/66 ,  H01L29/423 ,  H01L29/06 ,  H01L29/08

Abstract: A power semiconductor transistor includes: a semiconductor body coupled to a load terminal; a drift region in the semiconductor body and having dopants of a first conductivity type; a first trench extending into the semiconductor body along a vertical direction and including a control electrode electrically insulated from the semiconductor body by an insulator; a second trench extending into the semiconductor body along the vertical direction; a mesa region arranged between the trenches and including a source region electrically connected to the load terminal and a channel region separating the source and drift regions; and a portion of a contiguous plateau region of a second conductivity type arranged in the semiconductor drift region and extending below the trenches and below the channel and source regions, the contiguous plateau region having a plurality of openings aligned below the channel region in a widthwise direction of the channel region.