公开(公告)号：US07220640B2

公开(公告)日：2007-05-22

申请号：US10849671

申请日：2004-05-19

申请人： Ji-Young Kim

发明人： Ji-Young Kim

IPC分类号： H01L21/8242 ,  H01L21/302 ,  H01L21/461

CPC分类号： H01L29/66621 ,  H01L21/823412 ,  H01L21/823437 ,  H01L21/823481 ,  H01L21/823487

摘要： Provided is a method of fabricating a recess transistor in an integrated circuit device. In the provided method, a device isolation region, which contacts to the sidewall of a gate trench and a substrate region remaining between the sidewall of the device isolation region and the sidewall of the gate trench, is etched to expose the remaining substrate region. Thereafter, the exposed portion of the remaining substrate region is removed to form a substantially flat bottom of the gate trench. The recess transistor manufactured by the provided method has the same channel length regardless of the locations of the recess transistor in an active region.

摘要翻译： 提供了一种在集成电路器件中制造凹槽晶体管的方法。 在所提供的方法中，蚀刻与栅极沟槽的侧壁接触的器件隔离区域和残留在器件隔离区域的侧壁与栅极沟槽的侧壁之间的衬底区域，以露出剩余的衬底区域。 此后，去除剩余的衬底区域的暴露部分以形成栅极沟槽的基本平坦的底部。 通过所提供的方法制造的凹槽晶体管具有相同的沟道长度，而与有源区中的凹槽晶体管的位置无关。

公开(公告)号：US20070063270A1

公开(公告)日：2007-03-22

申请号：US11387029

申请日：2006-03-22

申请人： Min-Hee Cho ,  Ji-Young Kim

发明人： Min-Hee Cho ,  Ji-Young Kim

IPC分类号： H01L29/94

CPC分类号： H01L29/66621 ,  H01L21/823481 ,  H01L27/10876 ,  H01L29/78

摘要： A transistor includes a substrate and an isolation region disposed in the substrate. The isolation regions defines an active region comprising upper and lower active regions, the upper active region having a first width and the lower active region having a second width greater than the first width. An insulated gate electrode extends through the upper active region and into the lower active region. Source and drain regions are disposed in the active region on respective first and second sides of the insulated gate electrode. The insulated gate electrode may include an upper gate electrode disposed in the upper active region and a lower gate electrode disposed in the lower active region, wherein the lower gate electrode is wider than the upper gate electrode. Related fabrication methods are described.

摘要翻译： 晶体管包括衬底和设置在衬底中的隔离区。 隔离区域限定包括上部和下部有源区域的有源区域，上部有源区域具有第一宽度，而下部有源区域具有大于第一宽度的第二宽度。 绝缘栅电极延伸穿过上有源区并进入下有源区。 源极和漏极区域设置在绝缘栅电极的相应第一和第二侧上的有源区中。 绝缘栅电极可以包括设置在上有源区中的上栅电极和设置在下有源区中的下栅电极，其中下栅电极比上栅极电极宽。 描述相关的制造方法。

公开(公告)号：US07183600B2

公开(公告)日：2007-02-27

申请号：US10858727

申请日：2004-06-02

申请人： Yong-Jin Kim ,  Kyeong-Koo Chi ,  Chang-Jin Kang ,  Hyoung-Sub Kim ,  Myeong-Cheol Kim ,  Tae-Rin Chung ,  Sung-Hoon Chung ,  Ji-Young Kim

发明人： Yong-Jin Kim ,  Kyeong-Koo Chi ,  Chang-Jin Kang ,  Hyoung-Sub Kim ,  Myeong-Cheol Kim ,  Tae-Rin Chung ,  Sung-Hoon Chung ,  Ji-Young Kim

IPC分类号： H01L29/76

CPC分类号： H01L29/66621 ,  H01L21/823437 ,  H01L27/10876 ,  H01L29/7834

摘要： A semiconductor device includes a plurality of gate trenches, each of which has first inner walls, which face each other in a first direction which is perpendicular to a second direction in which active regions extend, and second inner walls, which face each other in the second direction in which the active regions extends. An isolation layer contacts a gate insulating layer throughout the entire length of the first inner walls of the gate trenches including from entrance portions of the gate trenches to bottom portions of the gate trenches, and a plurality of channel regions are disposed adjacent to the gate insulating layers in the semiconductor substrate along the second inner walls and the bottom portions of the gate trenches.

摘要翻译： 半导体器件包括多个栅极沟槽，每个栅极沟槽具有第一内壁，该第一内壁沿与第一方向相对的第一方向，该第一方向垂直于有源区域延伸的第二方向;以及第二内壁， 活动区域延伸的第二方向。 隔离层在包括从栅极沟槽的入口部分到栅极沟槽的底部的栅极沟槽的整个长度的整个长度上接触栅极绝缘层，并且多个沟道区域邻近栅极绝缘体 沿着第二内壁和栅极沟槽的底部的半导体衬底中的层。

公开(公告)号：US07163865B2

公开(公告)日：2007-01-16

申请号：US10867845

申请日：2004-06-14

申请人： Ji-Young Kim

发明人： Ji-Young Kim

IPC分类号： H01L21/336

CPC分类号： H01L29/66621 ,  H01L29/0657 ,  H01L29/7834

摘要： Embodiments of the invention include sequentially forming a pad oxide film and a mask film on a semiconductor substrate, and then forming an opening for partially exposing the pad oxide film. An undercut region is formed using the mask film as an etch mask, exposing a partial surface of the substrate. A spacer is formed surrounding both sidewalls of the mask film, and a recess is formed in the substrate. A gate oxide film, a gate electrode, a gate insulation film, a gate spacer, and source and drain regions are also formed. A resultant transistor structure has a small open critical dimension that improves process margin and provides uniformity to the recess depth, and removes a requirement that a bottom critical dimension of a subsequently formed self-aligned contact should be small. Degradation of the gate oxide film and increases in leakage current may also be prevented.

摘要翻译： 本发明的实施例包括在半导体衬底上依次形成衬垫氧化膜和掩模膜，然后形成用于部分曝光衬垫氧化膜的开口。 使用掩模膜作为蚀刻掩模形成底切区域，暴露基板的部分表面。 形成围绕掩模膜的两个侧壁的间隔物，并且在基板中形成凹部。 还形成栅极氧化膜，栅极电极，栅极绝缘膜，栅极间隔物以及源极和漏极区域。 所得的晶体管结构具有小的开放临界尺寸，其改善了工艺裕度并且提供了凹部深度的均匀性，并且消除了随后形成的自对准接触的底部临界尺寸应该小的要求。 也可以防止栅极氧化膜的劣化和漏电流的增加。

公开(公告)号：US07146578B2

公开(公告)日：2006-12-05

申请号：US09752393

申请日：2000-12-28

申请人： Ji-Young Kim

发明人： Ji-Young Kim

IPC分类号： G06F3/00

CPC分类号： H04M1/72563 ,  G06F3/0482

摘要： Disclosed is a method for creating a user-customized menu in a portable radio telephone having a menu table in which service menus for a user are stored in association with corresponding indexes. The method comprising the steps of: upon receipt of a user-customized menu creating key, switching an operating mode of the portable radio telephone to a user-customized menu creating mode; receiving a user-customized menu index in the user-customized menu creating mode; after receiving the user-customized menu index, receiving a menu index to be set as menu contents in the user-customized menu index; and after receiving the menu index, storing the menu index in association with the user-customized menu index.

摘要翻译： 公开了一种用于在具有菜单表的便携式无线电话中创建用户定制菜单的方法，其中存储与用户相关联的用户的服务菜单。 该方法包括以下步骤：在接收到用户定制的菜单创建密钥时，将便携式无线电话的操作模式切换到用户定制的菜单创建模式; 在用户自定义菜单创建模式中接收用户定制的菜单索引; 在接收到用户自定义菜单索引之后，接收要在用户自定义菜单索引中设置为菜单内容的菜单索引; 并且在接收到菜单索引之后，存储与用户自定义菜单索引相关联的菜单索引。

公开(公告)号：US20060193794A1

公开(公告)日：2006-08-31

申请号：US11414435

申请日：2006-04-28

申请人： Ji-Young Kim ,  Jong-Ho Kim ,  Sug-Youn Chang ,  Sei-Young Yun

发明人： Ji-Young Kim ,  Jong-Ho Kim ,  Sug-Youn Chang ,  Sei-Young Yun

IPC分类号： A61K8/22

CPC分类号： A61Q11/00 ,  A61K8/0208 ,  A61K8/22 ,  A61K8/24 ,  A61K8/8164 ,  A61K8/817 ,  A61K8/8176 ,  A61K8/8182

摘要： The present invention relates to a dry type tooth-whitening patch comprising peroxide as a tooth whitening agent. In particular, disclosed is a dry type tooth-whitening patch in which peroxide is contained, as a teeth whitening agent, in a matrix type adhesive layer. The adhesive layer includes, as a base polymer thereof, a hydrophilic glass polymer, which provides a strong adhesion to teeth while releasing the tooth whitening agent when hydrated on the enamel layers of teeth in the moist oral cavity. The dry type patch according to the present invention is convenient in use, as compared to wet type patches. Further, it exhibits a superior adhesion while being maintained in a state attached to the teeth for a lengthened period of time so as to assure an enough contact time between the whitening agent in the patch and stains on the teeth, thereby giving a sufficient whitening effect.

公开(公告)号：US20060193793A1

公开(公告)日：2006-08-31

申请号：US11414127

申请日：2006-04-28

申请人： Ji-Young Kim ,  Jong-Ho Kim ,  Sug-Youn Chang ,  Sei-Young Yun ,  Hae-Young Yang ,  Sang-Hoon Kwak

发明人： Ji-Young Kim ,  Jong-Ho Kim ,  Sug-Youn Chang ,  Sei-Young Yun ,  Hae-Young Yang ,  Sang-Hoon Kwak

IPC分类号： A61K8/22

CPC分类号： A61K8/24 ,  A61C19/066 ,  A61K8/0208 ,  A61K8/22 ,  A61K8/8164 ,  A61K8/817 ,  A61K8/8176 ,  A61K8/8182 ,  A61Q11/00

摘要： Disclosed herein is a pair of dry type patches for teeth whitening, having a patch for upper teeth and a patch for lower teeth, in which the patch for upper teeth has a shape different from the patch for lower teeth, and each patch has a controlled width and shape such that the contact area of each patch with gums is minimized. In the patch for upper teeth, a central portion covering right and left upper central incisors is widest. In the patch for lower teeth, either portion covering right and left lower canine teeth is widest. Since the dry type patches covers all the portions of the teeth while minimizing the contact area with gums, no or little irritation is caused and wearability is excellent.

摘要翻译： 本文公开了一种用于牙齿美白的干式贴剂，具有用于上牙的贴片和用于下牙的贴片，其中上牙的贴片具有不同于下牙的贴片的形状，并且每个贴片具有受控制的 宽度和形状使得每个贴片与牙龈的接触面积最小化。 在上牙的补片中，覆盖右上和左上中间门牙的中心部分是最宽的。 在用于下牙的补片中，覆盖右下和右下齿的任一部分是最宽的。 由于干式贴剂覆盖牙齿的所有部分，同时使与牙龈的接触面积最小化，所以不会引起或少量的刺激，并且耐磨性优异。

公开(公告)号：US07091540B2

公开(公告)日：2006-08-15

申请号：US10682492

申请日：2003-10-10

申请人： Ji-Young Kim ,  Jin-Jun Park

发明人： Ji-Young Kim ,  Jin-Jun Park

IPC分类号： H01L27/108

CPC分类号： H01L27/10855 ,  H01L21/76897 ,  H01L27/0207 ,  H01L27/10829 ,  H01L27/10876 ,  H01L27/10888 ,  H01L27/10891 ,  H01L29/66621 ,  H01L29/7834 ,  H01L2924/3011

摘要： A memory cell of a semiconductor device and a method for forming the same, wherein the memory cell includes a substrate having active regions and field regions, a gate layer formed over the substrate, the gate layer including a plurality of access gates formed over the active regions of the substrate and a plurality of pass gates formed over the field regions of the substrate, first self-aligned contact regions formed between adjacent pass gates and access gates, and second self-aligned contact regions formed between adjacent access gates, wherein a width of each of the first self-aligned contact regions is larger than a width of each of the second self-aligned contact regions.

摘要翻译： 半导体器件的存储单元及其形成方法，其中存储单元包括具有有源区和场区的衬底，形成在衬底上的栅极层，栅层包括形成在有源区上的多个存取栅极 衬底的区域和形成在衬底的场区域上的多个通过栅极，形成在相邻栅极和存取栅极之间的第一自对准接触区域和形成在相邻栅极之间的第二自对准接触区域，其中宽度 每个第一自对准接触区域的宽度大于第二自对准接触区域中的每一个的宽度。

公开(公告)号：US20060170039A1

公开(公告)日：2006-08-03

申请号：US11394829

申请日：2006-03-31

申请人： Ji-Young Kim ,  Chang-Sub Lee

发明人： Ji-Young Kim ,  Chang-Sub Lee

IPC分类号： H01L29/94

CPC分类号： H01L29/105 ,  H01L29/1083 ,  H01L29/6659 ,  H01L29/66621 ,  H01L29/7834

摘要： In a method of manufacturing a buried channel type transistor, a trench is formed at a surface portion of a substrate. A first and a second threshold voltage control regions are formed at portions of the substrate beneath a bottom face of the trench and adjacent to a sidewall of the trench, respectively. A gate electrode filling the trench is formed. Source/drain regions are formed at portions of the substrate adjacent to the sidewall of the gate electrode. Stopper regions are formed at portions of the substrate beneath the source/drain regions and beneath the first and second threshold voltage control regions, respectively. The buried channel type transistor has a high breakdown voltage between the source/drain regions although a threshold voltage thereof is low.

摘要翻译： 在埋入沟道型晶体管的制造方法中，在衬底的表面部分形成沟槽。 第一和第二阈值电压控制区分别形成在沟槽的底面下方的衬底的下方并与沟槽的侧壁相邻的部分。 形成填充沟槽的栅电极。 源极/漏极区域形成在与栅电极的侧壁相邻的衬底的部分处。 阻挡区域分别形成在源极/漏极区域下方的衬底的部分处，并分别形成在第一和第二阈值电压控制区域下方。 掩埋沟道型晶体管虽然阈值电压低，但在源极/漏极区域之间具有高的击穿电压。

公开(公告)号：US20050288273A1

公开(公告)日：2005-12-29

申请号：US10774241

申请日：2004-02-06

申请人： Frederick Boyer ,  Allison Choy ,  Louis Chupak ,  Susan Hagen ,  Joysula Venkata Prasad ,  Takushi Kaneko ,  Ji-Young Kim

发明人： Frederick Boyer ,  Allison Choy ,  Louis Chupak ,  Susan Hagen ,  Joysula Venkata Prasad ,  Takushi Kaneko ,  Ji-Young Kim

IPC分类号： A61K31/55 ,  A61P31/04 ,  C07D263/38 ,  C07D413/04 ,  C07D413/06 ,  C07D413/10 ,  C07D413/12 ,  C07D413/14 ,  C07D417/04 ,  C07D417/10 ,  C07D417/14 ,  C07D471/04 ,  C07D498/04

CPC分类号： C07D263/38 ,  C07D413/04 ,  C07D413/06 ,  C07D413/10 ,  C07D413/12 ,  C07D413/14 ,  C07D417/04 ,  C07D417/10 ,  C07D417/14 ,  C07D471/04

摘要： Compounds of formula I and methods for their preparation are disclosed. Further disclosed are methods of making biologically active compounds of formula I as well as pharmaceutically acceptable compositions comprising compounds of formula I. Compounds of formula I as disclosed herein can be used in a variety of applications including use as antibacterial agents.