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95 条记录 (耗时 0.027 秒)

    Circuit arrangement comprising a sample-and-hold device and method for signal processing in a sample-and-hold device
    74.
    发明授权
    Circuit arrangement comprising a sample-and-hold device and method for signal processing in a sample-and-hold device 有权
    电路装置包括采样保持装置和采样保持装置中的信号处理方法

    公开(公告)号：US07724041B2

    公开(公告)日：2010-05-25

    申请号：US11729553

    申请日：2007-03-29

    申请人： Dieter Draxelmayr

    发明人： Dieter Draxelmayr

    IPC分类号： H03K5/00

    CPC分类号： H03M1/168 ,  G11C27/026 ,  H03M1/442

    摘要： In a circuit arrangement including a sample-and-hold device, the sample-and-hold device includes a first, a second, a third and a fourth charge store, and also a first and a second input terminal for feeding in a differential input signal comprising a first and a second component. A differential output signal is output via a first and a second output terminal. The charge stores are charged with the first or the second component of the differential input signal in a first phase of a time segment. In a second phase of the time segment, the differential output signal is generated in a manner dependent on the charges of the first, second, third and fourth charge stores.

    摘要翻译： 在包括采样和保持装置的电路装置中，采样和保持装置包括第一，第二，第三和第四电荷存储器，以及用于馈送差分输入的第一和第二输入端 信号包括第一和第二分量。 差分输出信号通过第一和第二输出端输出。 在时间段的第一阶段，对电荷存储器充满差分输入信号的第一或第二分量。 在时间段的第二阶段中，差分输出信号以取决于第一，第二，第三和第四电荷存储器的电荷的方式产生。

    Circuit configuration for processing a signal of a sensor and method of using the circuit configuration
    77.
    发明授权
    Circuit configuration for processing a signal of a sensor and method of using the circuit configuration 有权
    用于处理传感器信号的电路配置和使用电路配置的方法

    公开(公告)号：US07492149B2

    公开(公告)日：2009-02-17

    申请号：US10446392

    申请日：2003-05-28

    申请人： Mario Motz ,  Dieter Draxelmayr

    发明人： Mario Motz ,  Dieter Draxelmayr

    IPC分类号： G01B7/30

    CPC分类号： G01D5/24452 ,  G01D5/147 ,  G01D5/2448 ,  G01D5/2449 ,  G01R33/0029 ,  G01R33/07

    摘要： A circuit configuration for processing a signal of a sensor includes an amplifier for amplifying the signal of the sensor. This signal has switch-over points between different signal states. The circuit configuration is constructed in such a manner that the amplifier and the sensor operate continuously in a chopper mode. Furthermore, a control loop is provided for determining offset components in the signal of the sensor and for removing the offset components from the signal of the sensor.

    摘要翻译： 用于处理传感器的信号的电路配置包括用于放大传感器的信号的放大器。 该信号在不同信号状态之间具有切换点。 电路结构以放大器和传感器以斩波器模式连续工作的方式构成。 此外，提供控制回路以确定传感器的信号中的偏移分量，并从传感器的信号中去除偏移分量。

    Integrated capacitor structure
    78.
    发明授权
    Integrated capacitor structure 有权
    集成电容器结构

    公开(公告)号：US07485945B2

    公开(公告)日：2009-02-03

    申请号：US11538227

    申请日：2006-10-03

    申请人： Peter Baumgartner ,  Philipp Riess ,  Thomas Benetik ,  Dieter Draxelmayr

    发明人： Peter Baumgartner ,  Philipp Riess ,  Thomas Benetik ,  Dieter Draxelmayr

    IPC分类号： H01L29/00

    CPC分类号： H01L27/0805 ,  H01L23/5223 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor component includes an integrated capacitor structure embodied at least partly in an electrically conductive plane and which is patterned such that a multiplicity of strip elements are present. A first group of strip elements constitutes a first electrode of the capacitor structure and a second group of strip elements constitutes a second electrode of the capacitor structure. The first strip elements together with the second strip elements being at least partly interlinked in one another, and at least one strip element may have a non-constant width along its length.

    摘要翻译： 半导体部件包括至少部分地在导电平面中实现的集成电容器结构，并且被图案化以使得存在多个带​​状元件。 第一组带状元件构成电容器结构的第一电极，第二组带状元件构成电容器结构的第二电极。 第一带状元件与第二带状元件一起至少部分地彼此连接，并且至少一个带状元件沿其长度可以具有不恒定的宽度。

    Circuit arrangement for voltage regulation
    79.
    发明申请
    Circuit arrangement for voltage regulation 有权
    电压调节电路

    公开(公告)号：US20070103129A1

    公开(公告)日：2007-05-10

    申请号：US11586417

    申请日：2006-10-25

    申请人： Dieter Draxelmayr

    发明人： Dieter Draxelmayr

    IPC分类号： G05F1/00

    CPC分类号： G05F1/575

    摘要： A circuit arrangement for voltage regulation comprises an output, a controllable output transistor connected to the output, an error detection circuit, and a monitoring control circuit. A voltage-regulated output potential can be tapped off the output, the controllable output transistor is connected to the output on a load side and the output transistor comprises a control terminal. The error detection circuit provides a regulating signal if a deviation between the output potential or a potential derived from the output potential and a desired value occurs. By means of the regulating signal the control terminal can be charged or discharged dependent on the deviation and the monitoring control circuit monitors the regulating signal and performs, if the regulating signal lies outside a predetermined range, an additional charging or discharging of the control terminal until the regulating signal lies within the predetermined range.

    摘要翻译： 用于电压调节的电路装置包括输出，连接到输出的可控输出晶体管，误差检测电路和监视控制电路。 电压调节输出电位可从输出端分出，可控输出晶体管连接到负载侧的输出，输出晶体管包括控制端。 如果出现输出电位或从输出电位导出的电位与期望值之间的偏差，则误差检测电路提供调节信号。 通过调节信号，控制端子可以根据偏差进行充电或放电，并且监视控制电路监视调节信号，并且如果调节信号位于预定范围之外，则执行控制终端的附加充电或放电直到 调节信号处于预定范围内。

    Multi-channel digital/analog converter arrangement
    80.
    发明申请
    Multi-channel digital/analog converter arrangement 有权
    多通道数/模转换器布置

    公开(公告)号：US20070001888A1

    公开(公告)日：2007-01-04

    申请号：US11477575

    申请日：2006-06-29

    申请人： Dieter Draxelmayr

    发明人： Dieter Draxelmayr

    IPC分类号： H03M1/12

    CPC分类号： H03M1/662 ,  H03K17/005 ,  H03M1/661 ,  H03M1/742

    摘要： A multi-channel digital/analog converter arrangement comprises at least two data channels for receiving and forwarding a corresponding number of digital data input signals comprising respective time characteristics, a digital multiplexer generating a digital intermediate signal present at a common node by combining the at least two digital data input signals, and a digital/analog converter connected downstream of the multiplexer for converting the digital intermediate signal into an analog output signal. The multiplexer comprises a tuning device for tuning the time characteristics of the at least two digital data input signals in respect to each other.

    摘要翻译： 多通道数字/模拟转换器装置包括至少两个数据通道，用于接收和转发包括各自的时间特性的相应数量的数字数据输入信号，数字多路复用器通过组合至少一个公共节点产生存在于公共节点上的数字中间信号 两个数字数据输入信号和连接在多路复用器下游的数/模转换器，用于将数字中间信号转换为模拟输出信号。 多路复用器包括用于相对于彼此调整至少两个数字数据输入信号的时间特性的调谐装置。