公开(公告)号：US08493748B2

公开(公告)日：2013-07-23

申请号：US11769520

申请日：2007-06-27

申请人： Zigmund Ramirez Camacho ,  Henry Descalzo Bathan ,  Lionel Chien Hui Tay ,  Jeffrey D. Punzalan

发明人： Zigmund Ramirez Camacho ,  Henry Descalzo Bathan ,  Lionel Chien Hui Tay ,  Jeffrey D. Punzalan

IPC分类号： H05K5/02 ,  H05K7/18

CPC分类号： H01L23/49551 ,  H01L23/047 ,  H01L23/49861 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/3011 ,  H01L2924/3025 ,  H04R31/00 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012

摘要： A packaging system comprising: forming terminal leads; configuring a cavity by partially encapsulating the terminal leads with a compound; attaching an integrated circuit device, a micro-electromechanical system, a micro-mechanical system, or a combination thereof in the cavity; and bonding a cover to the terminal leads for enclosing the cavity.

摘要翻译： 一种包装系统，包括：形成端子引线; 通过用化合物部分地封装端子引线来配置空腔; 在空腔中附接集成电路器件，微机电系统，微机械系统或其组合; 以及将盖结合到用于封闭空腔的端子引线。

公开(公告)号：US08399991B2

公开(公告)日：2013-03-19

申请号：US12858602

申请日：2010-08-18

申请人： Henry Descalzo Bathan ,  Zigmund Ramirez Camacho ,  Lionel Chien Hui Tay ,  Arnel Senosa Trasporto

发明人： Henry Descalzo Bathan ,  Zigmund Ramirez Camacho ,  Lionel Chien Hui Tay ,  Arnel Senosa Trasporto

IPC分类号： H01L23/48 ,  H01L23/498

CPC分类号： H01L24/97 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3107 ,  H01L24/19 ,  H01L24/82 ,  H01L24/96 ,  H01L2224/04105 ,  H01L2224/24137 ,  H01L2224/82001 ,  H01L2224/82039 ,  H01L2224/97 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2224/82 ,  H01L2924/00

摘要： A semiconductor wafer contains a plurality of semiconductor die. The semiconductor wafer is diced to separate the semiconductor die. The semiconductor die are transferred onto a carrier. A die extension region is formed around a periphery of the semiconductor die on the carrier. The carrier is removed. A plurality of through hole vias (THV) is formed in first and second offset rows in the die extension region. A conductive material is deposited in the THVs. A first RDL is formed between contact pads on the semiconductor die and the THVs. A second RDL is formed on a backside of the semiconductor die in electrical contact with the THVs. An under bump metallization is formed in electrical contact with the second RDL. Solder bumps are formed on the under bump metallization. The die extension region is singulated to separate the semiconductor die.

摘要翻译： 半导体晶片包含多个半导体管芯。 切割半导体晶片以分离半导体管芯。 将半导体管芯转移到载体上。 在载体上的半导体管芯的周围形成管芯延伸区域。 载体被移除。 在管芯延伸区域中的第一和第二偏移行中形成多个通孔通孔（THV）。 导电材料沉积在THV中。 第一RDL形成在半导体管芯上的接触焊盘和THV之间。 第二RDL形成在与THV电接触的半导体管芯的背面上。 形成与第二RDL电接触的凸块下金属化。 在凸块下方形成焊料凸块。 单芯片延伸区域以分离半导体管芯。

公开(公告)号：US08362601B2

公开(公告)日：2013-01-29

申请号：US12328764

申请日：2008-12-04

申请人： Zigmund Ramirez Camacho ,  Henry Descalzo Bathan ,  Jeffrey D. Punzalan ,  Lionel Chien Hui Tay

发明人： Zigmund Ramirez Camacho ,  Henry Descalzo Bathan ,  Jeffrey D. Punzalan ,  Lionel Chien Hui Tay

IPC分类号： H01L21/60 ,  H01L23/495

CPC分类号： H01L23/4951 ,  H01L23/49503 ,  H01L23/49541 ,  H01L24/27 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/05554 ,  H01L2224/2919 ,  H01L2224/32057 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48465 ,  H01L2224/4847 ,  H01L2224/4911 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/4945 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2224/83856 ,  H01L2224/85191 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01014 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A method of manufacture of a wire-on-lead package system includes: providing a die attach paddle with paddle extensions distributed along the periphery of the die attach paddle, providing leadfingers surrounding the die attach paddle, attaching a semiconductor die to the die attach paddle wherein the semiconductor die is larger than the die attach paddle, and connecting bond wires between the semiconductor die and the leadfingers and between the semiconductor die and the paddle extensions.

摘要翻译： 一种线引线封装系统的制造方法包括：提供具有沿芯片附接板周边分布的焊盘延伸部的管芯附接焊盘，提供围绕管芯附接焊盘的引线管，将半导体管芯附接到管芯附着焊盘 其中所述半导体管芯大于所述管芯附接焊盘，以及在所述半导体管芯和引线管之间以及所述半导体管芯和所述焊盘延伸部之间连接接合线。

公开(公告)号：US08269324B2

公开(公告)日：2012-09-18

申请号：US12172095

申请日：2008-07-11

申请人： Arnel Senosa Trasporto ,  Zigmund Ramirez Camacho ,  Lionel Chien Hui Tay ,  Jose Alvin Caparas

发明人： Arnel Senosa Trasporto ,  Zigmund Ramirez Camacho ,  Lionel Chien Hui Tay ,  Jose Alvin Caparas

IPC分类号： H01L23/495 ,  H01L21/60

CPC分类号： H01L23/49503 ,  H01L23/3107 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49575 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05553 ,  H01L2224/05599 ,  H01L2224/32014 ,  H01L2224/32057 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/18301 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： An integrated circuit package system includes: providing a lead having a lead connection surface for connectivity to a next level system; attaching an integrated circuit over the lead having the lead connection surface substantially within a region below a perimeter of the integrated circuit without a die paddle, a substrate conductor, or a redistribution layer; and attaching a die connector to the integrated circuit and the lead.

摘要翻译： 集成电路封装系统包括：提供具有用于连接到下一级系统的引线连接表面的引线; 在所述引线上附接集成电路，所述引线具有大致在所述集成电路的周边以下的区域内的引线连接表面，而没有管芯焊盘，衬底导体或再分布层; 并将管芯连接器连接到集成电路和引线。

公开(公告)号：US08203220B2

公开(公告)日：2012-06-19

申请号：US12797922

申请日：2010-06-10

申请人： Lionel Chien Hui Tay ,  Zigmund Ramirez Camacho ,  Jeffrey D. Punzalan ,  Arnel Trasporto

发明人： Lionel Chien Hui Tay ,  Zigmund Ramirez Camacho ,  Jeffrey D. Punzalan ,  Arnel Trasporto

IPC分类号： H01L23/02 ,  H01L21/00

CPC分类号： H01L23/49575 ,  H01L23/49541 ,  H01L23/49548 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01027 ,  H01L2924/01076 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A method for manufacturing an integrated circuit package system includes: forming a first device unit, having first external interconnects arranged along a perimeter of the first device unit, and a second device unit, having second external interconnects arranged along a perimeter of the second device unit, in an array configuration; mounting an integrated circuit die over the first device unit; connecting the integrated circuit die and the first external interconnects; encapsulating with an encapsulation covering the integrated circuit die, the first device unit, and the second device unit with both the first external interconnects and the second external interconnects partially exposed; and forming a partial encapsulation cut in the encapsulation electrically isolating the first external interconnects and the second electrical interconnects.

摘要翻译： 一种用于制造集成电路封装系统的方法，包括：形成具有沿着第一器件单元的周边布置的第一外部互连的第一器件单元和具有沿第二器件单元的周边布置的第二外部互连的第二器件单元 ，在阵列配置中; 在第一设备单元上安装集成电路管芯; 连接集成电路管芯和第一外部互连件; 封装了覆盖集成电路管芯，第一器件单元和第二器件单元的封装，其中第一外部互连和第二外部互连部分地被部分地暴露; 以及在所述封装中形成电隔离所述第一外部互连和所述第二电互连的部分封装切割。

公开(公告)号：US08134242B2

公开(公告)日：2012-03-13

申请号：US12185616

申请日：2008-08-04

申请人： Zigmund Ramirez Camacho ,  Arnel Senosa Trasporto ,  Reza Argenty Pagaila ,  Lionel Chien Hui Tay

发明人： Zigmund Ramirez Camacho ,  Arnel Senosa Trasporto ,  Reza Argenty Pagaila ,  Lionel Chien Hui Tay

IPC分类号： H01L23/28

CPC分类号： H01L21/568 ,  H01L23/3107 ,  H01L24/48 ,  H01L2224/32245 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/85001 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： An integrated circuit package system includes: connecting a concave terminal and an integrated circuit; and forming an encapsulation, having a bottom side, over the integrated circuit and the concave terminal with the concave terminal within the encapsulation.

摘要翻译： 集成电路封装系统包括：连接凹端和集成电路; 并且在封装内形成具有底侧的集成电路和具有凹形端子的凹形端子的封装。

公开(公告)号：US07977778B2

公开(公告)日：2011-07-12

申请号：US11744697

申请日：2007-05-04

申请人： Henry Descalzo Bathan ,  Lionel Chien Hui Tay ,  Zigmund Ramirez Camacho

发明人： Henry Descalzo Bathan ,  Lionel Chien Hui Tay ,  Zigmund Ramirez Camacho

IPC分类号： H01L23/02 ,  H01L23/04 ,  H01L23/29

CPC分类号： H01L23/49503 ,  H01L23/49551 ,  H01L24/48 ,  H01L24/49 ,  H01L29/0657 ,  H01L2224/05554 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/10158 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： An integrated circuit package system is provided including forming an integrated circuit die, forming an interference-fit feature in the integrated circuit die, fitting a support element within the interference-fit feature, connecting an external interconnect and the integrated circuit die, and encapsulating the integrated circuit die.

摘要翻译： 提供了一种集成电路封装系统，包括形成集成电路管芯，在集成电路管芯中形成干涉配合特征，将支撑元件装配在干涉配合特征内，连接外部互连和集成电路管芯，并封装 集成电路管芯。

公开(公告)号：US20110129965A1

公开(公告)日：2011-06-02

申请号：US13023329

申请日：2011-02-08

申请人： Zigmund Ramirez Camacho ,  Dioscoro A. Merilo ,  Lionel Chien Hui Tay

发明人： Zigmund Ramirez Camacho ,  Dioscoro A. Merilo ,  Lionel Chien Hui Tay

IPC分类号： H01L21/60

CPC分类号： H01L23/49541 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/4951 ,  H01L23/49513 ,  H01L23/49548 ,  H01L23/49568 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L24/97 ,  H01L2221/68345 ,  H01L2224/29007 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/8385 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/078 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/01028 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method for manufacturing a semiconductor package system includes: providing a leadframe, having an open center, with leads adjacent to a peripheral edge of the leadframe; making a die support pad, formed without tie bars, separately from the leadframe; providing a coverlay tape for positioning the support pad centered within the leadframe; attaching a semiconductor die to the die support pad through a die attach adhesive, the semiconductor die being spaced from the leads; and connecting a bonding pad on the semiconductor die to one of the leads using a bonding wire.

摘要翻译： 一种用于制造半导体封装系统的方法，包括：提供具有开放中心的引线框架，其具有与引线框架的周边边缘相邻的引线; 制成与引线框分开形成的没有连接条的模具支撑垫; 提供用于将所述支撑垫定位在所述引线框内的中心的覆盖带; 通过管芯附着粘合剂将半导体管芯附接到管芯支撑焊盘，半导体管芯与引线间隔开; 以及使用接合线将半导体管芯上的接合焊盘连接到引线之一。

公开(公告)号：US07919848B2

公开(公告)日：2011-04-05

申请号：US11833898

申请日：2007-08-03

申请人： Zigmund Ramirez Camacho ,  Henry Descalzo Bathan ,  Abelardo Jr Hadap Advincula ,  Lionel Chien Hui Tay

发明人： Zigmund Ramirez Camacho ,  Henry Descalzo Bathan ,  Abelardo Jr Hadap Advincula ,  Lionel Chien Hui Tay

IPC分类号： H01L23/495 ,  H01L21/56

CPC分类号： H01L23/49548 ,  H01L21/563 ,  H01L23/3107 ,  H01L23/49575 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/48247 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2224/85 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00

摘要： An integrated circuit package system includes: forming a die-attach paddle, an outer interconnect, and an inner interconnect toward the die-attach paddle beyond the outer interconnect; mounting an integrated circuit device over the die-attach paddle; connecting the integrated circuit device to the inner interconnect and the outer interconnect; encapsulating the integrated circuit device over the die-attach paddle; attaching an external interconnect under the outer interconnect; and attaching a circuit device under the die-attach paddle and extended laterally beyond opposite sides of the die-attach paddle.

摘要翻译： 集成电路封装系统包括：形成管芯附接焊盘，外部互连和内部互连，使芯片附着焊盘超出外部互连; 将集成电路装置安装在芯片附接板上; 将集成电路装置连接到内部互连和外部互连; 将所述集成电路器件封装在所述管芯附接焊盘上; 在外部互连下方附加外部互连; 以及将电路装置附接在所述管芯附接桨下方并且横向延伸超过所述管芯附着桨的相对侧。

公开(公告)号：US20110068448A1

公开(公告)日：2011-03-24

申请号：US12564852

申请日：2009-09-22

申请人： Zigmund Ramirez Camacho ,  Lionel Chien Hui Tay ,  Henry Descalzo Bathan ,  Guruprasad Badakere Govindaiah

发明人： Zigmund Ramirez Camacho ,  Lionel Chien Hui Tay ,  Henry Descalzo Bathan ,  Guruprasad Badakere Govindaiah

IPC分类号： H01L23/495 ,  H01L21/60

CPC分类号： H01L24/48 ,  H01L23/4334 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/5286 ,  H01L24/29 ,  H01L2224/05554 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/078 ,  H01L2924/10157 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A method of manufacture of an integrated circuit packaging system includes: attaching a semiconductor die to a die pad of a leadframe; forming a cap layer on top of the semiconductor die for acting as a ground plane or a power plane; and connecting the semiconductor die to the cap layer through a cap bonding wire.

摘要翻译： 一种集成电路封装系统的制造方法，包括：将半导体管芯附接到引线框架的管芯焊盘; 在所述半导体管芯的顶部上形成盖层，用作接地层或电源层; 以及通过盖接合线将半导体管芯连接到盖层。