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    EMPTY PAGE SCAN OPERATIONS ADJUSTMENT
    72.
    发明公开
    EMPTY PAGE SCAN OPERATIONS ADJUSTMENT 审中-公开

    公开(公告)号：US20240061600A1

    公开(公告)日：2024-02-22

    申请号：US17889757

    申请日：2022-08-17

    Applicant: Micron Technology, Inc.

    Inventor： Peng Zhang ,  Murong Lang ,  Christina Papagianni ,  Zhenming Zhou

    IPC: G06F3/06

    CPC classification number: G06F3/0644 ,  G06F3/0655 ,  G06F3/0604 ,  G06F3/0679

    Abstract: Aspects of the present disclosure configure a system component, such as memory sub-system controller, to perform empty page scan operations. The controller selects a portion of the set of memory components that is empty and ready to be programmed. The controller reads one or more signals from the selected portion of the set of memory components. The controller generates an error count value representing whether the portion of the set of memory components is valid for programming based on a result of reading the one or more signals from the selected portion. The controller updates a scan frequency for performing the empty page scan operations for the portion of the set of memory components based on the error count value.

    READ WINDOW MANAGEMENT IN A MEMORY SYSTEM
    73.
    发明公开
    READ WINDOW MANAGEMENT IN A MEMORY SYSTEM 审中-公开

    公开(公告)号：US20240021264A1

    公开(公告)日：2024-01-18

    申请号：US17812612

    申请日：2022-07-14

    Applicant: Micron Technology, Inc.

    Inventor： Li-Te Chang ,  Murong Lang ,  Zhenming Zhou ,  Ting Luo

    IPC: G11C29/52 ,  G11C29/50 ,  G11C29/00

    CPC classification number: G11C29/52 ,  G11C29/50004 ,  G11C29/783

    Abstract: Methods, systems, and devices for read window management in a memory system are described. A memory system may determine, for a set of memory cells, a first value for a read window that is associated with a set of one or more threshold voltages each representing a different multi-bit value. The memory system may then use the first value for the read window to predict a second value for the read window. Based on the second value for the read window, the memory system may predict an error rate for the set of memory cells. The memory system may then set a value for an offset for a threshold voltage of the set of one or more threshold voltages based on the error rate.

    Memory sub-system temperature throttling relaxation
    77.
    发明授权
    Memory sub-system temperature throttling relaxation 有权

    公开(公告)号：US11635794B2

    公开(公告)日：2023-04-25

    申请号：US16988854

    申请日：2020-08-10

    Applicant: Micron Technology, Inc.

    Inventor： Mikai Chen ,  Zhenming Zhou ,  Zhenlei Shen ,  Murong Lang

    IPC: G05D23/00 ,  G06F1/20 ,  G06F11/30

    Abstract: A method includes monitoring temperature characteristics for a plurality of memory components of a memory sub-system and determining that a temperature characteristic corresponding to at least one of the memory components has reached a threshold temperature. The method further includes determining a data reliability parameter for the at least one of the memory components that has reached the threshold temperature, determining whether the determined data reliability parameter is below a threshold data reliability parameter value for the at least one of the memory components that has reached the threshold temperature, and, based on determining that the data reliability parameter for the at least one of the memory components that has reached the threshold temperature is below the threshold data reliability parameter value, refraining from performing a thermal throttling operation.

    ADAPTIVELY PERFORMING MEDIA MANAGEMENT OPERATIONS ON A MEMORY DEVICE
    78.
    发明申请
    ADAPTIVELY PERFORMING MEDIA MANAGEMENT OPERATIONS ON A MEMORY DEVICE 有权

    公开(公告)号：US20230059589A1

    公开(公告)日：2023-02-23

    申请号：US17445293

    申请日：2021-08-17

    Applicant: Micron Technology, Inc.

    Inventor： Mikai Chen ,  Murong Lang ,  Zhenming Zhou

    IPC: G06F3/06 ,  G06F12/02

    Abstract: A respective write cycle count for each of a plurality of data units of a memory device is obtained. Based on the respective write cycle count, whether a data unit of the plurality of data units satisfies a media management criterion is determined. Responsive to determining that the respective write cycle count satisfies the media management criterion, a media management operation every first constant cycle count on the data unit is performed. Responsive to determining that the respective write cycle count does not satisfy the media management criterion, a media management operation every second constant cycle count on the data unit is performed. The second constant cycle count is less than the first constant count.

    ADAPTIVE FREQUENCY CONTROL FOR HIGH-SPEED MEMORY DEVICES
    79.
    发明申请
    ADAPTIVE FREQUENCY CONTROL FOR HIGH-SPEED MEMORY DEVICES 有权

    公开(公告)号：US20230011150A1

    公开(公告)日：2023-01-12

    申请号：US17933443

    申请日：2022-09-19

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Jian Huang ,  Zhenming Zhou ,  Zhongguang Xu ,  Murong Lang

    IPC: G06F11/07 ,  G11C16/26 ,  G06F11/10

    Abstract: A command to read specific data stored at a memory die is received. A read operation is performed while operating both a memory controller and the memory die simultaneously at a first frequency. A processor determines whether a first error rate associated with the memory die satisfies a first error threshold criterion (e.g., UECC). Responsive to determining that the first error rate satisfies the first error threshold criterion, the read operation is repeated while operating at least one of the memory controller or the memory die at a second frequency that is different from the first frequency. The processor determines whether a second error rate associated with the memory die satisfies a second error threshold criterion. Responsive to determining that the second error rate satisfies the second error threshold criterion (e.g. UECC persists), determining that the read operation has failed.

    Adaptive application of voltage pulses to stabilize memory cell voltage levels
    80.
    发明授权
    Adaptive application of voltage pulses to stabilize memory cell voltage levels 有权

    公开(公告)号：US11538521B2

    公开(公告)日：2022-12-27

    申请号：US17222949

    申请日：2021-04-05

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Murong Lang ,  Tingjun Xie ,  Zhenming Zhou

    IPC: G11C7/10 ,  G11C13/00 ,  H01L27/24

    Abstract: A method is disclosed that includes causing a first set of a plurality of voltage pulses to be applied to memory cells of a memory device, a voltage pulse of the first set of the voltage pulses placing the memory cells of the memory device at a voltage level associated with a defined voltage state. The method also includes determining a set of bit error rates associated with the memory cells of the memory device in view of a data mapping pattern for the memory cells of the memory device, wherein the data mapping pattern assigns a voltage level associated with a reset state to at least a portion of the memory cells of the memory device. The method further includes determining whether to apply one or more second sets of the voltage pulses to the memory cells of the memory device in view of a comparison between the set of bit error rates for the memory cells and a previously measured set of bit error rates for the memory cells.

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