公开(公告)号：US20180308861A1

公开(公告)日：2018-10-25

申请号：US16023124

申请日：2018-06-29

Applicant: Micron Technology, Inc.

Inventor： Sudip Bandyopadhyay ,  Keen Wah Chow ,  Devesh Kumar Datta ,  Anurag Jindal ,  David Ross Economy ,  John Mark Meldrim

IPC: H01L27/11582 ,  H01L23/532 ,  H01L27/11524 ,  H01L27/11556 ,  H01L23/528

Abstract: Some embodiments include a memory assembly having memory cells proximate a conductive source. Channel material extends along the memory cells and is electrically coupled with the conductive source. The conductive source is over an insulative material and includes an adhesion material directly against the insulative material. The adhesion material comprises one or more of metal, silicon nitride, silicon oxynitride, silicon carbide, metal silicide, metal carbide, metal oxide, metal oxynitride and metal nitride. The conductive source includes metal-containing material over and directly against the adhesion material. The metal-containing material consists essentially of metal. The conductive source includes a metal-and-nitrogen-containing material over and directly against the metal-containing material, and includes a conductively-doped semiconductor material over the metal-and-nitrogen-containing material.

公开(公告)号：US10014319B1

公开(公告)日：2018-07-03

申请号：US15679499

申请日：2017-08-17

Applicant: Micron Technology, Inc.

Inventor： Sudip Bandyopadhyay ,  Keen Wah Chow ,  Devesh Kumar Datta ,  Anurag Jindal ,  David Ross Economy ,  John Mark Meldrim

IPC: H01L27/11582 ,  H01L23/532 ,  H01L27/11556 ,  H01L23/528

CPC classification number: H01L27/11582 ,  H01L23/528 ,  H01L23/53266 ,  H01L27/11524 ,  H01L27/11556

Abstract: Some embodiments include a memory assembly having memory cells proximate a conductive source. Channel material extends along the memory cells and is electrically coupled with the conductive source. The conductive source is over an insulative material and includes an adhesion material directly against the insulative material. The adhesion material comprises one or more of metal, silicon nitride, silicon oxynitride, silicon carbide, metal silicide, metal carbide, metal oxide, metal oxynitride and metal nitride. The conductive source includes metal-containing material over and directly against the adhesion material. The metal-containing material consists essentially of metal. The conductive source includes a metal-and-nitrogen-containing material over and directly against the metal-containing material, and includes a conductively-doped semiconductor material over the metal-and-nitrogen-containing material.

公开(公告)号：US09773807B1

公开(公告)日：2017-09-26

申请号：US15455859

申请日：2017-03-10

Applicant: Micron Technology, Inc.

Inventor： Sudip Bandyopadhyay ,  Keen Wah Chow ,  Devesh Kumar Datta ,  Anurag Jindal ,  David Ross Economy ,  John Mark Meldrim

IPC: H01L27/115 ,  H01L27/11582 ,  H01L27/11556 ,  H01L23/528 ,  H01L23/532

CPC classification number: H01L27/11582 ,  H01L23/528 ,  H01L23/53266 ,  H01L27/11524 ,  H01L27/11556

Abstract: Some embodiments include a memory assembly having memory cells proximate a conductive source. Channel material extends along the memory cells and is electrically coupled with the conductive source. The conductive source is over an insulative material and includes an adhesion material directly against the insulative material. The adhesion material comprises one or more of metal, silicon nitride, silicon oxynitride, silicon carbide, metal silicide, metal carbide, metal oxide, metal oxynitride and metal nitride. The conductive source includes metal-containing material over and directly against the adhesion material. The metal-containing material consists essentially of metal. The conductive source includes a metal-and-nitrogen-containing material over and directly against the metal-containing material, and includes a conductively-doped semiconductor material over the metal-and-nitrogen-containing material.

公开(公告)号：US20160308018A1

公开(公告)日：2016-10-20

申请号：US14688387

申请日：2015-04-16

Applicant: Micron Technology, Inc.

Inventor： Yushi Hu ,  John Mark Meldrim ,  Eric Blomiley ,  Everett Allen McTeer ,  Matthew J. King

IPC: H01L29/49 ,  H01L21/28 ,  H01L29/66 ,  H01L29/06 ,  H01L29/78

CPC classification number: H01L29/4933 ,  H01L21/28061 ,  H01L21/28097 ,  H01L29/0649 ,  H01L29/4975 ,  H01L29/66477 ,  H01L29/78

Abstract: Some embodiments disclose a gate stack having a gate (e.g., polysilicon (poly) material) horizontally between shallow trench isolations (STIs), a tungsten silicide (WSix) material over the gate and the STIs, and a tungsten silicon nitride (WSiN) material on a top surface of the WSix material. Some embodiments disclose a gate stack having a gate between STIs, a first WSix material over the gate and the STIs, a WSiN interlayer material on a top surface of the first WSix material, and a second WSix material on a top surface of the WSiN interlayer material. Additional embodiments are disclosed.

Abstract translation: 一些实施例公开了在栅极和STI之间的浅沟槽隔离（STI），硅化钨（WSix）材料之间水平地具有栅极（例如，多晶硅（多晶）材料）的栅极堆叠以及氮化钨（WSiN）材料 在WSix材料的顶面。 一些实施例公开了一种栅极堆叠，其具有在STI之间的栅极，栅极上的第一WSix材料和STI，在第一WSix材料的顶表面上的WSiN夹层材料，以及在WSiN中间层的顶表面上的第二WSix材料 材料。 公开了其他实施例。

公开(公告)号：US20160204205A1

公开(公告)日：2016-07-14

申请号：US14989097

申请日：2016-01-06

Applicant: Micron Technology, Inc.

Inventor： John Mark Meldrim ,  Yushi Hu ,  Yongjun Jeff Hu ,  Everett Allen McTeer

IPC: H01L29/167 ,  H01L27/115 ,  H01L29/792 ,  H01L29/08 ,  C30B29/38 ,  H01L29/04 ,  H01L29/45 ,  C30B23/02 ,  C30B25/02 ,  H01L29/788 ,  H01L29/66

CPC classification number: C30B29/38 ,  C30B23/02 ,  C30B25/02 ,  H01L21/2257 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11582 ,  H01L29/7926

Abstract: Various embodiments include methods and apparatuses comprising methods for formation of and apparatuses including a source material for electronic devices. One such apparatus includes a vertical string of memory cells comprising a plurality of alternating levels of conductor and dielectric material, a semiconductor material extending through the plurality of alternating levels of conductor material and dielectric material, and a source material coupled to the semiconductor material. The source material includes a titanium nitride layer and a source polysilicon layer in direct contact with the titanium nitride layer. Other methods and apparatuses are disclosed.

Abstract translation: 各种实施例包括包括用于形成电子设备的源材料和包括用于电子设备的源材料的设备的方法的方法和设备。 一种这样的设备包括垂直的存储单元串，其包括多个交替电平的导体和电介质材料，延伸穿过导体材料和电介质材料的多个交替层级的半导体材料以及耦合到半导体材料的源材料。 源材料包括与氮化钛层直接接触的氮化钛层和源极多晶硅层。 公开了其他方法和装置。