公开(公告)号：US06593642B2

公开(公告)日：2003-07-15

申请号：US09987257

申请日：2001-11-14

申请人： Mako Okamoto ,  Yasuhiko Taito ,  Fukashi Morishita ,  Akira Yamazaki ,  Nobuyuki Fujii

发明人： Mako Okamoto ,  Yasuhiko Taito ,  Fukashi Morishita ,  Akira Yamazaki ,  Nobuyuki Fujii

IPC分类号： G01F110

CPC分类号： H01L27/10897 ,  G11C11/4074 ,  H01L27/0218

摘要： A DRAM is provided at a portion relating to generation of a boosted potential with a filter circuit located between a detector circuit and a ring oscillator for removing a pulse-like change in level from an output signal of the detector circuit. Accordingly, temporary stop of the charge pump circuit can be prevented even when the boosted potential exceeds in a pulse-like manner the reference potential at the vicinity of the output node of the charge pump circuit, and the boosted potential can be rapidly restored to the reference potential.

摘要翻译： 在与产生升压电位有关的部分中提供DRAM，该滤波电路位于检测器电路和环形振荡器之间，用于从检测器电路的输出信号中去除脉冲状的电平变化。 因此，即使当升压电位以类似脉冲的方式超过电荷泵电路的输出节点附近的基准电位时，也可以防止电荷泵电路的暂时停止，并且可以将升压电位迅速恢复到 参考潜力。

公开(公告)号：US06515934B2

公开(公告)日：2003-02-04

申请号：US09986973

申请日：2001-11-13

申请人： Mako Kobayashi ,  Fukashi Morishita

发明人： Mako Kobayashi ,  Fukashi Morishita

IPC分类号： G11C700

CPC分类号： G11C5/145 ,  G11C8/18

摘要： When a tuning mode signal VTUNE is activated, control clock signal TCLK is output, and counter counts up tuning signals TSIG1 to TSIG4. Tuning circuits render conductive the terminals of respective transistors, and reference potential Vref lowers in accordance with the reduction in the resistance value. When reference potential Vref attains equal to the external reference potential Ext.Vref, differential amplifier circuit stops output of the control clock signal TCLK. In accordance with the plurality of the determined tuning signals TSIG1 to TSIG4, fuse elements inside the tuning circuits are programmed.

公开(公告)号：US06333669B1

公开(公告)日：2001-12-25

申请号：US09191122

申请日：1998-11-13

申请人： Mako Kobayashi ,  Fukashi Morishita

发明人： Mako Kobayashi ,  Fukashi Morishita

IPC分类号： G01R2306

CPC分类号： G05F1/465

摘要： The voltage converting circuit 10 includes a standby VDC, an active VDC which operates when the semiconductor integrated circuit device is activated and has current drivability larger than that of standby VDC, and a drivability control circuit. Drivability control circuit generates a control signal in accordance with operational frequency of the semiconductor integrated circuit device. Current drivability of the active the VDC is controlled in accordance with the operational frequency by the control signal.

摘要翻译： 电压转换电路10包括待机VDC，当半导体集成电路器件被激活并且具有大于备用VDC的电流驱动能力时工作的有源VDC和驾驶性能控制电路。 可驱动性控制电路根据半导体集成电路器件的工作频率产生控制信号。 根据操作频率由控制信号控制有源VDC的电流驱动能力。

公开(公告)号：US06329873B2

公开(公告)日：2001-12-11

申请号：US09739227

申请日：2000-12-19

申请人： Fukashi Morishita

发明人： Fukashi Morishita

IPC分类号： G05F110

CPC分类号： G05F1/465

摘要： An internal power supply voltage generation circuit includes a main amplifier that supplies a current from an external power supply node to an internal power supply line in accordance with the difference between a reference voltage from a reference voltage generation circuit and an internal power supply voltage on the internal power supply line. The current supply amount by the main amplifier is adjusted by a level adjust circuit, according to the difference between the external power supply voltage and the reference voltage. The internal power supply voltage generation circuit can suppress reduction in the internal power supply voltage in the vicinity of the lower limit area of the differential power supply voltage.

公开(公告)号：US5917765A

公开(公告)日：1999-06-29

申请号：US951591

申请日：1997-10-16

申请人： Fukashi Morishita ,  Masaki Tsukude

发明人： Fukashi Morishita ,  Masaki Tsukude

IPC分类号： G01R31/28 ,  G11C5/14 ,  G11C11/401 ,  G11C11/407 ,  G11C29/06 ,  G11C29/50 ,  H01L21/66 ,  G11C13/00

CPC分类号： G11C29/50008 ,  G11C29/028 ,  G11C29/50 ,  G11C5/147 ,  G11C11/401 ,  G11C2029/5004

摘要： A semiconductor integrated circuit device realizing high speed operation and low current consumption and ensure reliability evaluation is provided. Reference voltage generating circuits for generating reference voltages of mutually different voltage levels are provided for power supply pads respectively, and voltage down converters for down converting power supply voltages of corresponding external power supply pads to corresponding reference voltage levels and transmitting the lowered voltages to corresponding internal power supply lines are provided corresponding to respective reference voltage generating circuits. Further, a switching transistor is provided at an output node of the reference voltage generating circuit which is rendered conductive at a stress acceleration mode for connecting the corresponding external power supply pad to the output node of the corresponding reference voltage generating circuit.

摘要翻译： 提供实现高速运行和低电流消耗并确保可靠性评估的半导体集成电路装置。 提供用于产生相互不同电压电平的参考电压的参考电压产生电路，以及用于将相应的外部电源焊盘的电源电压下变换为相应的参考电压电平的降压转换器，并将降低的电压传输到相应的内部 对应于各个参考电压产生电路提供电源线。 此外，开关晶体管设置在基准电压产生电路的输出节点处，其以应力加速模式导通，用于将相应的外部电源焊盘连接到相应的参考电压产生电路的输出节点。

公开(公告)号：US08772694B2

公开(公告)日：2014-07-08

申请号：US13277921

申请日：2011-10-20

申请人： Hiroki Sugano ,  Fukashi Morishita

发明人： Hiroki Sugano ,  Fukashi Morishita

IPC分类号： H01L27/146 ,  G01J1/44

CPC分类号： H04N5/3532 ,  H04N5/3745 ,  H04N5/376

摘要： An image sensor with a small circuit area is provided. In the image sensor, a TX decoder which generates transfer signals TX includes a latch circuit. The latch circuit is set when a corresponding row group is selected and when a set signal is set to an “H” level, and is reset when a reset signal is set to an “L” level. The latch circuit serves also as a voltage level shift circuit which converts the “H” level of a signal from a first power supply voltage into a second power supply voltage. Therefore, plural row groups can be selected by setting plural latch circuits. It is not necessary to provide a voltage level shift circuit separately.

摘要翻译： 提供具有小电路面积的图像传感器。 在图像传感器中，产生传送信号TX <3：0>的TX解码器包括锁存电路。 当选择相应的行组并且将设置信号设置为“H”电平时，锁存电路被设置，并且当复位信号被设置为“L”电平时，锁存电路被复位。 锁存电路还用作电压电平移位电路，其将来自第一电源电压的信号的“H”电平转换为第二电源电压。 因此，可以通过设置多个锁存电路来选择多个行组。 不需要单独提供电压电平移位电路。

公开(公告)号：US08736732B2

公开(公告)日：2014-05-27

申请号：US12722121

申请日：2010-03-11

申请人： Hiroto Utsunomiya ,  Katsumi Dosaka ,  Hiroshi Kato ,  Fukashi Morishita ,  Fumiyasu Sasaki

发明人： Hiroto Utsunomiya ,  Katsumi Dosaka ,  Hiroshi Kato ,  Fukashi Morishita ,  Fumiyasu Sasaki

IPC分类号： H04N5/335

CPC分类号： H04N5/37455 ,  H03M1/1205 ,  H03M1/144 ,  H03M1/403 ,  H03M1/66 ,  H03M2201/16 ,  H04N5/374 ,  H04N5/3742 ,  H04N5/3765 ,  H04N5/378

摘要： There is provided a solid-state image pickup device including ADCs that can be arranged in a limited space. The potential of a pixel signal outputted through a vertical readout line is held at a node. A plurality of capacitors are capacitively coupled to the node at which the pixel signal is held. The potential of the node is decreased in a stepwise manner by sequentially switching the voltages of the counter electrodes of the capacitors by the control of transistors. A comparator compares the potential of the node with the potential of the dark state of the pixel, and determines the upper bits of a digital value when the potential of the node becomes lower than the potential of the dark state. Following this, the conversion of the lower bits of the digital value is started. Therefore, it is possible to simplify the configuration of each ADC and arrange each ADC in a limited space.

摘要翻译： 提供了包括可以在有限空间中布置的ADC的固态图像拾取装置。 通过垂直读出线输出的像素信号的电位被保持在节点处。 多个电容器电容耦合到保持像素信号的节点。 通过晶体管的控制，通过依次切换电容器对置电极的电压，逐步降低节点的电位。 比较器将节点的电位与像素的暗状态的电位进行比较，并且当节点的电位变得低于黑暗状态的电位时，确定数字值的高位。 此后，开始数字值的低位的转换。 因此，可以简化每个ADC的配置，并将每个ADC排列在有限的空间内。

公开(公告)号：US07804368B2

公开(公告)日：2010-09-28

申请号：US12155876

申请日：2008-06-11

申请人： Masanobu Kishida ,  Fukashi Morishita

发明人： Masanobu Kishida ,  Fukashi Morishita

IPC分类号： H03B27/00

CPC分类号： H03K3/0315 ,  H03K17/063

摘要： The present invention provides a current-limited oscillator capable of performing stable operation even when it is driven with a low power-supply voltage, and a charge pump circuit using the oscillator. A current-limited oscillator has a delay section that includes a plurality of series-connected inverters to delay an output pulse on the basis of a current limiting level indication signal, and the oscillator further includes at least one first transistor that limits a first current between the inverters and a high potential power supply and at least one second transistor that limits a second current between the inverters and a low potential power supply, wherein at least one of the plurality of inverters is configured as a first inverter that is connected with the first transistor and is not connected with the second transistor, and at least another of the plurality of inverters is configured as a second inverter that is not connected with the first transistor and is connected with the second transistor.

摘要翻译： 本发明提供一种即使在以低电源电压驱动的情况下也能够稳定工作的电流限制型振荡器和使用该振荡器的电荷泵电路。 限流振荡器具有延迟部分，该延迟部分包括多个串联的反相器，用于基于限流电平指示信号来延迟输出脉冲，并且该振荡器还包括至少一个第一晶体管，其限制第一电流 所述逆变器和高电位电源以及限制所述逆变器之间的第二电流和低电位电源的至少一个第二晶体管，其中所述多个逆变器中的至少一个被配置为与所述第一逆变器连接的第一逆变器 并且不与第二晶体管连接，并且多个反相器中的至少另一个被配置为不与第一晶体管连接并与第二晶体管连接的第二反相器。

公开(公告)号：US20100033609A1

公开(公告)日：2010-02-11

申请号：US12473876

申请日：2009-05-28

申请人： Hiroshi KATO ,  Katsumi Dosaka ,  Fukashi Morishita

发明人： Hiroshi KATO ,  Katsumi Dosaka ,  Fukashi Morishita

IPC分类号： H04N5/335

CPC分类号： H04N5/3742 ,  H04N5/378

摘要： To obtain a solid state imaging device having a data transfer function capable of outputting digital data after A/D conversion to the outside in a high speed.Each of eight stage data blocks in a data bus part has a data line pair and an amplifier part which is coupled to the data line pair. Then, the amplifier part amplifies a signal of the data line pair on an amplifier data line pair to output the amplified signal as block data outputs at timing indicated by an amplifier enable signal and an amplifier control signal. Further, the eight stage data blocks are coupled with each other from the first stage to the last stage so that the preceding stage block data outputs may be provided to the following stage data line pair as block data inputs, respectively.

摘要翻译： 获得具有数据传送功能的固态成像装置，该数据传输功能能够在高速A / D转换到外部之后输出数字数据。 数据总线部分中的八级数据块中的每一个具有数据线对和耦合到数据线对的放大器部分。 然后，放大器部分放大放大器数据线对上的数据线对的信号，以在由放大器使能信号和放大器控制信号指示的定时处输出放大信号作为块数据输出。 此外，八级数据块从第一级到最后级彼此耦合，使得前级级块数据输出可以分别作为块数据输入提供给后级数据线对。

公开(公告)号：US20090058543A1

公开(公告)日：2009-03-05

申请号：US12289230

申请日：2008-10-23

申请人： Takayuki Gyoten ,  Fukashi Morishita ,  Katsumi Dosaka

发明人： Takayuki Gyoten ,  Fukashi Morishita ,  Katsumi Dosaka

IPC分类号： G01K7/00

CPC分类号： G01K7/01

摘要： There is provided a technique which is capable of detecting a temperature of a semiconductor device with high precision. A temperature detection circuit detecting a temperature of a semiconductor device includes a first short-cycle oscillator generating a first clock signal having positive temperature characteristics with respect to a frequency, a second short-cycle oscillator generating a second clock signal having negative temperature characteristics with respect to the frequency, and a temperature signal generation unit generating a temperature signal which is varied according to the temperature of the semiconductor device based on the first and second clock signals.

摘要翻译： 提供了能够高精度地检测半导体器件的温度的技术。 检测半导体器件的温度的温度检测电路包括：第一短周期振荡器，其产生相对于频率具有正温度特性的第一时钟信号;第二短周期振荡器，产生具有负温度特性的第二时钟信号 以及温度信号生成单元，其基于第一和第二时钟信号产生根据半导体器件的温度而变化的温度信号。