Bright field image reversal for contact hole patterning
    71.
    发明授权
    Bright field image reversal for contact hole patterning 有权
    接触孔图案的亮场图像反转

    公开(公告)号:US06358856B1

    公开(公告)日:2002-03-19

    申请号:US09716215

    申请日:2000-11-21

    IPC分类号: H01L21311

    CPC分类号: H01L21/31144

    摘要: A method of forming a small contact hole uses a bright field mask to form a small cylinder in a positive resist layer. A negative resist layer is formed around the small cylinder, and then etched or polished back to leave a top portion of the small cylinder exposed above the negative resist layer. The negative resist layer and the small cylinder (positive resist) are flood exposed to light, and then subject to a developer. What remains is a small contact hole located where the small cylinder was previously located.

    摘要翻译: 形成小接触孔的方法使用亮场掩模在正抗蚀剂层中形成小圆筒。 在小圆筒周围形成负的抗蚀剂层,然后被蚀刻或抛光回去,使得暴露在负性抗蚀剂层上方的小圆筒的顶部部分留下。 负抗蚀剂层和小圆筒(正性抗蚀剂)暴露于光下,然后经受显影剂。 剩下的是一个位于小圆柱之前所在的小接触孔。

    T-gate formation using modified damascene processing with two masks
    72.
    发明授权
    T-gate formation using modified damascene processing with two masks 有权
    使用具有两个掩模的改良镶嵌加工的T形栅结构

    公开(公告)号:US06319802B1

    公开(公告)日:2001-11-20

    申请号:US09620145

    申请日:2000-07-20

    IPC分类号: H01L213205

    CPC分类号: H01L21/28114

    摘要: A method for fabricating a T-gate structure is provided. A structure is provided that has a silicon layer having a gate oxide layer, a protection layer over the gate oxide layer and a sacrificial layer over the protection layer. An opening is then formed in the sacrificial layer. A contact material is deposited over the sacrificial layer filling the opening with the contact material and forming a contact layer. Portions of the contact material outside a gate region are then removed. Finally, the sacrificial layer and portions of the protection layer and the gate oxide layer not forming a part of the T-gate structure are removed.

    摘要翻译: 提供了一种制造T型栅结构的方法。 提供了一种具有硅层的结构,该硅层具有栅极氧化物层,栅极氧化物层上的保护层和保护层上的牺牲层。 然后在牺牲层中形成开口。 接触材料沉积在用接触材料填充开口的牺牲层上并形成接触层。 然后去除栅极区域外部的接触材料的部分。 最后,除去牺牲层和不形成T栅结构的一部分的保护层和栅极氧化物层的部分。

    Ultra-thin resist and SiON/oxide hard mask for metal etch
    73.
    发明授权
    Ultra-thin resist and SiON/oxide hard mask for metal etch 失效
    用于金属蚀刻的超薄抗蚀剂和SiON /氧化物硬掩模

    公开(公告)号:US06306560B1

    公开(公告)日:2001-10-23

    申请号:US09204630

    申请日:1998-12-02

    IPC分类号: G03C500

    摘要: In one embodiment, the present invention relates to a method of forming a metal line, involving the steps of providing a semiconductor substrate comprising a metal layer, an oxide layer over the metal layer, and a silicon oxynitride layer over the oxide layer; depositing an ultra-thin photoresist over the silicon oxynitride layer, the ultra-thin photoresist having a thickness less than about 2,000 Å; irradiating the ultra-thin photoresist with electromagnetic radiation having a wavelength of about 250 nm or less; developing the ultra-thin photoresist exposing a portion of the silicon oxynitride layer; etching the exposed portion of the silicon oxynitride layer exposing a portion of the oxide layer; etching the exposed portion of the oxide layer exposing a portion of the metal layer; and etching the exposed portion of the metal layer thereby forming the metal line.

    摘要翻译: 在一个实施例中,本发明涉及一种形成金属线的方法,包括以下步骤:在氧化物层上方提供包括金属层,金属层上的氧化物层和氧氮化硅层的半导体衬底; 在所述氮氧化硅层上沉积超薄光致抗蚀剂,所述超薄光致抗蚀剂具有小于约的厚度; 用波长约250nm或更小的电磁辐射照射超薄光致抗蚀剂; 显影暴露一部分氮氧化硅层的超薄光刻胶; 蚀刻暴露氧化物层的一部分的氧氮化硅层的暴露部分; 蚀刻暴露出金属层的一部分的氧化物层的暴露部分; 并且蚀刻金属层的暴露部分从而形成金属线。

    Conformal organic coatings for sidewall patterning of sublithographic structures
    74.
    发明授权
    Conformal organic coatings for sidewall patterning of sublithographic structures 失效
    用于亚光刻结构侧壁图案的保形有机涂层

    公开(公告)号:US06183938B2

    公开(公告)日:2001-02-06

    申请号:US09207551

    申请日:1998-12-08

    IPC分类号: G03F700

    摘要: In one embodiment, the present invention relates to a method of making a sub-lithographic structure involving the steps of providing a nitrogen rich film over a portion of a substrate; depositing a photoresist over the nitrogen rich film and the substrate, wherein the photoresist and the nitrogen rich film interact and form a thin desensitized resist layer around an interface between the photoresist and the nitrogen rich film; exposing the photoresist to radiation; developing the photoresist exposing the thin desensitized resist layer; directionally etching a portion of the thin desensitized resist layer; and removing the nitrogen rich film leaving the sub-lithographic structure on the substrate.

    摘要翻译: 在一个实施方案中,本发明涉及一种制备亚光刻结构的方法,其涉及以下步骤:在衬底的一部分上提供富氮膜; 在富氮膜和衬底上沉积光致抗蚀剂,其中光致抗蚀剂和富氮膜相互作用并在光致抗蚀剂和富氮膜之间的界面周围形成薄的脱敏抗蚀剂层; 将光致抗蚀剂暴露于辐射; 显影曝光薄的脱敏抗蚀剂层的光致抗蚀剂; 定向蚀刻一部分薄的脱敏抗蚀剂层; 并除去留在基板上的亚光刻结构的富氮膜。

    Method for transferring patterns created by lithography
    76.
    发明授权
    Method for transferring patterns created by lithography 有权
    通过光刻技术转移图案的方法

    公开(公告)号:US6140023A

    公开(公告)日:2000-10-31

    申请号:US203447

    申请日:1998-12-01

    IPC分类号: G03F7/075 G03F7/40 G03F9/00

    CPC分类号: G03F7/405 G03F7/075 G03F7/40

    摘要: A lithographic process for fabricating sub-micron features is provided. A silicon containing ultra-thin photoresist is formed on an underlayer surface to be etched. The ultra-thin photoresist layer is patterned with short wavelength radiation to define a pattern. The ultra-thin photoresist is oxidized so as to convert the silicon therein to silicon dioxide. The oxidized ultra-thin photoresist layer is used as a hard mask during an etch step to transfer the pattern to the underlayer. The etch step includes an etch chemistry that is highly selective to the underlayer over the oxidized ultra-thin photoresist layer.

    摘要翻译: 提供了用于制造亚微米特征的光刻工艺。 在要蚀刻的底层表面上形成含硅的超薄光致抗蚀剂。 用短波长辐射图案化超薄光致抗蚀剂层以限定图案。 超薄光致抗蚀剂被氧化以将其中的硅转化为二氧化硅。 氧化的超薄光致抗蚀剂层在蚀刻步骤期间用作硬掩模以将图案转印到底层。 蚀刻步骤包括对氧化的超薄光致抗蚀剂层上的底层具有高选择性的蚀刻化学品。

    Thin resist with nitride hard mask for via etch application
    77.
    发明授权
    Thin resist with nitride hard mask for via etch application 有权
    具有用于通孔蚀刻应用的氮化物硬掩模的薄抗蚀剂

    公开(公告)号:US6127070A

    公开(公告)日:2000-10-03

    申请号:US203283

    申请日:1998-12-01

    摘要: A method of forming a via structure is provided. In the method, a dielectric layer is formed on an anti-reflective coating (ARC) layer covering a first metal layer; and a nitride layer is formed on the dielectric layer. An ultra-thin photoresist layer is formed on the nitride layer, and the ultra-thin photoresist layer is patterned with short wavelength radiation to define a pattern for a via. The patterned ultra-thin photoresist layer is used as a mask during a first etch step to transfer the via pattern to the nitride layer. The first etch step includes an etch chemistry that is selective to the nitride layer over the ultra-thin photoresist layer and the dielectric layer. The nitride layer is employed as a hard mask during a second etch step to form a contact hole corresponding to the via pattern by etching portions of the dielectric layer.

    摘要翻译: 提供一种形成通孔结构的方法。 在该方法中,在覆盖第一金属层的抗反射涂层(ARC)层上形成电介质层; 并且在电介质层上形成氮化物层。 在氮化物层上形成超薄光致抗蚀剂层,并用短波长辐射对超薄光致抗蚀剂层进行图案化,以形成通孔图案。 在第一蚀刻步骤期间,将图案化超薄光致抗蚀剂层用作掩模,以将通孔图案转移到氮化物层。 第一蚀刻步骤包括对超薄光致抗蚀剂层和电介质层上的氮化物层有选择性的蚀刻化学品。 在第二蚀刻步骤期间,氮化物层用作硬掩模,以通过蚀刻介电层的部分来形成与通孔图案相对应的接触孔。

    Shallow trench isolation formation with simplified reverse planarization
mask
    78.
    发明授权
    Shallow trench isolation formation with simplified reverse planarization mask 失效
    浅沟槽隔离形成,具有简化的反向平面化掩模

    公开(公告)号:US6124183A

    公开(公告)日:2000-09-26

    申请号:US992490

    申请日:1997-12-18

    IPC分类号: H01L21/762 H01L21/76

    CPC分类号: H01L21/76224

    摘要: An insulated trench isolation structure with large and small trenches of differing widths is formed in a semiconductor substrate using a simplified reverse source/drain planarization mask. Embodiments include forming trenches and refilling them with an insulating material which also covers a main surface of the substrate, polishing to remove an upper portion of the insulating material and to planarize the insulating material above the small trenches, furnace annealing to densify and strengthen the remaining insulating material, masking the insulating material above the large trenches, isotropically etching the insulating material, and polishing to planarize the insulating material. Since the insulating material is partially planarized and strengthened prior to etching, etching can be carried out after the formation of a relatively simple planarization mask over only the large trenches, and not the small trenches. Because the features of the planarization mask are relatively few and have a relatively large geometry, the present invention avoids the need to create and implement a critical mask, enabling production costs to be reduced and manufacturing throughput to be increased.

    摘要翻译: 使用简化的反向源极/漏极平面化掩模在半导体衬底中形成具有不同宽度的大的和小的沟槽的绝缘沟槽隔离结构。 实施例包括形成沟槽并用绝缘材料再填充它们,该绝缘材料也覆盖衬底的主表面,抛光以除去绝缘材料的上部并平面化小沟槽上方的绝缘材料,炉退火致密化并加强其余部分 绝缘材料,掩蔽大沟槽上方的绝缘材料,各向同性地蚀刻绝缘材料,并抛光以使绝缘材料平坦化。 由于在蚀刻之前绝缘材料被部分平坦化和加强,因此可以在仅在大的沟槽上而不是小沟槽形成相对简单的平坦化掩模之后进行蚀刻。 由于平面化掩模的特征相对较少并且具有相对较大的几何形状,因此本发明避免了创建和实施关键掩模的需要,从而能够降低生产成本并提高生产量。

    Shallow trench isolation formation with no polish stop
    79.
    发明授权
    Shallow trench isolation formation with no polish stop 失效
    浅沟隔离形成,无抛光停止

    公开(公告)号:US6090712A

    公开(公告)日:2000-07-18

    申请号:US992489

    申请日:1997-12-18

    IPC分类号: H01L21/762 H01L21/461

    CPC分类号: H01L21/76224

    摘要: An insulated trench isolation structure is formed in a semiconductor substrate omitting a barrier nitride polish stop layer while avoiding substrate damage, thereby simplifying trench formation and improving planarity. After trench fill, polishing is conducted to effect substantial planarization without exposing the substrate surface, thereby avoiding substrate damage. Etching is then conducted to expose the substrate surface. The omission of the barrier nitride polish stop avoids generation of a topographical step at the substrate/trench fill interface, thereby enhancing the accuracy of subsequent photolithographic techniques in forming features with minimal dimensions.

    摘要翻译: 在半导体衬底中形成绝缘沟槽隔离结构,省略了阻挡氮化物抛光停止层,同时避免了衬底损坏,从而简化了沟槽形成并提高了平面度。 在沟槽填充之后,进行抛光以实现基本平坦化而不暴露衬底表面,从而避免衬底损坏。 然后进行蚀刻以暴露衬底表面。 阻挡氮化物抛光停止的省略避免了在衬底/沟槽填充界面处产生形貌步骤,从而在最小尺寸形成特征的同时提高随后的光刻技术的精度。

    Methods for designing grating structures for use in situ scatterometry to detect photoresist defects
    80.
    发明授权
    Methods for designing grating structures for use in situ scatterometry to detect photoresist defects 有权
    设计光栅结构的方法用于原位散射检测光刻胶缺陷

    公开(公告)号:US07427457B1

    公开(公告)日:2008-09-23

    申请号:US10934277

    申请日:2004-09-03

    IPC分类号: G03F9/00

    摘要: The present invention discloses a system and method for designing grating structures for use in situ scatterometry during the photolithography process to detect a photoresist defect (e.g., photoresist erosion, pattern collapse or pattern bending). In one embodiment, a grating structure may be designed with a pitch or critical dimensional smaller than the one used for the semiconductor device. The pitch and the critical dimension of the grating structure may be varied. In another embodiment, the present invention provides for a feedback mechanism between the in situ scatterometry process and the photolithography process to provide an early warning of the existence of a photoresist defect. If a defect is detected on the wafer, the wafer may be sent to be re-worked or re-patterned, thereby avoiding scrapping the entire wafer.

    摘要翻译: 本发明公开了一种用于在光刻工艺期间用于原位散射测量的光栅结构的系统和方法,用于检测光致抗蚀剂缺陷(例如,光致抗蚀剂侵蚀,图案崩溃或图案弯曲)。 在一个实施例中,可以设计具有小于用于半导体器件的间距或临界尺寸的光栅结构。 光栅结构的间距和临界尺寸可以变化。 在另一个实施例中,本发明提供了原位散射测量过程和光刻工艺之间的反馈机制,以提供光刻胶缺陷的存在的早期警告。 如果在晶片上检测到缺陷,则可以将晶片发送以进行再加工或重新图案化,从而避免报废整个晶片。