摘要:
One aspect of the present invention relates to an in-line system for monitoring and optimizing an on-going CMP process in order to determine a CMP process endpoint comprising a wafer, wherein the wafer is subjected to the CMP process; a CMP process monitoring system for generating a signature related to wafer dimensions for the wafer subjected to the CMP process; and a signature library to which the generated signature is compared to determine a state of the wafer. Another aspect relates to an in-line method for monitoring and optimizing an on-going CMP process involving providing a wafer, wherein the wafer is subjected to a CMP process; generating a signature associated with the wafer; comparing the generated signature to a signature library to determine a state of the wafer; and using a closed-loop feedback control system for modifying the on-going CMP process according to the determined state of the wafer.
摘要:
The present invention is directed to a system and a method for controlling a thin film formation on a moving substrate as part of a process for manufacturing an integrated circuit. The invention involves the use of scatterometry to control the thin film formation process by analyzing the thin film on the moving substrate in a periodic manner. A registration feature associated with the moving substrate can be utilized in conjunction with a signaling system to determine a position of the moving substrate, whereby a repeatable analysis of a corresponding location on the moving substrate can be performed. Scatterometry permits in-situ measurements of thin film formation progress, whereby thin film formation process conditions can be controlled in a feedback loop to obtain a targeted result. Scatterometry can also be facilitated by providing a grating pattern on a non-production portion of the substrate.
摘要:
A method of making and using a reference wafer and a metrology system to calibrate tools in a photolithographic system. The reference wafer includes a silicon substrate, a dielectric or insulating layer disposed above the silicon substrate and a pattern disposed above the insulating layer. The pattern is coupled to the silicon substrate and the silicon substrate acts as a ground for the pattern. As a result, charge buildup on the pattern is mitigated since excess charge is dissipated into the silicon substrate.
摘要:
A system and method is provided for determining and controlling development of a semiconductor substrate employing fluorescence spectroscopy. One aspect of the invention relates to a system and method employing fluorescence spectroscopy to facilitate control of a chemical trim etch process during development of a photoresist material layer. The chemical trim etch process comprises applying a trim compound or material to a patterned photoresist. The trim compound or material is diffusable into the sides and top of the patterned resist. The diffused regions of the resist are soluble in a developer, which facilitates creating smaller features in the patterned photoresist. The fluorescence spectroscopy system can be employed to measure isolated and dense gratings or CDs and use the evolution of the CD to determine when to terminate the chemical trim process.
摘要:
In one embodiment, the present invention relates to a method of processing a semiconductor substrate, involving the steps of providing the semiconductor substrate having an upper surface; roughening the upper surface of the semiconductor substrate so that the upper surface of the semiconductor substrate has an Rtm of about 10 Å or more; and depositing an ultra-thin photoresist on the upper surface of the semiconductor substrate, the ultra-thin photoresist having a thickness of about 2,000 Å or less.
摘要:
In one embodiment, the present invention relates to a method of processing an irradiated photoresist involving the steps of placing a substrate having the irradiated photoresist thereon at a first temperature in a rapid thermal anneal furnace; heating the substrate having the irradiated photoresist thereon to a second temperature within about 0.1 seconds to about 10 seconds; cooling the substrate having the irradiated photoresist thereon to a third temperature in a rapid thermal annealing furnace within about 0.1 seconds to about 10 seconds; and developing the irradiated photoresist, wherein the second temperature is higher than the first temperature and the third temperature. In another embodiment, the present invention relates to a system of processing a photoresist, containing a source of actinic radiation and a mask for selectively irradiating a photoresist; a rapid thermal annealing furnace for rapidly heating and rapidly cooling a selectively irradiated photoresist, wherein the rapid heating and rapid cooling are independently conducted within about 0.1 seconds to about 10 seconds; and a developer for developing a rapid thermal annealing furnace heated and selectively irradiated photoresist into a patterned photoresist.
摘要:
A combination nozzle for applying a developer material and a washing solution material at different time intervals to a photoresist material layer disposed on a wafer is provided. The combination nozzle includes a number of developer nozzle tips connected to a developer supply line and a number of washing solution nozzle tips connected to a washing solution supply line. The developer supply line and the washing solution supply line ensure that the developer material and the washing solution material are always substantially isolated from one another. Furthermore, the developer nozzle tips and the washing solution nozzle tips are arranged so that developer material and washing solution material do not come into contact with one another. The volume of the material and the volume flow of the material can be controlled by electronically controlled valves.
摘要:
A system for monitoring and regulating a photoresist temperature in a maskless lithography pattern transfer process is disclosed. The system includes a photoresist layer overlying a substrate and a material associated with the photoresist layer, wherein the material exhibits a transformation over variations in temperature. The system also includes a detection system for detecting the transformation in the material and a processor operatively coupled to the detection system. The processor receives information associated with the detected transformation and uses the information to control a tool being used for the pattern transfer, thereby reducing variations in temperature in the resist during pattern transfer. In addition, a method of monitoring and regulating a photoresist temperature in a maskless lithography pattern transfer process is disclosed. The method includes associating a material having a characteristic which varies over variations in temperature with a photoresist layer which overlies a substrate and detecting the characteristic during the pattern transfer process. Once detected a temperature of a portion of the photoresist layer is determined using the detected characteristic and an operation of a writing tool which performs the pattern transfer process in response to the photoresist layer temperature is controlled in response thereto.
摘要:
A reverse lithographic process is provided for more densely packing semiconductors onto a semiconductor wafer. A semiconductor wafer having a dielectric covered semiconductor device has a photoresist deposited which is patterned with vias in closely packed rows and columns. The resist is developed and trimmed to form via photoresist structures. A non-photosensitive polymer is deposited over the via photoresist structures and, when hardened, is subject to planarizing to expose the via photoresist structures. The via photoresist structures are removed and leave a reverse image patterned polymer. The photoresist is removed leaving the reverse image patterned polymer, which is then used to etch the dielectric to form vias to the semiconductor device.
摘要:
A focus monitor structure is placed on a reticle or mask near the production device structures, such as integrated circuits, to monitor the focal conditions of the lithography process as well as other parameters, such as the critical dimension, and proximity effects. The focus monitor structure includes a series of densely packed parallel lines and an isolated line along with a line that is positioned orthogonally to the densely packed lines forming an "L" shaped structure. The focus monitor structure also includes a plurality of rectangular islands that create post structures when patterned in the resist layer. The lines of the focus monitor structure are approximately the critical dimension and the rectangular islands vary in width between .+-.10% of the critical dimension. By manually or automatically inspecting the focus monitor structure after it is patterned into a layer of resist, including measuring the width of the resist lines and the resist profile angle of the orthogonal line, information relating to the critical dimension as well as the focal conditions of the lithography process can be determined.