Monitor CMP process using scatterometry
    71.
    发明授权
    Monitor CMP process using scatterometry 有权
    使用散点法监测CMP过程

    公开(公告)号:US06594024B1

    公开(公告)日:2003-07-15

    申请号:US09886863

    申请日:2001-06-21

    IPC分类号: G01B1128

    摘要: One aspect of the present invention relates to an in-line system for monitoring and optimizing an on-going CMP process in order to determine a CMP process endpoint comprising a wafer, wherein the wafer is subjected to the CMP process; a CMP process monitoring system for generating a signature related to wafer dimensions for the wafer subjected to the CMP process; and a signature library to which the generated signature is compared to determine a state of the wafer. Another aspect relates to an in-line method for monitoring and optimizing an on-going CMP process involving providing a wafer, wherein the wafer is subjected to a CMP process; generating a signature associated with the wafer; comparing the generated signature to a signature library to determine a state of the wafer; and using a closed-loop feedback control system for modifying the on-going CMP process according to the determined state of the wafer.

    摘要翻译: 本发明的一个方面涉及用于监测和优化正在进行的CMP工艺的在线系统,以便确定包括晶片的CMP工艺端点,其中晶片经历CMP工艺; 用于生成与经历CMP处理的晶片的晶片尺寸相关的签名的CMP过程监控系统; 以及生成的签名被比较的签名库,以确定晶片的状态。 另一方面涉及用于监测和优化涉及提供晶片的正在进行的CMP工艺的在线方法,其中所述晶片经受CMP工艺; 产生与晶片相关联的签名; 将生成的签名与签名库进行比较以确定晶片的状态; 以及使用闭环反馈控制系统来根据所确定的晶片状态来修正正在进行的CMP工艺。

    Scattered signal collection using strobed technique
    72.
    发明授权
    Scattered signal collection using strobed technique 有权
    使用频闪技术分散信号采集

    公开(公告)号:US06556303B1

    公开(公告)日:2003-04-29

    申请号:US09902366

    申请日:2001-07-10

    IPC分类号: G01B1114

    摘要: The present invention is directed to a system and a method for controlling a thin film formation on a moving substrate as part of a process for manufacturing an integrated circuit. The invention involves the use of scatterometry to control the thin film formation process by analyzing the thin film on the moving substrate in a periodic manner. A registration feature associated with the moving substrate can be utilized in conjunction with a signaling system to determine a position of the moving substrate, whereby a repeatable analysis of a corresponding location on the moving substrate can be performed. Scatterometry permits in-situ measurements of thin film formation progress, whereby thin film formation process conditions can be controlled in a feedback loop to obtain a targeted result. Scatterometry can also be facilitated by providing a grating pattern on a non-production portion of the substrate.

    摘要翻译: 本发明涉及一种用于控制移动衬底上的薄膜形成的系统和方法,作为用于制造集成电路的工艺的一部分。 本发明涉及使用散射法来以周期性方式分析移动基片上的薄膜来控制薄膜形成过程。 与移动基板相关联的配准特征可以与信号系统结合使用,以确定移动基板的位置,由此可以执行移动基板上对应位置的可重复分析。 散射测量允许原位测量薄膜形成进程,由此可以在反馈回路中控制薄膜形成工艺条件以获得目标结果。 也可以通过在基板的非生产部分上提供光栅图案来促进散射测量。

    Methodology to mitigate electron beam induced charge dissipation on polysilicon fine patterning
    73.
    发明授权
    Methodology to mitigate electron beam induced charge dissipation on polysilicon fine patterning 失效
    减少多晶硅精细图案化后电子束感应电荷耗散的方法

    公开(公告)号:US06455332B1

    公开(公告)日:2002-09-24

    申请号:US09564406

    申请日:2000-05-01

    IPC分类号: H01L2100

    CPC分类号: H01L22/34

    摘要: A method of making and using a reference wafer and a metrology system to calibrate tools in a photolithographic system. The reference wafer includes a silicon substrate, a dielectric or insulating layer disposed above the silicon substrate and a pattern disposed above the insulating layer. The pattern is coupled to the silicon substrate and the silicon substrate acts as a ground for the pattern. As a result, charge buildup on the pattern is mitigated since excess charge is dissipated into the silicon substrate.

    摘要翻译: 制造和使用参考晶片和计量系统来校准光刻系统中的工具的方法。 参考晶片包括硅衬底,设置在硅衬底上方的电介质层或绝缘层以及设置在绝缘层之上的图案。 该图案耦合到硅衬底,并且硅衬底用作图案的接地。 结果,由于过量的电荷消散到硅衬底中,因此减轻了图案上的电荷积累。

    Measure fluorescence from chemical released during trim etch
    74.
    发明授权
    Measure fluorescence from chemical released during trim etch 失效
    测量在修剪蚀刻期间释放的化学物质的荧光

    公开(公告)号:US06448097B1

    公开(公告)日:2002-09-10

    申请号:US09911236

    申请日:2001-07-23

    IPC分类号: H01L3126

    摘要: A system and method is provided for determining and controlling development of a semiconductor substrate employing fluorescence spectroscopy. One aspect of the invention relates to a system and method employing fluorescence spectroscopy to facilitate control of a chemical trim etch process during development of a photoresist material layer. The chemical trim etch process comprises applying a trim compound or material to a patterned photoresist. The trim compound or material is diffusable into the sides and top of the patterned resist. The diffused regions of the resist are soluble in a developer, which facilitates creating smaller features in the patterned photoresist. The fluorescence spectroscopy system can be employed to measure isolated and dense gratings or CDs and use the evolution of the CD to determine when to terminate the chemical trim process.

    摘要翻译: 提供了一种使用荧光光谱法确定和控制半导体衬底的开发的系统和方法。 本发明的一个方面涉及使用荧光光谱学来促进在光致抗蚀剂材料层的显影期间控制化学修剪蚀刻工艺的系统和方法。 化学修剪蚀刻工艺包括将修剪化合物或材料施加到图案化的光致抗蚀剂上。 修整组合物或材料可扩散到图案化抗蚀剂的侧面和顶部。 抗蚀剂的扩散区域可溶于显影剂,这有助于在图案化的光致抗蚀剂中产生更小的特征。 荧光光谱系统可用于测量孤立和致密的光栅或CD,并使用CD的演变来确定何时终止化学修饰过程。

    Use of RTA furnace for photoresist baking
    76.
    发明授权
    Use of RTA furnace for photoresist baking 有权
    使用RTA炉进行光刻胶烘烤

    公开(公告)号:US06335152B1

    公开(公告)日:2002-01-01

    申请号:US09564408

    申请日:2000-05-01

    IPC分类号: G03F738

    CPC分类号: G03F7/38

    摘要: In one embodiment, the present invention relates to a method of processing an irradiated photoresist involving the steps of placing a substrate having the irradiated photoresist thereon at a first temperature in a rapid thermal anneal furnace; heating the substrate having the irradiated photoresist thereon to a second temperature within about 0.1 seconds to about 10 seconds; cooling the substrate having the irradiated photoresist thereon to a third temperature in a rapid thermal annealing furnace within about 0.1 seconds to about 10 seconds; and developing the irradiated photoresist, wherein the second temperature is higher than the first temperature and the third temperature. In another embodiment, the present invention relates to a system of processing a photoresist, containing a source of actinic radiation and a mask for selectively irradiating a photoresist; a rapid thermal annealing furnace for rapidly heating and rapidly cooling a selectively irradiated photoresist, wherein the rapid heating and rapid cooling are independently conducted within about 0.1 seconds to about 10 seconds; and a developer for developing a rapid thermal annealing furnace heated and selectively irradiated photoresist into a patterned photoresist.

    摘要翻译: 在一个实施方案中,本发明涉及一种处理被照射的光致抗蚀剂的方法,包括以下步骤:在快速热退火炉中将具有照射光致抗蚀剂的基底在第一温度下放置; 将其上具有照射的光致抗蚀剂的基板加热至约0.1秒至约10秒的第二温度; 将快速热退火炉中具有照射光致抗蚀剂的基板冷却至约0.1秒至约10秒的第三温度; 并且显影所述被照射的光致抗蚀剂,其中所述第二温度高于所述第一温度和所述第三温度。 在另一个实施方案中,本发明涉及一种处理含有光化辐射源的光致抗蚀剂的系统和用于选择性地照射光致抗蚀剂的掩模; 快速热退火炉,用于快速加热和快速冷却选择性照射的光致抗蚀剂,其中快速加热和快速冷却在约0.1秒至约10秒内独立进行; 以及用于将快速热退火炉加热并选择性地照射光致抗蚀剂的显影剂加工成图案化的光致抗蚀剂。

    Common nozzle for resist development
    77.
    发明授权
    Common nozzle for resist development 有权
    普通喷嘴用于抗蚀剂开发

    公开(公告)号:US06322009B1

    公开(公告)日:2001-11-27

    申请号:US09429992

    申请日:1999-10-29

    IPC分类号: B05B900

    CPC分类号: H01L21/6708 H01L21/67051

    摘要: A combination nozzle for applying a developer material and a washing solution material at different time intervals to a photoresist material layer disposed on a wafer is provided. The combination nozzle includes a number of developer nozzle tips connected to a developer supply line and a number of washing solution nozzle tips connected to a washing solution supply line. The developer supply line and the washing solution supply line ensure that the developer material and the washing solution material are always substantially isolated from one another. Furthermore, the developer nozzle tips and the washing solution nozzle tips are arranged so that developer material and washing solution material do not come into contact with one another. The volume of the material and the volume flow of the material can be controlled by electronically controlled valves.

    摘要翻译: 提供了用于将显影剂材料和洗涤液材料以不同的时间间隔施加到设置在晶片上的光致抗蚀剂材料层的组合喷嘴。 组合喷嘴包括连接到显影剂供应管线的多个显影剂喷嘴尖端和连接到洗涤溶液供应管线的多个洗涤溶液喷嘴尖端。 显影剂供应管线和洗涤溶液供应管线确保显影剂材料和洗涤液材料总是基本上彼此隔离。 此外,显影剂喷嘴尖端和洗涤溶液喷嘴尖端被布置成使得显影剂材料和洗涤液材料彼此不接触。 材料的体积和材料的体积流量可以通过电子控制阀来控制。

    Active control of temperature in scanning probe lithography and maskless lithograpy
    78.
    发明授权
    Active control of temperature in scanning probe lithography and maskless lithograpy 有权
    扫描探针光刻和无掩模光刻中主动控制温度

    公开(公告)号:US06238830B1

    公开(公告)日:2001-05-29

    申请号:US09429994

    申请日:1999-10-29

    IPC分类号: G03F900

    摘要: A system for monitoring and regulating a photoresist temperature in a maskless lithography pattern transfer process is disclosed. The system includes a photoresist layer overlying a substrate and a material associated with the photoresist layer, wherein the material exhibits a transformation over variations in temperature. The system also includes a detection system for detecting the transformation in the material and a processor operatively coupled to the detection system. The processor receives information associated with the detected transformation and uses the information to control a tool being used for the pattern transfer, thereby reducing variations in temperature in the resist during pattern transfer. In addition, a method of monitoring and regulating a photoresist temperature in a maskless lithography pattern transfer process is disclosed. The method includes associating a material having a characteristic which varies over variations in temperature with a photoresist layer which overlies a substrate and detecting the characteristic during the pattern transfer process. Once detected a temperature of a portion of the photoresist layer is determined using the detected characteristic and an operation of a writing tool which performs the pattern transfer process in response to the photoresist layer temperature is controlled in response thereto.

    摘要翻译: 公开了一种用于在无掩模光刻图案转印工艺中监测和调节光刻胶温度的系统。 该系统包括覆盖衬底的光致抗蚀剂层和与光致抗蚀剂层相关联的材料,其中材料表现出与温度变化的转变。 该系统还包括用于检测材料中的变换的检测系统和可操作地耦合到检测系统的处理器。 处理器接收与检测到的变换相关联的信息,并使用该信息来控制用于图案转印的工具,由此减少图案转印期间抗蚀剂的温度变化。 此外,公开了一种在无掩模光刻图案转印工艺中监测和调节光刻胶温度的方法。 该方法包括将具有随温度变化变化的特性的材料与覆盖在衬底上的光致抗蚀剂层相关联,并且在图案转移过程期间检测特性。 一旦检测到,使用检测到的特性确定光刻胶层的一部分的温度,并响应于光致抗蚀剂层温度来控制执行图案转印处理的写入工具的操作。

    Reverse lithographic process for semiconductor vias
    79.
    发明授权
    Reverse lithographic process for semiconductor vias 有权
    半导体通孔反向光刻工艺

    公开(公告)号:US06221777B1

    公开(公告)日:2001-04-24

    申请号:US09329154

    申请日:1999-06-09

    IPC分类号: H01L2100

    摘要: A reverse lithographic process is provided for more densely packing semiconductors onto a semiconductor wafer. A semiconductor wafer having a dielectric covered semiconductor device has a photoresist deposited which is patterned with vias in closely packed rows and columns. The resist is developed and trimmed to form via photoresist structures. A non-photosensitive polymer is deposited over the via photoresist structures and, when hardened, is subject to planarizing to expose the via photoresist structures. The via photoresist structures are removed and leave a reverse image patterned polymer. The photoresist is removed leaving the reverse image patterned polymer, which is then used to etch the dielectric to form vias to the semiconductor device.

    摘要翻译: 提供反向光刻工艺用于在半导体晶片上更密集地堆叠半导体。 具有电介质覆盖的半导体器件的半导体晶片具有沉积的光致抗蚀剂,其以紧密堆积的行和列形成通孔。 抗蚀剂被显影和修整以通过光致抗蚀剂结构形成。 非光敏聚合物沉积在通孔光致抗蚀剂结构上,并且当硬化时,进行平面化以暴露通孔光致抗蚀剂结构。 去除通孔光致抗蚀剂结构并留下反向图案图案化的聚合物。 除去光致抗蚀剂留下反向图案图案化的聚合物,然后将其用于蚀刻电介质以形成到半导体器件的通孔。

    Focus monitor structure and method for lithography process
    80.
    发明授权
    Focus monitor structure and method for lithography process 失效
    光刻工艺的聚焦监视器结构和方法

    公开(公告)号:US6063531A

    公开(公告)日:2000-05-16

    申请号:US167417

    申请日:1998-10-06

    IPC分类号: G03F7/20 G03F9/02 G03F9/00

    CPC分类号: G03F7/70625 G03F7/70641

    摘要: A focus monitor structure is placed on a reticle or mask near the production device structures, such as integrated circuits, to monitor the focal conditions of the lithography process as well as other parameters, such as the critical dimension, and proximity effects. The focus monitor structure includes a series of densely packed parallel lines and an isolated line along with a line that is positioned orthogonally to the densely packed lines forming an "L" shaped structure. The focus monitor structure also includes a plurality of rectangular islands that create post structures when patterned in the resist layer. The lines of the focus monitor structure are approximately the critical dimension and the rectangular islands vary in width between .+-.10% of the critical dimension. By manually or automatically inspecting the focus monitor structure after it is patterned into a layer of resist, including measuring the width of the resist lines and the resist profile angle of the orthogonal line, information relating to the critical dimension as well as the focal conditions of the lithography process can be determined.

    摘要翻译: 将聚焦监视器结构放置在生产设备结构(例如集成电路)附近的掩模版或掩模上,以监视光刻工艺的焦点状况以及其他参数,例如临界尺寸和邻近效应。 聚焦监视器结构包括一系列密集的平行线和一条隔离的线以及一条线,该线与形成“L”形结构的密集线相正交。 聚焦监视器结构还包括当在抗蚀剂层中图案化时产生柱结构的多个矩形岛。 聚焦监视器结构的线条大致是临界尺寸,矩形岛的宽度在临界尺寸的+/- 10%之间变化。 在聚焦监视器结构被图案化成抗蚀剂层之后,通过手动或自动地检查聚焦监视器结构,包括测量抗蚀剂线的宽度和正交线的抗蚀剂轮廓角,与关键尺寸以及焦点监视结构的焦点条件 可以确定光刻工艺。