Abstract:
An object is to provide a memory device including a memory element that can be operated without problems by a thin film transistor with a low off-state current. Provided is a memory device in which a memory element including at least one thin film transistor that includes an oxide semiconductor layer is arranged as a matrix. The thin film transistor including an oxide semiconductor layer has a high field effect mobility and low off-state current, and thus can be operated favorably without problems. In addition, the power consumption can be reduced. Such a memory device is particularly effective in the case where the thin film transistor including an oxide semiconductor layer is provided in a pixel of a display device because the memory device and the pixel can be formed over one substrate.
Abstract:
A display device includes a liquid crystal element, a transistor, a scan line, and a signal line. The liquid crystal element includes a pixel electrode, a liquid crystal layer, and a common electrode. The scan line and the signal line are each electrically connected to the transistor. The scan line and the signal line each include a metal layer. The transistor is electrically connected to the pixel electrode. A semiconductor layer of the transistor includes a stack of a first metal oxide layer and a second metal oxide layer. The first metal oxide layer includes a region with lower crystallinity than the second metal oxide layer. The transistor includes a first region connected to the pixel electrode. The pixel electrode, the common electrode, and the first region are each configured to transmit visible light. Visible light passes through the first region and the liquid crystal element and exits from the display device.
Abstract:
An input/output device is provided. The input/output device includes a first pixel electrode, a second pixel electrode, a first common electrode, a second common electrode, a liquid crystal, a first insulating film, a second insulating film, and a transistor. The first common electrode can serve as one electrode of a sensor element. The second common electrode can serve as the other electrode of the sensor element. The transistor includes a first gate, a second gate, and a semiconductor layer. The pixel electrode, the common electrodes, and the second gate are positioned on different planes. The second gate contains one or more kinds of metal elements included in the semiconductor layer. The second gate, the pixel electrode, and the common electrodes preferably contain one or more kinds of metal elements included in the semiconductor layer.
Abstract:
To provide a touch panel in which a decrease in display quality is suppressed. The touch panel includes a touch sensor and a display element. The touch sensor includes a transistor and a sensor element. The transistor is electrically connected to the sensor element. The sensor element includes a pair of electrodes and a dielectric layer. The dielectric layer is positioned between the pair of electrodes. One of the pair of electrodes is an island-shaped electrode. The display element can display an image toward the touch sensor side. The island-shaped electrode does not overlap with a display region of the display element.
Abstract:
To reduce a variation in the electrical characteristics of a transistor. A potential generated by a voltage converter circuit is applied to a back gate of a transistor included in a voltage conversion block. Since the back gate of the transistor is not in a floating state, a current flowing through the back channel can be controlled so as to reduce a variation in the electrical characteristics of the transistor. Further, a transistor with low off-state current is used as the transistor included in the voltage conversion block, whereby storage of the output potential is controlled.
Abstract:
Efficiency of a charge pump circuit is increased. The charge pump circuit includes serially connected fundamental circuits each including a diode-connected transistor and a capacitor. At least one transistor is provided with a back gate, and the back gate is connected to any node in the charge pump circuit. For example, the charge pump circuit is of a step-up type; in which case, if the transistor is an n-channel transistor, a back gate of the transistor in the last stage is connected to an output node of the charge pump circuit. Back gates of the transistors in the other stages are connected to an input node of the charge pump circuit. In this way, the voltage holding capability of the fundamental circuit in the last stage is increased, and the conversion efficiency can be increased because an increase in the threshold of the transistors in the other stages is prevented.
Abstract:
A display device with fewer terminals. The display device includes a timing signal generating circuit which outputs an output signal based on a clock signal, in which one signal line serves as both a signal line to which a start pulse signal that drives the timing signal generating circuit is input and a signal line to which an image signal is input. Further, a blocking circuit which outputs a start pulse to the timing signal generating circuit but does not output the image signal is provided between the signal line and the timing signal generating circuit.
Abstract:
A semiconductor device including an integrator circuit, in which electric discharge from a capacitor can be reduced to shorten time required for charging the capacitor in the case where supply of power supply voltage is stopped and restarted, and a method for driving the semiconductor device are provided. One embodiment has a structure in which a transistor with small off-state current is electrically connected in series to a capacitor in an integrator circuit. Further, in one embodiment of the present invention, a transistor with small off-state current is electrically connected in series to a capacitor in an integrator circuit; the transistor is on in a period during which power supply voltage is supplied; and the transistor is off in a period during which supply of the power supply voltage is stopped.
Abstract:
An object is to provide a memory device including a memory element that can be operated without problems by a thin film transistor with a low off-state current. Provided is a memory device in which a memory element including at least one thin film transistor that includes an oxide semiconductor layer is arranged as a matrix. The thin film transistor including an oxide semiconductor layer has a high field effect mobility and low off-state current, and thus can be operated favorably without problems. In addition, the power consumption can be reduced. Such a memory device is particularly effective in the case where the thin film transistor including an oxide semiconductor layer is provided in a pixel of a display device because the memory device and the pixel can be formed over one substrate.
Abstract:
One object of the invention is to reduce discharge of electric charge from a capacitor when supply of power supply voltage to a charge pump circuit is stopped and restarted, so that a time required after the supply of power supply voltage is restarted and before an input signal is boosted is shortened. A semiconductor device includes a boosting circuit portion including a charge transfer element and a capacitor, boosting a voltage level of an input signal, and outputting an output signal having a boosted voltage level; a detection circuit monitoring a voltage level of the output signal; and a control circuit outputting a signal for controlling boosting of the voltage level of the input signal to the boosting circuit portion in accordance with the voltage level obtained by the detection circuit. The boosting circuit portion includes a switch electrically connected to the capacitor and the charge transfer element.